Patents by Inventor Takuya Tsurume

Takuya Tsurume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080311706
    Abstract: To provide a method for manufacturing a highly-reliable semiconductor device, which is not damaged by external local pressure, with a high yield, a semiconductor device is manufactured by forming an element substrate having a semiconductor element formed using a single-crystal semiconductor substrate or an SOI substrate, providing the element substrate with a fibrous body formed from an organic compound or an inorganic compound, applying a composition containing an organic resin to the element substrate and the fibrous body so that the fibrous body is impregnated with the organic resin, and heating to provide the element substrate with a sealing layer in which the fibrous body formed from an organic compound or an inorganic compound is contained.
    Type: Application
    Filed: March 14, 2008
    Publication date: December 18, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
  • Patent number: 7465596
    Abstract: To provide a semiconductor device including a thinned substrate with high yield. After forming a protective layer in a predetermined portion (at least a portion covering a side surface of a substrate) of the substrate, grinding and polishing of the substrate are performed. In other words, an element layer including a plurality of integrated circuits is formed over one surface of the substrate, the protective layer is formed in contact with at least the side surface of the substrate, and the substrate is thinned (for example, the other surface of the substrate is ground and polished), the protective layer is removed, and the polished substrate and the element layer is divided so as to form stack bodies including a layer provided with at least one of the plurality of integrated circuits.
    Type: Grant
    Filed: June 19, 2006
    Date of Patent: December 16, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Patent number: 7456104
    Abstract: To provide a thin film integrated circuit at low cost and with thin thickness, which is applicable to mass production unlike the conventional glass substrate or the single crystalline silicon substrate, and a structure and a process of a thin film integrated circuit device or an IC chip having the thin film integrated circuit. A manufacturing method of a semiconductor device includes the steps of forming a first insulating film over one surface of a silicon substrate, forming a layer having at least two thin film integrated circuits over the first insulating film, forming a resin layer so as to cover the layer having the thin film integrated circuit, forming a film so as to cover the resin layer, grinding a backside of one surface of the silicon substrate which is formed with the layer having the thin film integrated circuit, and polishing the ground surface of the silicon substrate.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: November 25, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7452786
    Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: November 18, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
  • Patent number: 7453094
    Abstract: The present invention is to use a film containing fluoroplastics that is capable of forming into a lamination as a protective film for protecting a light-emitting device against moisture or gas such as oxygen so as to prevent of deterioration of the light-emitting device easier and improve reliability of the light-emitting device greater than the conventional light-emitting apparatus. In the present invention, another film can be stacked on the film containing fluoroplastics by forming irregularities by means of the surface preparation on the film containing fluoroplastics or by controlling the content of fluoroplastics in the film containing fluoroplastics.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: November 18, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Takuya Tsurume, Yuugo Goto
  • Publication number: 20080277660
    Abstract: To provide a semiconductor device capable of being easily subjected to a physical test without deteriorating characteristics. According to a measuring method of a semiconductor device in which an element layer provided with a test element including a terminal portion is sealed with first and second films having flexibility, the first film formed over the terminal portion is removed to form a contact hole reaching the terminal portion; the contact hole is filled with a resin containing a conductive material; heating is carried out after arranging a wiring substrate having flexibility over the resin with which filling has been performed so that the terminal portion and the wiring substrate having flexibility are electrically connected via the resin containing a conductive material; and a measurement is performed.
    Type: Application
    Filed: March 17, 2006
    Publication date: November 13, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Etsuko Asano
  • Publication number: 20080265376
    Abstract: It is an object of the present invention to decrease a unit cost of an IC chip and to achieve the mass-production of IC chips. According to the present invention, a substrate having no limitation in size, such as a glass substrate, is used instead of a silicon substrate. This achieves the mass-production and the decrease of the unit cost of the IC chip. Further, a thin IC chip is provided by grinding and polishing the substrate such as the glass substrate.
    Type: Application
    Filed: July 6, 2005
    Publication date: October 30, 2008
    Inventors: Takuya Tsurume, Koji Dairiki, Naoto Kusumoto
  • Publication number: 20080242005
    Abstract: In the present application, is disclosed a method of manufacturing a flexible semiconductor device having an excellent reliability and tolerance to the loading of external pressure. The method includes the steps of: forming a separation layer over a substrate having an insulating surface; forming an element layer including a semiconductor element comprising a non-single crystal semiconductor layer, over the separation layer; forming an organic resin layer over the element layer; providing a fibrous body formed of an organic compound or an inorganic compound on the organic resin layer; heating the organic resin layer; and separating the element layer from the separation layer. This method allows the formation of a flexible semiconductor device having a sealing layer in which the fibrous body is impregnated with the organic resin.
    Type: Application
    Filed: March 14, 2008
    Publication date: October 2, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Eiji Sugiyama, Hisashi Ohtani, Takuya Tsurume
  • Publication number: 20080224941
    Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a method for manufacturing a highly-reliable semiconductor device, which is not destructed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element layer having a semiconductor element formed using a non-single crystal semiconductor layer, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element layer and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are firmly fixed together.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 18, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Eiji Sugiyama, Yoshitaka Dozen, Hisashi Ohtani, Takuya Tsurume
  • Publication number: 20080224940
    Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a manufacturing method of a highly-reliable semiconductor device, which is not destroyed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element substrate having a semiconductor element formed using a single crystal semiconductor region, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element substrate and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are fixed together.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 18, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Eiji Sugiyama, Yoshitaka Dozen, Hisashi Ohtani, Takuya Tsurume
  • Publication number: 20080206959
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Application
    Filed: April 28, 2008
    Publication date: August 28, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Patent number: 7375006
    Abstract: A peeling method is provided which does not cause damage to a layer to be peeled, and the method enables not only peeling of the layer to be peeled having a small area but also peeling of the entire layer to be peeled having a large area at a high yield. Further, there are provided a semiconductor device, which is reduced in weight through adhesion of the layer to be peeled to various base materials, and a manufacturing method thereof. In particular, there are provided a semiconductor device, which is reduced in weight through adhesion of various elements, typically a TFT, to a flexible film, and a manufacturing method thereof. A metal layer or nitride layer is provided on a substrate; an oxide layer is provided contacting with the metal layer or nitride layer; then, a base insulating film and a layer to be peeled containing hydrogen are formed; and heat treatment for diffusing hydrogen is performed thereto at 410° C. or more.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: May 20, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Yumiko Ohno, Takuya Tsurume, Hideaki Kuwabara
  • Publication number: 20080096366
    Abstract: A separation layer is formed over a substrate having a depressed portion, using a silane coupling agent; a conductive layer and an insulating layer that covers the conductive layer are formed in the depressed portion over the separation layer; and a sticky member is attached to the insulating layer, then the conductive layer and the insulating layer are separated from the substrate. Alternatively, after these steps, a flexible substrate is attached to the conductive layer and the insulating layer.
    Type: Application
    Filed: September 25, 2007
    Publication date: April 24, 2008
    Inventors: Tomoyuki Aoki, Takuya Tsurume, Daiki Yamada
  • Publication number: 20080044940
    Abstract: It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.
    Type: Application
    Filed: May 31, 2005
    Publication date: February 21, 2008
    Inventors: Ryosuke Watanabe, Hidekazu Takahashi, Takuya Tsurume
  • Publication number: 20080036680
    Abstract: The present invention provides an antenna in that the adhesive intensity of a conductive body formed on a base film is increased, and a semiconductor device including the antenna. The invention further provides a semiconductor device with high reliability that is formed by attaching an element formation layer and an antenna, wherein the element formation layer is not damaged due to a structure of the antenna. The semiconductor device includes the element formation layer provided over a substrate and the antenna provided over the element formation layer. The element formation layer and the antenna are electrically connected. The antenna has a base film and a conductive body, wherein at least a part of the conductive body is embedded in the base film. As a method for embedding the conductive body in the base film, a depression is formed in the base film and the conductive body is formed therein.
    Type: Application
    Filed: October 18, 2005
    Publication date: February 14, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kyosuke Ito, Junya Maruyama, Takuya Tsurume, Shunpei Yamazaki
  • Publication number: 20080009106
    Abstract: It is an object of the invention to provide a peeling method which does not damage a peeling layer, and to perform peeling not only a peeling layer having a small-size area but also an entire peeling layer having a large-size area with a preferable yield. In the invention, after pasting a fixing substrate, a part of a glass substrate is removed by scribing or performing laser irradiation on the glass substrate which leads to providing a trigger. Then, peeling is performed with a preferable yield by performing peeling from the removed part. In addition, a crack is prevented by covering the entire face except for a connection portion of a terminal electrode (including a periphery region of the terminal electrode) with a resin.
    Type: Application
    Filed: July 9, 2007
    Publication date: January 10, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuugo Goto, Yumiko Fukumoto, Toru Takayama, Junya Maruyama, Takuya Tsurume
  • Publication number: 20080001280
    Abstract: An antenna used for an ID chip or the like is disclosed with planarized antenna unevenness and an IC chip having such the antenna with a flat surface is disclosed. Manufacturing an integrated circuit mounted with an antenna is facilitated. A laminated body formed by stacking a conductive film 11, a resin film 13, an integrated circuit 12, and a resin film 14 are rolled so that the resin film 14 is outside. Then, the laminated body is integrated in a roll form by softening the resin films 13, 14 by applying heat. By slicing the rolled laminated body along with the direction in which the rolled conductive film 31 appears in the cross section, an IC chip with antenna formed by the rolled conductive film 11 is formed.
    Type: Application
    Filed: November 4, 2005
    Publication date: January 3, 2008
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Publication number: 20070262403
    Abstract: An object of the prevent invention is to provide a semiconductor device having a conductive film, which sufficiently serves as an antenna, and a method for manufacturing thereof. The semiconductor device has an element formation layer including a transistor, which is provided over a substrate, an insulating film provided on the element formation layer, and a conductive film serving as an antenna, which is provided on the insulating film. The insulating film has a groove. The conductive film is provided along the surface of the insulating film and the groove. The groove of the insulating film may be provided to pass through the insulating film. Alternatively, a concave portion may be provided in the insulating film so as not to pass through the insulating film. A structure of the groove is not particularly limited, and for example, the groove can be provided to have a tapered shape, etc.
    Type: Application
    Filed: January 18, 2006
    Publication date: November 15, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takuya Tsurume
  • Publication number: 20070218650
    Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.
    Type: Application
    Filed: May 10, 2007
    Publication date: September 20, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
  • Publication number: 20070212875
    Abstract: An object of the present invention is to prevent a thin film integrate circuit from peeling off during the process of transferring to a base material. By a manufacturing method of the present invention, a separation layer is formed selectively on a surface of a substrate; thus, a first region where the separation layer is provided and a second region where the separation layer is not provided are formed. A thin film integrated circuit is formed over the separation layer. Then, an opening portion for exposing the separation layer is formed, en etching agent is introduced into the opening portion to remove the separation layer. Thus, a space is generated in the region provided with the separation layer, whereas a space is not generated in the region without the separation layer. Therefore, the thin film integrated circuit can be prevented from peeling off even after the separation layer is removed, by providing the region where the space is not generated after that.
    Type: Application
    Filed: June 15, 2005
    Publication date: September 13, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takuya Tsurume, Koji Dairiki