Patents by Inventor Takuya Tsurume
Takuya Tsurume has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120049340Abstract: When a semiconductor device having a surface provided with a flexible protective material is manufactured, the misalignment of the protective material occurs at the time of disposing the protective material or performing adhesion treatment. In the case where the terminal portion over the substrate has a length X of 5 mm or less, by providing a step layer with a thickness of 0.38 X or more and 2 mm or less over the element portion, a space is formed between a surface of the terminal portion and the protective material even though the protective material disposed over the step layer so as to cover the element portion is overlapped with the terminal portion. By using an attaching member including an elastic material with a surface hardness of 50 or more and 100 or less in this state, the protective material and the substrate may be attached to each other.Type: ApplicationFiled: August 25, 2011Publication date: March 1, 2012Inventors: Takuya Tsurume, Akihiro Chida
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Patent number: 8123896Abstract: It is an object of the invention to improve the production efficiency in sealing a thin film integrated circuit and to prevent the damage and break. Further, it is another object of the invention to prevent a thin film integrated circuit from being damaged in shipment and to make it easier to handle the thin film integrated circuit. The invention provides a laminating system in which rollers are used for supplying a substrate for sealing, receiving IC chips, separating, and sealing. The separation, sealing, and reception of a plurality of thin film integrated circuits can be carried out continuously by rotating the rollers; thus, the production efficiency can be extremely improved. Further, the thin film integrated circuits can be easily sealed since a pair of rollers opposite to each other is used.Type: GrantFiled: May 31, 2005Date of Patent: February 28, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Ryosuke Watanabe, Hidekazu Takahashi, Takuya Tsurume
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Patent number: 8101990Abstract: A semiconductor device is provided, which includes a first insulating layer over a first substrate, a transistor over the first insulating layer, a second insulating layer over the transistor, a first conductive layer connected to a source region or a drain region of the transistor through an opening provided in the second insulating layer, a third insulating layer over the first conductive layer, and a second substrate over the third insulating layer. The transistor comprises a semiconductor layer, a second conductive layer, and a fourth insulating layer provided between the semiconductor layer and the second conductive layer. One or plural layers selected from the first insulating layer, the second insulating layer, the third insulating layer, and the fourth insulating layer have a step portion which is provided so as not to overlap with the transistor.Type: GrantFiled: May 25, 2006Date of Patent: January 24, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuya Tsurume, Nozomi Horikoshi
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Publication number: 20120001181Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.Type: ApplicationFiled: September 14, 2011Publication date: January 5, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tomoyuki AOKI, Takuya TSURUME
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Patent number: 8080811Abstract: An evaporation donor substrate which enables only a desired evaporation material to be evaporated at the time of deposition by an evaporation method, and capable of reduction in manufacturing cost by increase in use efficiency of the evaporation material and deposition with high uniformity. An evaporation donor substrate capable of controlling laser light so that a desired position of an evaporation donor substrate is irradiated with the laser light in accordance with the wavelength of the emitted laser light at the time of evaporation. Specifically, an evaporation donor substrate in which a region which reflects laser light and a region which absorbs laser light at the time of irradiation with laser light having a wavelength of greater than or equal to 400 nm and less than or equal to 600 nm at the time of evaporation are formed.Type: GrantFiled: December 22, 2008Date of Patent: December 20, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kohei Yokoyama, Takahiro Ibe, Takuya Tsurume, Koichiro Tanaka
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Patent number: 8067294Abstract: It is an object of the invention to provide a lightweight semiconductor device having a highly reliable sealing structure which can prevent ingress of impurities such as moisture that deteriorate element characteristics, and a method of manufacturing thereof. A protective film having superior gas barrier properties (which is a protective film that is likely to damage an element if the protective film is formed on the element directly) is previously formed on a heat-resistant substrate other than a substrate with the element formed thereon. The protective film is peeled off from the heat-resistant substrate, and transferred over the substrate with the element formed thereon so as to seal the element.Type: GrantFiled: September 24, 2009Date of Patent: November 29, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Toru Takayama, Yuugo Goto, Yumiko Fukumoto, Junya Maruyama, Takuya Tsurume
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Patent number: 8058152Abstract: A method for separating an integrated circuit formed by a thin film having a novel structure or a method for transferring the integrated circuit to another substrate, that is, so-called transposing method, has not been proposed. According to the present invention, in the case that an integrated circuit having a thin film having a novel structure formed over a substrate via a release layer is separated, the release layer is removed in the state that the thin film integrated circuit is fixated, the thin film integrated circuit is transposed to a supporting substrate having an adhesion surface, and the thin film integrated circuit is transposed to another substrate having an adhesion surface with higher strength of adhesion than that of the supporting substrate.Type: GrantFiled: August 20, 2010Date of Patent: November 15, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takuya Tsurume, Junya Maruyama, Yoshitaka Dozen
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Publication number: 20110244656Abstract: It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.Type: ApplicationFiled: June 17, 2011Publication date: October 6, 2011Applicant: Semiconductor Energy Laboratory Co., Ltd. .Inventors: Koji DAIRIKI, Naoto KUSUMOTO, Takuya TSURUME
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Patent number: 8030178Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.Type: GrantFiled: November 16, 2009Date of Patent: October 4, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoyuki Aoki, Takuya Tsurume
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Publication number: 20110233556Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a method for manufacturing a highly-reliable semiconductor device, which is not destructed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element layer having a semiconductor element formed using a non-single crystal semiconductor layer, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element layer and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are firmly fixed together.Type: ApplicationFiled: June 10, 2011Publication date: September 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Eiji SUGIYAMA, Yoshitaka DOZEN, Hisashi OHTANI, Takuya TSURUME
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Publication number: 20110207292Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.Type: ApplicationFiled: May 4, 2011Publication date: August 25, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshitaka DOZEN, Tomoko TAMURA, Takuya TSURUME, Koji DAIRIKI
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Publication number: 20110171776Abstract: An antenna used for an ID chip or the like is disclosed with planarized antenna unevenness and an IC chip having such the antenna with a flat surface is disclosed. Manufacturing an integrated circuit mounted with an antenna is facilitated. A laminated body formed by stacking a conductive film 11, a resin film 13, an integrated circuit 12, and a resin film 14 are rolled so that the resin film 14 is outside. Then, the laminated body is integrated in a roll form by softening the resin films 13, 14 by applying heat. By slicing the rolled laminated body along with the direction in which the rolled conductive film 31 appears in the cross section, an IC chip with antenna formed by the rolled conductive film 11 is formed.Type: ApplicationFiled: March 22, 2011Publication date: July 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Naoto KUSUMOTO, Takuya TSURUME
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Publication number: 20110171778Abstract: A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.Type: ApplicationFiled: March 25, 2011Publication date: July 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Tomoko TAMURA, Eiji SUGIYAMA, Yoshitaka DOZEN, Koji DAIRIKI, Takuya TSURUME
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Patent number: 7972910Abstract: It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.Type: GrantFiled: May 30, 2006Date of Patent: July 5, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
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Patent number: 7968427Abstract: The present invention provides a semiconductor device which is not easily damaged by external local pressure. The present invention further provides a method for manufacturing a highly-reliable semiconductor device, which is not destructed by external local pressure, with a high yield. A structure body, in which high-strength fiber of an organic compound or an inorganic compound is impregnated with an organic resin, is provided over an element layer having a semiconductor element formed using a non-single crystal semiconductor layer, and heating and pressure bonding are performed, whereby a semiconductor device is manufactured, to which the element layer and the structure body in which the high-strength fiber of an organic compound or an inorganic compound is impregnated with the organic resin are firmly fixed together.Type: GrantFiled: March 7, 2008Date of Patent: June 28, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Eiji Sugiyama, Yoshitaka Dozen, Hisashi Ohtani, Takuya Tsurume
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Patent number: 7939385Abstract: Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.Type: GrantFiled: October 21, 2008Date of Patent: May 10, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Dozen, Tomoko Tamura, Takuya Tsurume, Koji Dairiki
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Patent number: 7927971Abstract: A release layer formed over a substrate; at least one of thin film integrated circuits is formed over the release layer; a film is formed over each of the at least one of thin film integrated circuits; and the release layer is removed by using an etchant; thus, the at least one of thin film integrated circuits is peeled from the substrate. A semiconductor device is formed by sealing the peeled thin film integrated circuit by lamination or the like.Type: GrantFiled: July 28, 2005Date of Patent: April 19, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoko Tamura, Eiji Sugiyama, Yoshitaka Dozen, Koji Dairiki, Takuya Tsurume
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Patent number: 7928554Abstract: An antenna used for an ID chip or the like is disclosed with planarized antenna unevenness and an IC chip having such the antenna with a flat surface is disclosed. Manufacturing an integrated circuit mounted with an antenna is facilitated. A laminated body formed by stacking a conductive film 11, a resin film 13, an integrated circuit 12, and a resin film 14 are rolled so that the resin film 14 is outside. Then, the laminated body is integrated in a roll form by softening the resin films 13, 14 by applying heat. By slicing the rolled laminated body along with the direction in which the rolled conductive film 31 appears in the cross section, an IC chip with antenna formed by the rolled conductive film 11 is formed.Type: GrantFiled: November 4, 2005Date of Patent: April 19, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoto Kusumoto, Takuya Tsurume
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Publication number: 20110084321Abstract: It is an object of the present invention to provide a semiconductor device where, even in a case of stacking a plurality of semiconductor elements provided over a substrate, the stacked semiconductor elements can be electrically connected through the substrate, and a manufacturing method thereof. According to one feature of the present invention, a method for manufacturing a semiconductor device includes the steps of selectively forming a depression in an upper surface of a substrate or forming an opening which penetrates the upper surface through a back surface; forming an element group having a transistor so as to cover the upper surface of the substrate and the depression, or the opening; and exposing the element group formed in the depression or the opening by thinning the substrate from the back surface.Type: ApplicationFiled: December 17, 2010Publication date: April 14, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Takuya TSURUME, Yoshitaka DOZEN
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Publication number: 20110033987Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.Type: ApplicationFiled: October 20, 2010Publication date: February 10, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Koji DAIRIKI, Naoto KUSUMOTO, Takuya TSURUME