Patents by Inventor Tatsuo Nishizawa
Tatsuo Nishizawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150371660Abstract: The present invention addresses the problems of enabling a process of converting voice data playback speed even in a voice data playback device alone.Type: ApplicationFiled: January 21, 2014Publication date: December 24, 2015Inventors: Shoji TSUNODA, Tatsuo NISHIZAWA
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Publication number: 20150371931Abstract: A semiconductor device includes a frame including a first step portion provided in a ring shape in an inner circumference of one main surface of the frame, a second step portion provided in a ring shape in an inner circumference of another main surface of the frame, and an inner wall provided between the first step portion and the second step portion; a terminal leading from the first step portion to outside; a circuit board fitted to the second step portion; and an adhesive resin bonding the second step portion and the circuit board, and contacting the inner wall and the terminal.Type: ApplicationFiled: September 1, 2015Publication date: December 24, 2015Inventors: Yuhei NISHIDA, Tatsuo NISHIZAWA, Masanori TANAKA
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Publication number: 20150187671Abstract: A semiconductor device according to the invention includes an insulating substrate including an insulating plate, a circuit pattern that is formed on a front surface of the insulating plate, and a radiator plate that is fixed to a rear surface of the insulating plate, a semiconductor chip that is fixed to the circuit pattern, an external lead terminal that is connected to a surface electrode of the semiconductor chip through a wiring line, a molding resin that covers the insulating substrate, the semiconductor chip, the wiring line, and the external lead terminal such that a rear surface of the radiator plate and a portion of the external lead terminal are exposed, and an anchor layer including a stripe-shaped concave portion which is formed in the circuit pattern by laser beam irradiation.Type: ApplicationFiled: March 12, 2015Publication date: July 2, 2015Inventors: Kyohei FUKUDA, Tatsuo NISHIZAWA, Yuhei NISHIDA, Eiji MOCHIZUKI
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Patent number: 8944310Abstract: A soldering method achieves little void and good joint condition in soldering an insulated circuit board and a semiconductor chip using a tin-high antimony solder material. A method of manufacturing a semiconductor device includes the steps of preparing a solder plate having a U-shape; mounting the solder plate on a substrate; mounting a semiconductor chip on the solder plate; fusing the solder plate in a reducing gas atmosphere; and reducing a pressure of the reducing gas atmosphere to a pressure lower than the atmospheric pressure when melting the solder plate.Type: GrantFiled: February 7, 2014Date of Patent: February 3, 2015Assignee: Fuji Electric Co., Ltd.Inventors: Takeshi Matsushita, Eiji Mochizuki, Tatsuo Nishizawa, Shunsuke Saito
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Publication number: 20140374896Abstract: A semiconductor device is fastened to a heat dissipation member such that a force directed downward acts from a metal substrate onto the heat dissipation member, with a rim portion of a storage region as a fulcrum with respect to the heat dissipation member. As a result, a heat conductive material can be spread into a thinner layer between the metal substrate and the heat dissipation member, improving the heat dissipation between the metal substrate and the heat dissipation member.Type: ApplicationFiled: September 11, 2014Publication date: December 25, 2014Inventors: Yuhei NISHIDA, Tatsuo NISHIZAWA
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Publication number: 20140374775Abstract: A first metal film, of which major component is copper, is formed on a surface of a conductive portion which becomes a front surface electrode of a semiconductor element. A second metal film of which major component is silver is formed on a surface of the first metal film. A metal plate, which electrically connects the conductive portion and the other members (e.g. a circuit pattern of an insulated substrate) is bonded with a surface of the second metal film via a bonding layer containing silver particles. The second metal film does not contain nickel which decreases the bonding strength between the second metal film and the bonding layer containing silver particles. With the above configuration, an electronic component having a high bonding strength, excellent heat resistance and radiation performance, and a manufacturing method for the electronic component can be provided.Type: ApplicationFiled: September 10, 2014Publication date: December 25, 2014Inventors: Takashi SAITO, Tatsuo NISHIZAWA, Yoshito KINOSHITA, Norihiro NASHIDA
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Publication number: 20140312102Abstract: A method for manufacturing a semiconductor device, includes preparing a solder, a soldering article, a base material, a weigh having a foot where a center of gravity of the weight is shifted from a center of the soldering article, a positioning jig having a hole for holding the soldering article in the base material, and a dam member; disposing the dam member on a side having a relatively lower height due to a warp of an edge portion of the base material; placing the positioning jig on a principal surface of the base material; placing the soldering article on the solder in the hole; placing the weight on an upper surface of the soldering article to position the center of gravity on the side having relatively lower height; and raising the temperature of the solder to a temperature equal to or higher than the melting point of the solder.Type: ApplicationFiled: April 11, 2014Publication date: October 23, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Shinji SANO, Tatsuo NISHIZAWA
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Publication number: 20140301769Abstract: A thermocompression bonding structure includes a first member and a second member having a linear expansion coefficient different from that of the first member; and metal fine particles interposed between the first and second members as a bonding material to thermocompression bond the two members. The two members are disposed to apply thermal stress generating between the first member and the second member as pressurizing force on a bonding surface between the two members, and to increase temperature to thermocompression bond the first member and the second member.Type: ApplicationFiled: March 25, 2014Publication date: October 9, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Yoshito KINOSHITA, Eiji MOCHIZUKI, Tatsuo NISHIZAWA, Shinji TADA
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Publication number: 20140246783Abstract: A semiconductor device is disclosed in which an implant board and a semiconductor element of a semiconductor mounting board are bonded and electrically connected through implant pins and which can be manufactured with high productivity. Implant pins are bonded to a semiconductor element and/or a circuit pattern of a semiconductor mounting board through cylindrical terminals press-fitted into the other ends of the implant pins. Press-fitting depth L2 of each of the implant pins into corresponding cylindrical terminals is adjustable, so that total length of the implant pin and cylindrical terminal which are press-fitted to each other matches up with the distance between the semiconductor element and/or the circuit pattern on the semiconductor mounting board and an implant board.Type: ApplicationFiled: May 12, 2014Publication date: September 4, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Tatsuo NISHIZAWA, Shinji TADA, Yoshito KINOSHITA, Yoshinari IKEDA, Eiji MOCHIZUKI
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Publication number: 20140224862Abstract: A soldering method achieves little void and good joint condition in soldering an insulated circuit board and a semiconductor chip using a tin—high antimony solder material. A method of manufacturing a semiconductor device includes the steps of preparing a solder plate having a U-shape; mounting the solder plate on a substrate; mounting a semiconductor chip on the solder plate; fusing the solder plate in a reducing gas atmosphere; and reducing a pressure of the reducing gas atmosphere to a pressure lower than the atmospheric pressure when melting the solder plate.Type: ApplicationFiled: February 7, 2014Publication date: August 14, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Takeshi MATSUSHITA, Eiji MOCHIZUKI, Tatsuo NISHIZAWA, Shunsuke SAITO
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Publication number: 20140001636Abstract: Plating pre-processing is carried out before carrying out a plating process on the surface of a conducting section provided on a semiconductor wafer. A first metal film is formed on the surface of the conducting section by NiP alloy plating process. A second metal film is formed on the surface of the first metal film by immersion Ag plating process. The semiconductor wafer is diced and cut into semiconductor chips. A conductive composition containing Ag particles is applied to the surface of the second metal film which is on the front surface of the semiconductor chip. A bonding layer containing Ag particles is formed by sintering the conductive composition through heating. A metal plate is then bonded to the surface of the second metal film via the bonding layer containing Ag particles. The electronic component has high bonding strength, excellent thermal resistance and heat radiation properties.Type: ApplicationFiled: September 6, 2013Publication date: January 2, 2014Applicant: FUJI ELECTRIC CO., LTD.Inventors: Takashi SAITO, Tatsuo NISHIZAWA, Yoshito KINOSHITA, Norihiro NASHIDA
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Patent number: 8273644Abstract: A soldering method of soldering first and second members includes shooting a laser light to at least one part of an outer peripheral portion surrounding a soldering-target region of the first member thereby to form an oxide film, and bonding the second member with the soldering-target region through a solder. According to the method, the solder resist is never exfoliated even after cleaning with chemicals for removing flux residues contained in solder.Type: GrantFiled: February 26, 2008Date of Patent: September 25, 2012Assignee: Fuji Electric Co., Ltd.Inventors: Kazunaga Onishi, Yoshitaka Nishimura, Tatsuo Nishizawa, Eiji Mochizuki
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Patent number: 7985630Abstract: A method for manufacturing a semiconductor module, includes the steps of preparing a board; mounting a semiconductor device on the second metal foil; placing a resin case onto the board for surrounding a first metal foil, an insulating sheet, the second metal foil, and the semiconductor device; pouring a resin in a paste form into the case to fill a space relative to the first metal foil, insulating sheet, the second metal foil and the semiconductor device; and heat-curing the resin. A bottom end of a peripheral wall of the case is located above a bottom surface of the first metal. The bottom surface of the first metal foil and the resin form a flat bottom surface to contact an external mounting member.Type: GrantFiled: November 9, 2010Date of Patent: July 26, 2011Assignee: Fuji Electric Device Technology Co., Ltd.Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
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Patent number: 7944042Abstract: A semiconductor device includes an outer resin case having a peripheral wall and terminal mounting holes formed in the peripheral wall, and a layer assembly provided in the outer resin case. The layer assembly includes a semiconductor chip, an insulating circuit board on which the semiconductor chip is mounted, and a heat-dissipating metal base. External terminals having leg portions are arranged in mounting holes of the peripheral wall, and are press-fitted into the terminal-mounting holes. Bonding wires connect the terminal leg portions and a conductive pattern of the insulating circuit board or the semiconductor chip.Type: GrantFiled: February 12, 2008Date of Patent: May 17, 2011Assignee: Fuji Electric Device Technology Co., Ltd.Inventors: Katsuhiko Yoshihara, Rikihiro Maruyama, Masaaki Chino, Eiji Mochizuki, Motokiyo Yokoyama, Tatsuo Nishizawa, Tomonobu Sugiyama
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Publication number: 20110059581Abstract: A method for manufacturing a semiconductor module, includes the steps of preparing a board; mounting a semiconductor device on the second metal foil; placing a resin case onto the board for surrounding a first metal foil, an insulating sheet, the second metal foil, and the semiconductor device; pouring a resin in a paste form into the case to fill a space relative to the first metal foil, insulating sheet, the second metal foil and the semiconductor device; and heat-curing the resin. A bottom end of a peripheral wall of the case is located above a bottom surface of the first metal. The bottom surface of the first metal foil and the resin form a flat bottom surface to contact an external mounting member.Type: ApplicationFiled: November 9, 2010Publication date: March 10, 2011Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
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Patent number: 7902653Abstract: A semiconductor module includes a first metal foil; an insulating sheet mounted on a top surface of the first metal foil; at least one second metal foil mounted on a top surface of the insulating sheet; at least one semiconductor device mounted on the second metal foil; and a resin case for surrounding the first metal foil, insulating sheet, second metal foil, and semiconductor device. A bottom end of a peripheral wall of the resin case is located above a bottom surface of the first metal foil. A resin is provided inside the resin case to fill the inside of the resin case. The bottom surface of the first metal foil and the resin form a flat bottom surface so that the flat bottom surface contacts an external mounting member.Type: GrantFiled: April 28, 2008Date of Patent: March 8, 2011Assignee: Fuji Electric Systems Co., Ltd.Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
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Publication number: 20080284007Abstract: A semiconductor module includes a first metal foil; an insulating sheet mounted on a top surface of the first metal foil; at least one second metal foil mounted on a top surface of the insulating sheet; at least one semiconductor device mounted on the second metal foil; and a resin case for surrounding the first metal foil, insulating sheet, second metal foil, and semiconductor device. A bottom end of a peripheral wall of the resin case is located above a bottom surface of the first metal foil. A resin is provided inside the resin case to fill the inside of the resin case. The bottom surface of the first metal foil and the resin form a flat bottom surface so that the flat bottom surface contacts an external mounting member.Type: ApplicationFiled: April 28, 2008Publication date: November 20, 2008Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.Inventors: Masafumi Horio, Tatsuo Nishizawa, Eiji Mochizuki, Rikihiro Maruyama
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Publication number: 20080217760Abstract: A semiconductor device includes an outer resin case having a peripheral wall and terminal mounting holes formed in the peripheral wall, and a layer assembly provided in the outer resin case. The layer assembly includes a semiconductor chip, an insulating circuit board on which the semiconductor chip is mounted, and a heat-dissipating metal base. External terminals having leg portions are arranged in mounting holes of the peripheral wall, and are press-fitted into the terminal-mounting holes. Bonding wires connect the terminal leg portions and a conductive pattern of the insulating circuit board or the semiconductor chip.Type: ApplicationFiled: February 12, 2008Publication date: September 11, 2008Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.Inventors: Katsuhiko Yoshihara, Rikihiro Maruyama, Masaaki Chino, Eiji Mochizuki, Motokiyo Yokoyama, Tatsuo Nishizawa, Tomonobu Sugiyama
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Publication number: 20080206928Abstract: A soldering method of soldering first and second members includes shooting a laser light to at least one part of an outer peripheral portion surrounding a soldering-target region of the first member thereby to form an oxide film, and bonding the second member with the soldering-target region through a solder. According to the method, the solder resist is never exfoliated even after cleaning with chemicals for removing flux residues contained in solder.Type: ApplicationFiled: February 26, 2008Publication date: August 28, 2008Applicant: FUJI ELECTRIC DEVICE TECHNOLOGY CO., LTD.Inventors: Kazunaga ONISHI, Yoshitaka NISHIMURA, Tatsuo NISHIZAWA, Eiji MOCHIZUKI
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Patent number: D689833Type: GrantFiled: November 18, 2011Date of Patent: September 17, 2013Assignee: Fuji Electric Co., Ltd.Inventors: Motohito Hori, Tatsuo Nishizawa, Yoshinari Ikeda, Eiji Mochizuki