Abstract: Methods and semiconductor devices are described herein which eliminate the use of additional masks. A first interconnect layer is formed. A first resistive layer is formed on top of the first interconnect layer. A dielectric layer is formed on top of the first resistive layer. A second resistive layer is formed on top of the dielectric layer.

Abstract: A fastener for a grooved joint between furniture panels is disclosed, including a connecting rod having an outer periphery which includes a first peripheral section and a second peripheral section, where the first peripheral section is a geometric cross section and the second peripheral section is of an arc shape; the first peripheral section and the second peripheral section are connected end to end; and a face of one end of the connecting rod is provided with an installation recess for turning the fastener for a grooved joint between furniture panels; an outer surface of the connecting rod is provided with a thread and a stop perpendicular to a direction of the thread; and the other end of the connecting rod is provided with a ratchet. The fastener is convenient to install and uninstall and does not damage back panels or installation panels.

Abstract: In general, the subject matter described in the specification can be embodied in methods, systems and program products for an improved review system with location-verified reviews. The system verifies a user's location using one or more available sources, such as geographic location by global positioning system (GPS), cellular localization systems, or wireless local area network (WLAN). The user confirms the business or attraction at the current geographic location that the user would like to review. The system then accepts a review of the business or attraction at the current geographic location. The review is indexed for retrieval. Preferably, the system includes a delay before indexing a review, wherein the management of the business or attraction is notified of the review so that it can respond to any complaints in the review before it is made available for retrieval.

Abstract: A photoelectric device includes a target substrate, a circuit pattern layer disposed on the target substrate, a plurality of micro photoelectric elements electrically connected to the circuit pattern layer, and a supplemental repair element electrically connected to the circuit pattern layer. The target substrate is configured with a plurality of connection positions and a repair position disposed with an offset with relative to a corresponding one of the connection positions. The offset is greater than or equal to zero. The micro photoelectric elements are individually disposed on at least a part of the connection positions of the target substrate. The supplemental repair element has an electrode disposed on the repair position of the target substrate, and the electrode is connected to the circuit pattern layer. On the target substrate, the supplemental repair element is arbitrary with respect to the micro photoelectric elements.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The method includes forming an isolation structure in a substrate to define an isolating region and forming a capacitor structure on an upper surface of the isolation structure and comprising a first semiconductor structure and a second semiconductor structure separated by an insulator pattern. The first semiconductor structure and the second semiconductor structure are formed with upper surfaces aligned with one another.

Abstract: A hair dryer comprises a fan, a heater, a temperature sensor, and a controller. The heater is disposed at the airflow output end of the fan and used to heat the airflow output by the fan. The temperature sensor is pointed to the hair, receiving the infrared light radiated by the hair to obtain the temperature of the hair, determining the dryness of the hair according to at least one of the temperature of the hair and the rate of temperature variation of the hair, and outputting a corresponding control signal. The controller is electrically connected with the fan, the heater and the temperature sensor, and controlling at least one of the rotation speed of the fan and the heating power of the heater according to the control signal. The above-mentioned hair dryer not only can prevent from hair overheating and hair damage but also can shorten the time for drying hair.

Abstract: A method (of forming a semiconductor device) includes: forming an active area structure extending in a first direction; forming gate structures over the active area structure and extending in a second direction substantially perpendicular to the first direction; forming contact-source/drain (CSD) conductors over the active area structure, interleaved with corresponding ones of the gate structures, and extending in the second direction; and forming first conductive segments in a first layer of metallization (M_lst layer) over the active area structure and extending in the first direction, the first conductive segments including a first gate-signal-carrying (GSC) conductor which overlaps the active area structure.

Abstract: Methods and semiconductor devices are described herein which eliminate the use of additional masks. A first interconnect layer is formed. A first resistive layer is formed on top of the first interconnect layer. A dielectric layer is formed on top of the first resistive layer. A second resistive layer is formed on top of the dielectric layer.

Abstract: An image detector includes a substrate, a circuit layer, a plurality of light detecting elements, a plurality of driving elements and a crystal scintillation layer. The substrate has a surface. The circuit layer is arranged on the surface of the substrate, and defines a plurality of detecting areas arranged in an array. The light detecting elements and the driving elements are disposed at the detecting areas and electrically connected with the circuit layer. Each driving element drives one or more of the light detecting elements. The crystal scintillation layer is arranged opposite to the substrate and covers the detecting areas. The light detecting elements and the driving elements connect with the surface of the substrate. At least one of the light detecting elements and the driving elements is formed by a process different from the process of forming the circuit layer on the substrate.

Abstract: A method for forming an integrated circuit includes following operations. A substrate having a first region, a second region and an isolation structure is received. A portion of the substrate is removed such that the second region is recessed. A portion of the isolation structure is removed to obtain a first top surface, a second top surface lower than the first top surface, and a boundary between the first top surface and the second top surface. A first device is formed in the first region, a second device is formed in the second region, and a dummy structure is formed over the first top surface, the second top surface and the boundary. A dielectric structure is formed over the substrate. A top surface of the first device, a top surface of the second device and a top surface of the dummy structure are aligned with each other.

Abstract: A bumped solder pad and methods for adding bumps to a solder pad are provided. A substrate is provided having metal layer formed thereon and a solder pad formed from a portion of the metal layer. A surface treatment is applied to the solder pad. The surface treatment is patterned. The surface treatment is etched to produce at least one bump on the solder pad.

Abstract: The present disclosure provides a semiconductor device, including a substrate, a first active region in the substrate, a second active region in the substrate and adjacent to the first active region, an isolation region in the substrate and between the first active region and the second active region, and a dummy gate overlapping with the isolation region, wherein an entire bottom width of the dummy gate is greater than an entire top width of the isolation region.

Abstract: A method of using an optoelectronic semiconductor stamp to manufacture an optoelectronic semiconductor device comprises the following steps: a preparation step: preparing at least one optoelectronic semiconductor stamp group and a target substrate, wherein each optoelectronic semiconductor stamp group comprises at least one optoelectronic semiconductor stamp, each optoelectronic semiconductor stamp comprises a plurality of optoelectronic semiconductor components disposed on a heat conductive substrate, each optoelectronic semiconductor component has at least one electrode, and the target substrate has a plurality of conductive portions; an align-press step: aligning and attaching at least one optoelectronic semiconductor stamp to the target substrate, so that the electrodes are pressed on the corresponding conductive portions; and a bonding step: electrically connecting the electrodes to the corresponding conductive portions.

Abstract: A light source device, including a first light source, providing a first light beam in a first time period of a first period; and a second light source, providing a second light beam in a second time period of the first period, is provided. The first light beam and the second light beam have the same color temperature. The first light beam and the second light beam are emitted alternately in the first period, and a color rendering index of mixed light of the first light beam and the second light beam is greater than or equal to 85.

Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device has a substrate having an isolation structure therein and a capacitor structure located on an upper top surface of the isolation structure. The capacitor structure comprises a first semiconductor structure and a second semiconductor structure respectively disposed on the upper surface of the isolation structure and separated by an insulator pattern.

Abstract: In a method of manufacturing a semiconductor device, an isolation structure is formed in a substrate defining an active region, a first gate structure is formed over the isolation structure and a second gate structure over the active region adjacent to the first gate structure, a cover layer is formed to cover the first gate structure and a part of the active region between the first gate structure and the second gate structure, the active region between the first gate structure and the second gate structure not covered by the cover layer is etched to form a recess, and an epitaxial semiconductor layer is formed in the recess.

Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate including a well region and an adjustment region over the well region. An isolation structure is disposed over the substrate and at least partially surrounds the well region and the adjustment region. An epitaxial layer is disposed over the adjustment region and surrounded by the isolation structure. A gate structure is disposed on the epitaxial layer. The present disclosure also provides a method for forming a semiconductor structure.

Abstract: Provided is a semiconductor device including a substrate, an isolation structure, a gate dielectric layer, a high-k dielectric layer, and a protection cap. The substrate includes a first region, a second region, and a transition region located between the first region and the second region. The isolation structure, located in the transition region. The gate dielectric layer is located on the isolation structure. The high-k dielectric layer is located on the isolation structure and extended to cover a sidewall and a surface of the gate dielectric layer. The protection cap is located on a surface and sidewalls of the high-k dielectric layer.

Abstract: A semiconductor device may include a first device on a first portion of a substrate, a second device on a second portion of the substrate, and a third device on a third portion of the substrate. The third device may include an oxide layer that is formed from an oxide layer that is a sacrificial oxide layer for the first device and the second device. The third device may include a gate provided on the oxide layer, a set of spacers provided on opposite sides of the gate, and a source region provided in the third portion of the substrate on one side of the gate. The third device may include a drain region provided in the third portion of the substrate on another side of the gate, and a protective oxide layer provided on a portion of the gate and a portion of the drain region.

Abstract: An electronic device comprises a target substrate, a micro semiconductor structure array, a conductor array, and a connection layer. The micro semiconductor structure array is disposed on the target substrate. The conductor array corresponds to the micro semiconductor structure array, and electrically connects the micro semiconductor structure array to a pattern circuit of the target substrate. The conductors of the conductor array are independent from one another. Each conductor is an integrated member formed by eutectic bonding a conductive pad of the target substrate and a conductive electrode of the corresponding one of the micro semiconductor structures of the micro semiconductor structure array. The connection layer connects the micro semiconductor structures to the target substrate. The connection layer excludes a conductive material. The connection layer contacts and surrounds the conductors, so that the connection layer and the conductors together form a one-layer structure.