Patents by Inventor Tetsuzo Ueda

Tetsuzo Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110211607
    Abstract: An object of the present invention is to provide a nitride semiconductor device which shifts a luminescence wavelength toward a longer wavelength side without decreasing luminescence efficiency, and the nitride semiconductor device according to an implementation of the present invention includes: a GaN layer having a (0001) plane and a plane other than the (0001) plane; and an InGaN layer which contacts the GaN layer and includes indium, and the InGaN layer has a higher indium composition ratio in a portion that contacts the plane other than the (0001) plane than in a portion that contacts the (0001) plane.
    Type: Application
    Filed: May 11, 2011
    Publication date: September 1, 2011
    Applicant: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda
  • Patent number: 8003975
    Abstract: A semiconductor integrated circuit device includes: a semiconductor layer having a principal surface on which a source electrode, a drain electrode and a gate electrode are formed and having a first through hole; an insulating film formed in contact with the semiconductor layer and having a second through hole; a first interconnection formed on the semiconductor layer through the first through hole and connected to one of the source electrode, the drain electrode and the gate electrode which is exposed in the first through hole; and a second interconnection formed on the insulating film through the second through hole and connected to another of the source electrode, the drain electrode and the gate electrode which is exposed in the second through hole. The first interconnection and the second interconnection face each other and form a microstrip line.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: August 23, 2011
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Tsuyoshi Tanaka
  • Patent number: 8004011
    Abstract: A material of a gate electrode is a conductive oxide having a higher work function than that of conventionally used Pd and so on, thereby achieving a normally-off transistor without reducing the sheet carrier concentration of a heterojunction. It is thus possible to achieve a normally-off operation while reducing an increase in the specific on-state resistance.
    Type: Grant
    Filed: July 14, 2010
    Date of Patent: August 23, 2011
    Assignee: Panasonic Corporation
    Inventors: Tatsuo Morita, Tetsuzo Ueda
  • Publication number: 20110175142
    Abstract: A nitride semiconductor device includes a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer, and having a wider bad gap than the first nitride semiconductor layer; a source electrode, a drain electrode, and a gate electrode, which are formed on the second nitride semiconductor layer; a high resistive layer formed lower than the first nitride semiconductor layer; a conductive layer formed under and in contact with the high resistive layer; a lower insulating layer formed under the conductive layer; and a bias terminal electrically connected to the conductive layer.
    Type: Application
    Filed: August 26, 2009
    Publication date: July 21, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Naohiro Tsurumi, Satoshi Nakazawa, Tetsuzo Ueda
  • Patent number: 7974322
    Abstract: A nitride semiconductor laser device includes: a substrate made of silicon in which a plane orientation of a principal surface is a {100} plane; and a semiconductor laminate that includes a plurality of semiconductor layers formed on the substrate and includes a multiple quantum well active layer, each of the plurality of semiconductor layers being made of group III-V nitride. The semiconductor laminate has a plane parallel to a {011} plane which is a plane orientation of silicon as a cleavage face and the cleavage face constructs a facet mirror.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: July 5, 2011
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Daisuke Ueda
  • Patent number: 7956368
    Abstract: An LED bare chip which is one type of a semiconductor light emitting device (2) includes a multilayer epitaxial structure (6) composed of a p-GaN layer (12), an InGaN/GaN MQW light emitting layer (14) and an n-GaN layer (16). A p-electrode (18) is formed on the p-GaN layer (12), and an n-electrode (20) is formed on the n-GaN layer (16). An Au plating layer (4) is formed on the p-electrode (18). The Au plating layer (4) supports the multilayer epitaxial structure (6) and conducts heat generated in the light emitting layer (14). The Au plating layer (4) is electrically divided into two portions by a polyimide member (10). One of the two portions (4A) is connected to the p-electrode (18), to be constituted as an anode power supply terminal, and the other portion (4K) is connected to the n-electrode (20) by a wiring (22), to be constituted as a cathode power supply terminal.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Hideo Nagai, Tetsuzo Ueda, Masaaki Yuri
  • Patent number: 7956383
    Abstract: A field effect transistor includes: a first nitride semiconductor layer having a plane perpendicular to a (0001) plane or a plane tilted with respect to the (0001) plane as a main surface; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider bandgap than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and a source electrode and a drain electrode formed so as to contact at least a part of the second nitride semiconductor layer or the third nitride semiconductor layer. A recess that exposes a part of the second nitride semiconductor layer is formed between the source electrode and the drain electrode in the third nitride semiconductor layer. A gate electrode is formed in the recess and an insulating film is formed between the third nitride semiconductor layer and the gate electrode.
    Type: Grant
    Filed: April 1, 2008
    Date of Patent: June 7, 2011
    Assignee: Panasonic Corporation
    Inventors: Masayuki Kuroda, Tetsuzo Ueda
  • Publication number: 20110114967
    Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.
    Type: Application
    Filed: January 20, 2011
    Publication date: May 19, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masahiro HIKITA, Tetsuzo UEDA, Manabu YANAGIHARA, Yasuhiro UEMOTO, Tsuyoshi TANAKA
  • Patent number: 7936049
    Abstract: It is an object of the present invention to provide a nitride semiconductor device with low parasitic resistance by lowering barrier height to reduce contact resistance at an interface of semiconductor and metal. The nitride semiconductor device includes a GaN layer, a device isolation layer, an ohmic electrode, an n-type Al0.25Ga0.75N layer, a sapphire substrate, and a buffer layer. A main surface of the n-type Al0.25Ga0.75N layer is on (0 0 0 1) plane as a main surface, and concaves are arranged in a checkerboard pattern on the surface. The ohmic electrode contacts the sides of the concaves of the n-type Al0.25Ga0.75N layer, and the sides of the concaves are on non-polar surfaces such as (1 1 ?2 0) plane or (1 ?1 0 0) plane.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: May 3, 2011
    Assignee: Panasonic Corporation
    Inventors: Masayuki Kuroda, Tetsuzo Ueda
  • Publication number: 20110073910
    Abstract: The nitride semiconductor material according to the present invention includes a group III nitride semiconductor and a group IV nitride formed on the group III nitride semiconductor, where an interface between the group III nitride semiconductor and the group IV nitride has a regular atomic arrangement. Moreover, an arrangement of nitrogen atoms of the group IV nitride in the interface and an arrangement of group III atoms of the group III nitride semiconductor in the interface may be substantially identical.
    Type: Application
    Filed: December 8, 2010
    Publication date: March 31, 2011
    Applicant: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda
  • Patent number: 7915646
    Abstract: The nitride semiconductor material according to the present invention includes a group III nitride semiconductor and a group IV nitride formed on the group III nitride semiconductor, where an interface between the group III nitride semiconductor and the group IV nitride has a regular atomic arrangement. Moreover, an arrangement of nitrogen atoms of the group IV nitride in the interface and an arrangement of group III atoms of the group III nitride semiconductor in the interface may be substantially identical.
    Type: Grant
    Filed: April 23, 2007
    Date of Patent: March 29, 2011
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda
  • Publication number: 20110058586
    Abstract: A projection/recess structure is formed on a base substrate, and a layered structure of a nitride semiconductor laser is formed on the projection/recess structure. InGaN used for an active layer has an In intake efficiency and a growth rate that greatly vary with the plane direction. By use of this characteristic, an active layer structure low in In content and small in well layer thickness can be formed at a light-outgoing end facet by one-time crystal growth, and thus the transition wavelength of the active layer near the light-outgoing end facet can be shortened. As a result, since optical damage due to light absorption at the light-outgoing end facet can be greatly reduced, a nitride semiconductor laser capable of performing high light-output operation can be implemented.
    Type: Application
    Filed: January 21, 2009
    Publication date: March 10, 2011
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda
  • Patent number: 7898002
    Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a larger band gap energy than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer and including a p-type nitride semiconductor with at least a single-layer structure; a gate electrode formed on the third nitride semiconductor layer; and a source electrode and a drain electrode formed in regions located on both sides of the gate electrode, respectively. The third nitride semiconductor layer has a thickness greater in a portion below the gate electrode than in a portion below the side of the gate electrode.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: March 1, 2011
    Assignee: Panasonic Corporation
    Inventors: Masahiro Hikita, Tetsuzo Ueda, Manabu Yanagihara, Yasuhiro Uemoto, Tsuyoshi Tanaka
  • Publication number: 20110037101
    Abstract: A semiconductor device includes an undoped GaN layer (13), an undoped AlGaN layer (14), and a p-type GaN layer (15). In the p-type GaN layer (15), highly resistive regions (15a) are selectively formed. Resistance of the highly resistive regions (15a) can be increased by introducing a transition metal, for example, titanium.
    Type: Application
    Filed: March 27, 2009
    Publication date: February 17, 2011
    Inventors: Kazushi Nakazawa, Toshiyuki Takizawa, Tetsuzo Ueda, Daisuke Ueda
  • Publication number: 20110037100
    Abstract: A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer.
    Type: Application
    Filed: October 26, 2010
    Publication date: February 17, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masahiro HIKITA, Tetsuzo UEDA
  • Publication number: 20110024797
    Abstract: In FET, a second nitride semiconductor layer is provided on a first nitride semiconductor layer, and a source electrode and a drain electrode are each provided to have at least a portion thereof in contact with the second nitride semiconductor layer. A concave portion is formed in the upper surface of the second nitride semiconductor layer to be located between the source electrode and the drain electrode. A gate electrode is provided over the concave portion to cover the opening of the concave portion.
    Type: Application
    Filed: October 13, 2010
    Publication date: February 3, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Kazushi NAKAZAWA, Satoshi NAKAZAWA, Tetsuzo UEDA, Tsuyoshi TANAKA, Masahiro HIKITA
  • Publication number: 20110012169
    Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.
    Type: Application
    Filed: February 2, 2009
    Publication date: January 20, 2011
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda, Manabu Usuda
  • Publication number: 20110012173
    Abstract: A semiconductor device includes an undoped GaN layer (103) formed on a substrate (101), an undoped AlGaN layer (104) formed on the undoped GaN layer (103) and having a band gap energy larger than that of the undoped GaN layer (103), a p-type AlGaN layer (105) and a high-concentration p-type GaN layer (106) formed on the undoped AlGaN layer (104), and an n-type AlGaN layer (107) formed on the high-concentration p-type GaN layer (106). A gate electrode (112) which makes ohmic contact with the high-concentration p-type GaN layer (106) is formed on the high-concentration p-type GaN layer (106) in a region thereof exposed through an opening (107a) formed in the n-type AlGaN layer (107).
    Type: Application
    Filed: January 23, 2009
    Publication date: January 20, 2011
    Inventors: Hidekazu Umeda, Masahiro Hikita, Tetsuzo Ueda, Tsuyoshi Tanaka, Daisuke Ueda
  • Patent number: 7873090
    Abstract: A surface emitting laser includes a plurality of light-emitting portions for emitting laser light beams in different linearly polarized light directions. The light-emitting portions are formed on the substrate and located close to each other. The light-emitting portions include metal opening arrays through which light beams in different linearly polarized light directions respectively pass.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: January 18, 2011
    Assignee: Panasonic Corporation
    Inventors: Toshikazu Onishi, Tetsuzo Ueda, Daisuke Ueda
  • Patent number: 7863649
    Abstract: A nitride semiconductor device includes: first through third nitride semiconductor layers formed in sequence over a substrate. The second nitride semiconductor layer has a band gap energy larger than that of the first nitride semiconductor layer. The third nitride semiconductor layer has an opening. A p-type fourth nitride semiconductor layer is formed so that the opening is filled therewith. A gate electrode is formed on the fourth nitride semiconductor layer.
    Type: Grant
    Filed: December 10, 2008
    Date of Patent: January 4, 2011
    Assignee: Panasonic Corporation
    Inventors: Masahiro Hikita, Tetsuzo Ueda