Patents by Inventor Tien Chiu

Tien Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor package having through holes for molding back side of package
    Patent number: 7952179
    Abstract: A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the holes, and down into a recessed section formed in the bottom mold cap plate to form a projection of mold compound on the bottom surface of the substrate.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: May 31, 2011
    Assignee: SanDisk Corporation
    Inventors: Chin-Tien Chiu, Hem Takiar, Chih-Chin Liao, Cheemen Yu, Ning Ye, Jack Chang Chien
  • Semiconductor die having a redistribution layer
    Patent number: 7939944
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: July 26, 2010
    Date of Patent: May 10, 2011
    Assignee: SanDisk Corporation
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheeman Yu, Hem Takiar
  • Method of fabricating a semiconductor package having through holes for molding back side of package
    Patent number: 7939382
    Abstract: A portable memory card and methods of manufacturing same are disclosed. The portable memory includes a substrate having a plurality of holes formed therein. During the encapsulation process, mold compound flows over the top surface of the substrate, through the holes, and down into a recessed section formed in the bottom mold cap plate to form a projection of mold compound on the bottom surface of the substrate.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: May 10, 2011
    Assignee: SanDisk Corporation
    Inventors: Chin-Tien Chiu, Hem Takiar, Chih-Chin Liao, Cheemen Yu, Ning Ye, Jack Chang Chien
  • SEMICONDUCTOR DIE HAVING A REDISTRIBUTION LAYER
    Publication number: 20100289147
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Application
    Filed: July 26, 2010
    Publication date: November 18, 2010
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheemen Yu, Hem Takiar
  • Printed Circuit Board With Coextensive Electrical Connectors And Contact Pad Areas
    Publication number: 20100252315
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Application
    Filed: June 21, 2010
    Publication date: October 7, 2010
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheeman Yu, Hem Takiar
  • Rounded contact fingers on substrate/PCB for crack prevention
    Patent number: 7806731
    Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: October 5, 2010
    Assignee: SanDisk Corporation
    Inventors: Hem Takiar, Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen, Chih-Chin Liao
  • Method of fabricating a semiconductor die having a redistribution layer
    Patent number: 7772047
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: August 10, 2010
    Assignee: SanDisk Corporation
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheemen Yu, Hem Takiar
  • Semiconductor die having a distribution layer
    Patent number: 7763980
    Abstract: A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape assembly includes a backgrind tape as a base layer, and a film assembly adhered to the backgrind tape. The film assembly in turn includes an adhesive film on which is deposited a thin layer of conductive material. The redistribution layer pattern is traced into the tape assembly, using for example a laser. Thereafter, the unheated portions of the tape assembly may be removed, leaving the heated redistribution layer pattern on each semiconductor die.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: July 27, 2010
    Assignee: SanDisk Corporation
    Inventors: Chien-Ko Liao, Chin-Tien Chiu, Jack Chang Chien, Cheemen Yu, Hem Takiar
  • Printed circuit board with coextensive electrical connectors and contact pad areas
    Patent number: 7746661
    Abstract: A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: June 29, 2010
    Assignee: SanDisk Corporation
    Inventors: Chih-Chin Liao, Han-Shiao Chen, Chin-Tien Chiu, Ken Jian Ming Wang, Cheemen Yu, Hem Takiar
  • HARMONICS GENERATION APPARATUS AND METHOD THEREOF
    Publication number: 20100086147
    Abstract: A harmonic generating apparatus and the method are provided, which are used to enhance the quality of the bass audio signals. The method includes the steps of: providing a frequency signal having a present level and a preceding level; comparing the present level with the preceding level to generate a compared result; and generating the plurality of harmonics based on the compared result.
    Type: Application
    Filed: October 1, 2009
    Publication date: April 8, 2010
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Tien-Chiu HUNG
  • APPARATUS AND METHOD FOR PROCESSING AUDIO SIGNAL
    Publication number: 20100086148
    Abstract: An apparatus for processing an audio input signal is provided and includes an audio processing circuit and an audio compressing circuit. The audio processing circuit receives the audio input signal, and enhances a first frequency part of the audio input signal to output a bass-enhancement signal. The audio compressing circuit is coupled to the audio processing circuit, and reduces a gain of a second frequency part of the bass-enhancement signal to output an audio output signal.
    Type: Application
    Filed: October 1, 2009
    Publication date: April 8, 2010
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Tien-Chiu HUNG, Chung-Shih CHU, Tao-Cheng WU
  • METHODS OF PROMOTING ADHESION BETWEEN TRANSFER MOLDED IC PACKAGES AND INJECTION MOLDED PLASTICS FOR CREATING OVER-MOLDED MEMORY CARDS
    Publication number: 20100052155
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • METHODS OF PROMOTING ADHESION BETWEEN TRANSFER MOLDED IC PACKAGES AND INJECTION MOLDED PLASTICS FOR CREATING OVER-MOLDED MEMORY CARDS
    Publication number: 20100055847
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheeman Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • SEMICONDUCTOR DIE SUPPORT IN AN OFFSET DIE STACK
    Publication number: 20100044861
    Abstract: A semiconductor device is disclosed including a support structure for supporting an edge of a semiconductor die that is not supported on the substrate or semiconductor die below. In embodiments, the semiconductor device may in general include a substrate having a plurality of contact pads, a first semiconductor die mounted on the substrate, and a second semiconductor die mounted on the first semiconductor die in an offset configuration so that an edge of the second semiconductor die overhangs the first semiconductor die. A support structure may be affixed to one or more of the contact pads beneath the overhanging edge to support the overhanging edge during a wire bonding process which exerts a downward force on the overhanging edge.
    Type: Application
    Filed: August 20, 2008
    Publication date: February 25, 2010
    Inventors: Chin-Tien Chiu, Hem Takiar, Jia Qing Xi
  • Methods of promoting adhesion between transfer molded IC packages and injection molded plastics for creating over-molded memory cards
    Patent number: 7615861
    Abstract: A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trenches and/or pockmarks are formed, a lid may be attached to the package surface in an injection molding process. During the injection molding process, the molten plastic flows into the holes, trenches and/or pockmarks to interconnect with the surface of the semiconductor package. Thus, when the molten plastic hardens, the holes, trenches and/or pockmarks ensure that the lid remains firmly attached to semiconductor package.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: November 10, 2009
    Assignee: SanDisk Corporation
    Inventors: Che-Jung Chang, Chin-Tien Chiu, Cheemen Yu, Hem Takiar, Jack Chang Chien, Ning Liu
  • HIDDEN PLATING TRACES
    Publication number: 20090263969
    Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
    Type: Application
    Filed: June 29, 2009
    Publication date: October 22, 2009
    Inventors: Hem Takiar, Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen, Chih-Chin Liao
  • Hidden plating traces
    Patent number: 7592699
    Abstract: A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise occur with straight edges to the contact fingers. The substrate may additionally or alternatively include plating traces extending at an angle from the contact fingers. Extending at an angle, at least the ends of the plating traces at the edge of the substrate are covered beneath a lid in which the semiconductor package is encased. Thus, when in use with a host device, contact between the ends of the plating traces beneath the lid and contact pins of the host device is avoided.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: September 22, 2009
    Assignee: SanDisk Corporation
    Inventors: Hem Takiar, Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Han-Shiao Chen, Chih-Chin Liao
  • METHOD FOR CONTROLLING THE LOAD VARIATIONS IN A GAS TURBINE
    Publication number: 20090158702
    Abstract: A method is described for controlling load variations in a gas turbine. The method comprises reducing the flow of gaseous fuel entering the combustor to a predefined minimum value, if an increase is observed in the rotation regime of said turbine above a predefined maximum value and a total reduction in the load, activating a selective feeding sequence of the burners if the turbine is operating in normal functioning or premixed flame mode, modifying the angulation of the adjustable stator vanes, in order to reduce the speed rate of the compressor, and opening one or more anti-surge valves and one or more overboard bleeds, in order to reduce the air flow at the inlet of the combustor.
    Type: Application
    Filed: December 11, 2008
    Publication date: June 25, 2009
    Inventors: Giovanni TONNO, Mariateresa PACI, Michele D'ERCOLE, Alessandro RUSSO, Jesse F. STEWART, Ya-Tien CHIU, Marco ULIVI, Antonio BALDASSARRE
  • Substrate warpage control and continuous electrical enhancement
    Patent number: 7538438
    Abstract: A dummy circuit pattern is disclosed on a surface of a substrate for a semiconductor package. The dummy circuit pattern includes a plurality of straight line segments and a plurality of interrupt patterns to breakup one or more of the straight line segments. The interrupt patterns are provided so as to not electrically isolate areas of the dummy pattern, thus providing electrical continuity across the dummy circuit pattern.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: May 26, 2009
    Assignee: SanDisk Corporation
    Inventors: Cheemen Yu, Ken Jian Ming Wang, Chin-Tien Chiu, Chih-Chin Liao, Han-Shiao Chen
  • METHOD OF REDUCING MEMORY CARD EDGE ROUGHNESS BY PARTICLE BLASTING
    Publication number: 20090085231
    Abstract: A method of forming a semiconductor package with smooth edges, and a semiconductor package formed thereby is disclosed. In embodiments, after encapsulation, a panel of semiconductor packages may undergo a first cutting process which cuts the curvilinear edges of the packages. Next, the partially singulated panel of packages may undergo an abrasion process for smoothing the cut curvilinear edges. The abrasion process may occur by forcing abrasive particles over the jagged side edges of a semiconductor package as a result of a pressure differential above and below the semiconductor packages. Upon completion of the abrasive process, a second cutting process may be performed which cuts along straight edges and singulates the respective packages from the panel.
    Type: Application
    Filed: September 28, 2007
    Publication date: April 2, 2009
    Inventors: Chin-Tien Chiu, Chih Chiang Tung, Hem Takiar, Jack Chang Chien, Cheemen Yu