Patents by Inventor Ting-Chang Chang

Ting-Chang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170133514
    Abstract: A thin film includes a substrate, a bottom gate, a channel layer, a source and a drain, and a top gate. The bottom gate is disposed on the substrate. The channel layer is disposed on the bottom gate. The source and the drain are disposed on two different sides of the channel layer. The top gate is disposed on the channel layer, wherein the channel layer is disposed between the bottom gate and the top gate, and the bottom gate and the top gate are electrically isolated from each other. A related method is also provided.
    Type: Application
    Filed: November 9, 2016
    Publication date: May 11, 2017
    Inventors: Yu-Xin YANG, Kuo-Kuang CHEN, Tsung-Hsiang SHIH, Ming-Yen TSAI, Ting-Chang CHANG
  • Patent number: 9647020
    Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: May 9, 2017
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Hua-Mao Chen, Ming-Yen Tsai, Min-Chen Chen
  • Publication number: 20170117466
    Abstract: A resistive random access memory overcomes the difficulty in reducing the forming voltage thereof. The resistive random access memory includes a first electrode layer, a separating portion, a lateral wall portion, an oxygen-containing rheostatic layer and a second electrode layer. The separating portion is arranged on the first electrode layer and forms a through-hole. The first electrode layer is exposed via the through-hole. The lateral wall portion is annularly arranged on an inner periphery of the separating portion defining the through-hole. The lateral wall portion is connected to the first electrode layer and includes a first dielectric. The oxygen-containing rheostatic layer covers the first electrode layer, the separating portion and the lateral wall portion. The oxygen-containing rheostatic layer includes a second dielectric smaller than the first dielectric. The second electrode layer is arranged on the oxygen-containing rheostatic layer.
    Type: Application
    Filed: December 3, 2015
    Publication date: April 27, 2017
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Publication number: 20170117465
    Abstract: A resistive random access memory does not encounter the undesired effects caused by sneak current which occurs when a conventional resistive random access memory operates in an integrated circuit. The resistive random access memory includes a first electrode layer, a first insulating layer, an oxygen-containing layer, a second insulating layer and a second electrode layer. The first insulating layer is arranged on the first electrode layer. The oxygen-containing layer is arranged on the first insulating layer and includes an oxide doped with a metal element. The metal element does not exceed 10% of the oxygen-containing layer. The second insulating layer is arranged on the oxygen-containing layer, and the second electrode layer is arranged on the second insulating layer. In this arrangement, the undesired effects caused by sneak current can be effectively eliminated.
    Type: Application
    Filed: December 3, 2015
    Publication date: April 27, 2017
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Cheng Shih, Chih-Hung Pan
  • Publication number: 20170110658
    Abstract: A resistive random access memory includes a first electrode, a separating medium, a resistance changing layer and a second electrode. The first electrode has a mounting face. The separating medium has a first face in contact with the mounting face, a second face opposite to the first face, and an inner face extending between the first and second faces. The separating medium forms a through hole extending from the first to second face. A part of the mounting face is not covered by the separating medium. The separating medium has a first dielectric. The resistance changing layer extends along the part of the mounting face as well as the inner and second faces. The resistance changing layer has a second dielectric having a dielectric constant larger than a dielectric constant of the first dielectric by 2 or less. The second electrode is arranged on the resistance changing layer.
    Type: Application
    Filed: December 29, 2016
    Publication date: April 20, 2017
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Patent number: 9620211
    Abstract: A maintaining device and a maintenance method for maintaining the normal operation of a resistive random access memory are disclosed. The maintenance method can be executed by the maintaining device. Said memory includes first and second electrodes. The first electrode is not grounded. The maintaining device is connected to the first electrode so that the first electrode receives an operational signal and a restoring signal generated by the maintaining device. The operational signal transits from a zero voltage to a non-zero voltage and then to the zero voltage. If the operational signal has already transited from the non-zero voltage to the zero voltage, the maintenance method controls the restoring signal to transit from the zero voltage to a negative voltage, controls the restoring signal to remain the negative voltage for a period of restoring time, and controls the restoring signal to transit from the negative voltage to the zero voltage.
    Type: Grant
    Filed: July 6, 2016
    Date of Patent: April 11, 2017
    Assignee: National Sun Yat-Sen University
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Yu-Ting Su, Chih-Hung Pan
  • Publication number: 20170025607
    Abstract: A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.
    Type: Application
    Filed: October 7, 2016
    Publication date: January 26, 2017
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Patent number: 9553191
    Abstract: A method of fabricating a FinFET includes at last the following steps. A semiconductor substrate is patterned to form a plurality of trenches in the semiconductor substrate and at least one semiconductor fin between the trenches. Insulators are formed in the trenches. A gate stack is formed over portions of the semiconductor fin and over portions of the insulators. A strained material doped with a conductive dopant is formed over portions of the semiconductor fin revealed by the gate stack, and the strained material is formed by selectively growing a bulk layer with a gradient doping concentration.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: January 24, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin-I Liao, Mon-Nan How, Shih-Chieh Chang, Ying-Min Chou, Ting-Chang Chang
  • Publication number: 20170018654
    Abstract: A thin-film transistor and a manufacturing method thereof are characterized in that: the active layer is a group IV-VI compound semiconductor film; the group IV-VI compound is one of geranium sulfide (GeS), germanium selenide (GeSe), germanium telluride (GeTe), tin selenide (SnSe), and tin telluride (SnTe) or a ternary, quaternary, or quinary compound thereof; the active layer is deposited by sputtering; and thermal annealing is performed after the active layer is deposited. The thin-film transistor has high carrier mobility and a high current on/off ratio and therefore meets the needs of high-resolution display development.
    Type: Application
    Filed: July 14, 2015
    Publication date: January 19, 2017
    Inventors: TING-CHANG CHANG, HUA-MAO CHEN, MING-YEN TSAI, MIN-CHEN CHEN
  • Publication number: 20160358956
    Abstract: A light sensing circuit for solving the problem of low reliability in illumination detection includes a photo transistor having a gate, a drain and a source; a first transistor electrically connecting between the gate and source of the photo transistor; a first capacitor electrically connecting between the gate and the drain of the photo transistor; a second transistor electrically connecting with the drain of the photo transistor, the first capacitor, and a data signal; a second capacitor electrically connecting between the source of the photo transistor and a ground contact; a third transistor electrically connecting with the photo transistor, the first transistor, and the second capacitor; and a switch adapted to alternatively connect the third transistor with a buffer or a zero signal. A control method of the above light sensing circuit is also disclosed. Therefore, the above identified problem can be surely solved.
    Type: Application
    Filed: July 15, 2015
    Publication date: December 8, 2016
    Inventors: Ting-Chang CHANG, Hua-Mao CHEN, Ming-Yen TSAI, Min-Chen CHEN
  • Patent number: 9502647
    Abstract: A resistive memory cell is disclosed. The resistive memory cell comprises a pair of electrodes and a resistance-switching network disposed between the pair of electrodes. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer. The group-IV doping layer comprises silicon oxide doped with a group-IV element. The porous low-k layer comprises porous silicon oxide or porous hafnium oxide. The group-IV element may comprise zirconium, titanium, or hafnium. The porous low-k layer may be prepared by inductively coupled plasma (ICP) treatment. A method of fabricating a resistive memory is disclosed. The method comprises forming a resistance-switching network on a first electrode using sputtering and forming a second electrode on the resistance-switching network using sputtering. The resistance-switching network comprises a group-IV element doping layer and a porous low-k layer.
    Type: Grant
    Filed: May 28, 2014
    Date of Patent: November 22, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan, Ying-Lang Wang, Kei-Wei Chen, Shih-Chieh Chang, Te-Ming Kung
  • Patent number: 9496493
    Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: November 15, 2016
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Patent number: 9443965
    Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: September 13, 2016
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Hua-Mao Chen, Ming-Yen Tsai, Tian-Yu Hsieh
  • Publication number: 20160240777
    Abstract: A resistive random access memory including a first electrode, a separating medium, a resistance changing layer and a second electrode is disclosed. The first electrode has a mounting face. The separating medium is arranged on the first electrode and forms a through hole. A part of the first electrode is not covered by the separating medium. The separating medium has a first dielectric. The resistance changing layer extends along the part of the first electrode as well as along an inner face and the second face of the separating medium. The resistance changing layer has a second dielectric having a dielectric constant larger than a dielectric constant of the first dielectric by 2 or less. The second electrode is arranged on the resistance changing layer. In this arrangement, the problem of unstable forming voltage of the conventional resistive random access memory can be solved.
    Type: Application
    Filed: June 9, 2015
    Publication date: August 18, 2016
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Publication number: 20160155827
    Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate. The transistor prototype includes two transparent electrodes adapted to form a source and a drain of a thin film transistor. Next, the two transparent electrodes of the transistor prototype are exposed in an environment full of a plasma. The plasma conducts a surface treatment on the two transparent electrodes of the transistor prototype to form the thin film transistor. The method can solve the problem of excessive contact resistance of the transparent conductive films of conventional thin film transistors.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 2, 2016
    Inventors: Ting-Chang CHANG, Hua-Mao CHEN, Ming-Yen TSAI, Tian-Yu HSIEH
  • Publication number: 20160148804
    Abstract: A method for producing a thin film transistor includes forming a transistor prototype on a substrate, with the transistor prototype including a face having a to-be-treated portion. The to-be-treated portion of the transistor prototype is exposed in an environment full of a supercritical fluid. The supercritical fluid conducts a surface treatment on the to-be-treated portion of the transistor prototype to form a thin film transistor. The method can solve the problem of too many defects of the thin film transistor resulting from a low-temperature process.
    Type: Application
    Filed: December 5, 2014
    Publication date: May 26, 2016
    Inventors: Ting-Chang Chang, Ming-Yen Tsai, Hua-Mao Chen, Tian-Yu Hsieh
  • Publication number: 20160118579
    Abstract: A resistive random access memory includes two electrode layers and a resistive switching layer mounted between the two electrode layers. The resistive switching layer consists essentially of insulating material with oxygen, metal material, and mobile ions. The polarity of the mobile ions is opposite to the polarity of oxygen ions. A method for producing a resistive random access memory includes preparing a first metal layer and sputtering a resistive switching layer on the first metal layer. Surface treatment is conducted on the resistive switching layer by using a plasma containing mobile ions to dope the mobile ions into the resistive switching layer. The polarity of the mobile ions is opposite to the polarity of oxygen ions. Then, a second metal layer is sputtered on the resistive switching layer.
    Type: Application
    Filed: December 8, 2014
    Publication date: April 28, 2016
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Publication number: 20160111640
    Abstract: A resistive random access memory including two electrode layers and a multi-resistance layer mounted between the two electrode layers. The multi-resistance layer consists essentially of insulating material with oxygen and lithium ions. The number of resistance states of a memory element can be increased by the resistive random access memory to increase the integration density of a memory module having a plurality of memory elements.
    Type: Application
    Filed: December 3, 2014
    Publication date: April 21, 2016
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Tian-Jian Chu, Chih-Hung Pan
  • Patent number: 9287501
    Abstract: A resistive random access memory includes an oxygen-poor layer disposed on a first electrode layer and formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. An insulating layer is disposed on the oxygen-poor layer and is formed by silicon dioxide or hafnium oxide. A second electrode layer is disposed on the insulating layer. A method for producing a resistive random access memory includes preparing a first electrode layer. An oxygen-poor layer is then formed on the first electrode layer. The oxygen-poor layer is formed by indium tin oxide, indium oxide, tin dioxide, or zinc oxide. Next, an insulating layer is formed on the oxygen-poor layer. The insulating layer formed by silicon dioxide or hafnium oxide. A second electrode layer is then formed on the insulating layer.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: March 15, 2016
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Kuan-Chang Chang, Tsung-Ming Tsai, Chih-Hung Pan
  • Patent number: 9281411
    Abstract: A thin film transistor is disclosed in the present invention, including a substrate, a gate, an insulating layer, a source, a drain and an active layer. The gate is arranged on the substrate. The insulating layer is arranged on the gate. The source and the drain are arranged on the insulating layer. The active layer is arranged between the source and the drain, and is formed by a bottom layer, an intermediate layer and a top layer stacked together on the insulating layer. The conductivity of the intermediate layer is higher than that of the bottom layer, and the conductivity of the bottom layer is higher than that of the top layer. As such, the disadvantage of low carrier mobility as commonly seen in the conventional thin film transistor is overcome.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: March 8, 2016
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Ming-Yen Tsai, Tian-Yu Hsieh