Patents by Inventor Ting-Chang Chang

Ting-Chang Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070085115
    Abstract: A memory cell, suitable for being disposed on a substrate, comprises a poly-Si island, a first dielectric layer, a trapping layer, a second dielectric layer and a control gate. The poly-Si island is disposed on the substrate and includes a source doped region, a drain doped region and a channel region there-between. The first dielectric layer is disposed on the poly-Si island, the trapping layer is disposed on the first dielectric layer, the second dielectric layer is disposed on the trapping layer and the control gate is disposed on the second dielectric layer. The above-described memory cell can be integrated into the manufacturing process of a low temperature polysilicon LCD panel (LTPS LCD panel) or an organic light emitting display panel (OLED panel).
    Type: Application
    Filed: April 12, 2006
    Publication date: April 19, 2007
    Inventors: Hung-Tse Chen, Chi-Lin Chen, Yu-Cheng Chen, Chi-Wen Chen, Ting-Chang Chang
  • Publication number: 20070052020
    Abstract: A Thin Film Transistor comprises a gate electrode formed on a substrate; a gate insulation layer covering the gate electrode; an amorphous silicon (a-Si) region disposed on the gate insulation layer and above the gate electrode; a doped a-Si region formed on the a-Si region; the source and drain metal regions separately formed on the doped a-Si region and above the gate electrode, and isolated from the a-Si region; a passivation layer formed on the gate insulation layer and covering the source, drain and data-line (DL) metal regions; and a conductive layer formed on the passivation layer. The passivation layer has a first, second and third vias for respectively exposing the partial surfaces of the source, drain and DL metal regions. The first, second and third vias are filled with the conductive layer, so that the DL and source metal regions are connected via the conductive layer.
    Type: Application
    Filed: March 31, 2006
    Publication date: March 8, 2007
    Inventors: Chi-Wen Chen, Ting-Chang Chang, Po-Tsun Liu, Kuo-Yu Huang, Jen-Chien Peng
  • Publication number: 20060270158
    Abstract: A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots.
    Type: Application
    Filed: August 2, 2006
    Publication date: November 30, 2006
    Applicant: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Ting-Chang Chang, Shuo-Ting Yan, Po-Tsun Liu, Chi-Wen Chen, Tsung-Ming Tsai, Ya-Hsiang Tai, Simon-M Sze
  • Patent number: 7126150
    Abstract: A light emitting layer including a quantum structure and the forming method of forming the same is provided. The forming method includes several steps. At first, a compound dielectric layer forms, including a dielectric layer and an impure dielectric layer, which comprises major elements and impurities. The compound dielectric layer is treated to drive the impurities to form the quantum structure in the dielectric layer according to the difference in characteristic between the major elements and impurities. For example, oxidizing the major elements to drive the impurities of the impure dielectric layer to form the quantum structure inside the dielectric layer, because the oxidizing capability of the major elements is stronger than that of the impurities. The quantum structure and compound dielectric layer construct the light emitting layer.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: October 24, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 7074630
    Abstract: A light emitting layer including a quantum structure and the forming method of forming the same is provided. The forming method includes several steps. At first, a compound dielectric layer forms, including a dielectric layer and an impure dielectric layer, which comprises major elements and impurities. The compound dielectric layer is treated to drive the impurities to form the quantum structure in the dielectric layer according to the difference in characteristic between the major elements and impurities. For example, oxidizing the major elements to drive the impurities of the impure dielectric layer to form the quantum structure inside the dielectric layer, because the oxidizing capability of the major elements is stronger than that of the impurities. The quantum structure and compound dielectric layer construct the light emitting layer.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: July 11, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Publication number: 20060124930
    Abstract: A thin film transistor is characterized by having an island-in structure having a semiconductor layer with a channel region, a bottom heavily-doped semiconductor layer, and a top heavily-doped semiconductor layer. The bottom heavily-doped semiconductor layer is positioned on two opposite sides of the surface of the semiconductor layer beyond the channel region. The top heavily-doped semiconductor layer, positioned on the bottom heavily-doped semiconductor layer, covers two opposite side walls of the bottom heavily-doped semiconductor layer and the semiconductor layer so that current leakage from the drain electrode to the source electrode is prevented.
    Type: Application
    Filed: April 27, 2005
    Publication date: June 15, 2006
    Inventors: Chi-Wen Chen, Ting-Chang Chang, Po-Tsun Liu, Feng-Yuan Gan
  • Publication number: 20060077728
    Abstract: A method for fabricating a flash memory device is provided. A tunnel oxide layer is formed over a substrate. Thereafter, a floating gate, an inter-gate dielectric layer, and a control gate are sequentially formed over the tunnel oxide layer. Since the floating gate includes a plurality of nanocrystals, the memory cell can still normally function even if partial region of the floating gate is impaired.
    Type: Application
    Filed: October 20, 2005
    Publication date: April 13, 2006
    Inventors: Jason Chen, Ting-Chang Chang
  • Patent number: 7022571
    Abstract: A quantum structure and the forming method based on the difference in characteristic of two matters is provided. The forming method includes several steps. At first, providing a first dielectric layer for forming a second dielectric layer thereon. The second dielectric layer has major elements and impurities contained. Treating the second dielectric layer to drive the impurities to form the quantum structure. For example, oxidizing the major elements to drive the impurities in the first dielectric layer to form the quantum structure in said first dielectric layer because the oxidizing capability of the major elements is stronger than that of the impurities.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: April 4, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Publication number: 20060003531
    Abstract: A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots.
    Type: Application
    Filed: September 18, 2005
    Publication date: January 5, 2006
    Inventors: Ting-Chang Chang, Shuo-Ting Yan, Po-Tsun Liu, Chi-Wen Chen, Tsung-Ming Tsai, Ya-Hsiang Tai, Simon-M Sze
  • Patent number: 6979654
    Abstract: A low k dielectric layer is formed on a surface of a substrate of a semiconductor wafer. Then, a surface treatment is performed to the low k dielectric layer to form a passivation layer on a surface of the low k dielectric layer. A patterned photoresist layer is formed over the surface of the semiconductor wafer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. Finally, a stripping process is performed to remove the patterned photoresist layer. The passivation layer is used to prevent deterioration of the dielectric characteristic of the low k dielectric layer during the stripping process.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: December 27, 2005
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20050127431
    Abstract: A quantum structure and the forming method based on the difference in characteristic of two matters is provided. The forming method includes several steps. At first, providing a first dielectric layer for forming a second dielectric layer thereon. The second dielectric layer has major elements and impurities contained. Treating the second dielectric layer to drive the impurities to form the quantum structure. For example, oxidizing the major elements to drive the impurities in the first dielectric layer to form the quantum structure in said first dielectric layer because the oxidizing capability of the major elements is stronger than that of the impurities.
    Type: Application
    Filed: January 13, 2005
    Publication date: June 16, 2005
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Publication number: 20050112820
    Abstract: A method for fabricating a flash memory device is provided. A tunnel oxide layer is formed over a substrate. Thereafter, a floating gate, an inter-gate dielectric layer, and a control gate are sequentially formed over the tunnel oxide layer. Since the floating gate includes a plurality of nanocrystals, the memory cell can still normally function even if partial region of the floating gate is impaired.
    Type: Application
    Filed: September 20, 2004
    Publication date: May 26, 2005
    Inventors: Jason Chen, Ting-Chang Chang
  • Publication number: 20050095839
    Abstract: A method of patterning a low-k film is provided. In this method, a dielectric layer is spun over a substrate, and then an electron-beam exposure process is performed on the dielectric layer to define an exposed area and an unexposed area thereon. A developer is used to remove the unexposed area, wherein the developer can solve the unexposed area and enhance the porosity of the exposed area. Finally, a thermal process is performed on the exposed area.
    Type: Application
    Filed: November 3, 2004
    Publication date: May 5, 2005
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Ya-Hsiang Tai
  • Publication number: 20050095786
    Abstract: A method of manufacturing a floating gate is provided. The method includes the steps of forming a tunneling layer on a substrate, and forming a film layer containing a semiconductor component on the tunneling layer. The film layer consists of a semiconductor film or nano-dots.
    Type: Application
    Filed: November 3, 2004
    Publication date: May 5, 2005
    Inventors: Ting-Chang Chang, Shuo-Ting Yan, Po-Tsun Liu, Chi-Wen Chen, Tsung-Ming Tsai, Ya-Hsiang Tai, Simon-M Sze
  • Publication number: 20050042783
    Abstract: A light emitting layer including a quantum structure and the forming method of forming the same is provided. The forming method includes several steps. At first, a compound dielectric layer forms, including a dielectric layer and an impure dielectric layer, which comprises major elements and impurities. The compound dielectric layer is treated to drive the impurities to form the quantum structure in the dielectric layer according to the difference in characteristic between the major elements and impurities. For example, oxidizing the major elements to drive the impurities of the impure dielectric layer to form the quantum structure inside the dielectric layer, because the oxidizing capability of the major elements is stronger than that of the impurities. The quantum structure and compound dielectric layer construct the light emitting layer.
    Type: Application
    Filed: August 26, 2004
    Publication date: February 24, 2005
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6858123
    Abstract: The invention relates to a novel galvanizing solution for the galvanic deposition of copper. Hydroxylamine sulfate or hydroxylamine hydrochloride are utilized as addition reagents and added to the galvanizing solution during the galvanic deposition of copper which is used in the manufacture of semiconductors.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: February 22, 2005
    Assignee: Merck Patent Gesellschaft MIT Beschrankter Haftung
    Inventors: Jung-Chih Hu, Wu-Chun Gau, Ting-Chang Chang, Ming-Shiann Feng, Chun-Lin Cheng, You-Shin Lin, Ying-Hao Li, Lih-Juann Chen
  • Publication number: 20040234745
    Abstract: A light emitting layer including a quantum structure and the forming method of forming the same is provided. The forming method includes several steps. At first, a compound dielectric layer forms, including a dielectric layer and an impure dielectric layer, which comprises major elements and impurities. The compound dielectric layer is treated to drive the impurities to form the quantum structure in the dielectric layer according to the difference in characteristic between the major elements and impurities. For example, oxidizing the major elements to drive the impurities of the impure dielectric layer to form the quantum structure inside the dielectric layer, because the oxidizing capability of the major elements is stronger than that of the impurities. The quantum structure and compound dielectric layer construct the light emitting layer.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Publication number: 20040219750
    Abstract: A quantum structure and the forming method based on the difference in characteristic of two matters is provided. The forming method includes several steps. At first, providing a first dielectric layer for forming a second dielectric layer thereon. The second dielectric layer has major elements and impurities contained. Treating the second dielectric layer to drive the impurities to form the quantum structure. For example, oxidizing the major elements to drive the impurities in the first dielectric layer to form the quantum structure in said first dielectric layer because the oxidizing capability of the major elements is stronger than that of the impurities.
    Type: Application
    Filed: May 1, 2003
    Publication date: November 4, 2004
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6716741
    Abstract: The invention relates to a method for directly patterning a low-k dielectric layer by a high energy flow without using any photoresist layer, so that the exposed portion of the low-k dielectric layer is cured and becomes insoluble to the developing solution. The unexposed portion of the low-k dielectric layer remains soluble to the developing solution and will be removed in the developing process. The performance and reliability of the devices are improved and the fabrication processes are simplified.
    Type: Grant
    Filed: April 9, 2002
    Date of Patent: April 6, 2004
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Jeng-Tzong Sheu
  • Patent number: 6673661
    Abstract: A method for fabricating a dual gate thin film transistor (TFT) device provides for forming a pair of source/drain layers self-aligned with respect to a first gate electrode and forming a second gate electrode self-aligned with respect to both the pair of source/drain layers and the first gate electrode. Thus, the dual gate TFT device is fabricated with enhanced alignment. In addition, the dual gate TFT device (or a single gate TFT device) may be fabricated with source/drain layers formed of a silicon-germanium alloy material, such as to provide the TFT device with enhanced performance with respect to a kink effect.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: January 6, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Wen Liu, Ting-Chang Chang, Po-Tsun Liu, Ying-Lang Wang