Patents by Inventor Ting CHIU

Ting CHIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Publication number: 20240097005
    Abstract: Disclosed is a semiconductor device and semiconductor fabrication method. A semiconductor device includes: a gate structure over a semiconductor substrate, having a high-k dielectric layer, a p-type work function layer, an n-type work function layer, a dielectric anti-reaction layer, and a glue layer; and a continuous metal cap over the gate structure formed by metal material being deposited over the gate structure, a portion of the anti-reaction layer being selectively removed, and additional metal material being deposited over the gate structure. A semiconductor fabrication method includes: receiving a gate structure; flattening the top layer of the gate structure; precleaning and pretreating the surface of the gate structure; depositing metal material over the gate structure to form a discontinuous metal cap; selectively removing a portion of the anti-reaction layer; depositing additional metal material over the gate structure to create a continuous metal cap; and containing growth of the metal cap.
    Type: Application
    Filed: January 12, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shih-Hang Chiu, Jui-Yang Wu, Kuan-Ting Liu, Weng Chang
  • Publication number: 20240096883
    Abstract: A method of manufacturing a gate structure includes at least the following steps. A gate dielectric layer is formed. A work function layer is deposited on the gate dielectric layer. A barrier layer is formed on the work function layer. A metal layer is deposited on the barrier layer to introduce fluorine atoms into the barrier layer. The barrier layer is formed by at least the following steps. A first TiN layer is formed on the work function layer. A top portion of the first TiN layer is converted into a trapping layer, and the trapping layer includes silicon atoms or aluminum atoms. A second TiN layer is formed on the trapping layer.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ji-Cheng Chen, Ching-Hwanq Su, Kuan-Ting Liu, Shih-Hang Chiu
  • Patent number: 11934106
    Abstract: An optical proximity correction (OPC) device and method is provided. The OPC device includes an analysis unit, a reverse pattern addition unit, a first OPC unit, a second OPC unit and an output unit. The analysis unit is configured to analyze a defect pattern from a photomask layout. The reverse pattern addition unit is configured to provide a reverse pattern within the defect pattern. The first OPC unit is configured to perform a first OPC procedure on whole of the photomask layout. The second OPC unit is configured to perform a second OPC procedure on the defect pattern of the photomask layout to enhance an exposure tolerance window. The output unit is configured to output the photomask layout which is corrected.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: March 19, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Yen Liu, Hui-Fang Kuo, Chian-Ting Huang, Wei-Cyuan Lo, Yung-Feng Cheng, Chung-Yi Chiu
  • Patent number: 11935935
    Abstract: A thin film transistor includes a gate electrode embedded in an insulating layer that overlies a substrate, a gate dielectric overlying the gate electrode, an active layer comprising a compound semiconductor material and overlying the gate dielectric, and a source electrode and drain electrode contacting end portions of the active layer. The gate dielectric may have thicker portions over interfaces with the insulating layer to suppress hydrogen diffusion therethrough. Additionally or alternatively, a passivation capping dielectric including a dielectric metal oxide material may be interposed between the active layer and a dielectric layer overlying the active layer to suppress hydrogen diffusion therethrough.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Min-Kun Dai, Wei-Gang Chiu, I-Cheng Chang, Cheng-Yi Wu, Han-Ting Tsai, Tsann Lin, Chung-Te Lin
  • Patent number: 11934171
    Abstract: The present disclosure discloses a servo motor and an encoder calibration method. The encoder calibration method includes: calculating a gain error, an offset error and a phase error, by an error calculation block, according to a first signal and a second signal output by an encoder; calculating at least one gain calibration parameter, at least one offset calibration parameter and at least one phase calibration parameter, by the error calibration block, according to the gain error, the offset error and the phase error; and calibrating sequentially, by the encoder, the gain, the offset and the phase of the first signal and the second signal according to the at least one gain calibration parameter, the at least one offset calibration parameter and the at least one phase calibration parameter, wherein performing at least one gain calibration and offset calibration after the phase calibration is completed.
    Type: Grant
    Filed: April 4, 2022
    Date of Patent: March 19, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Kai Chiu, Bo-Ting Yeh, Tsan-Huang Chen
  • Patent number: 11934027
    Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
  • Publication number: 20240085726
    Abstract: A contact lens and a method of manufacturing the same are provided. The contact lens includes a contact lens body and a blue light blocking material. The blue light blocking material covers the contact lens body. The blue light blocking material includes a plurality of metal particles dispersed on the contact lens body. The contact lens has good blue light blocking efficacy and surface properties.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 14, 2024
    Inventors: Hsien-Ting CHIU, Yi-Hung LIN, Ying-Jhen HUANG
  • Publication number: 20240088144
    Abstract: A gate structure includes a metal layer, a barrier layer, and a work function layer. The barrier layer covers a bottom surface and sidewalls of the metal layer. The barrier layer includes fluorine and silicon, or fluorine and aluminum. The barrier layer is a tri-layered structure. The work function layer surrounds the barrier layer.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ji-Cheng Chen, Ching-Hwanq Su, Kuan-Ting Liu, Shih-Hang Chiu
  • Publication number: 20240081081
    Abstract: A ferroelectric memory device and a semiconductor die are provided. The ferroelectric memory device includes a gate electrode; a channel layer, overlapped with the gate electrode; source/drain contacts, in contact with separate ends of the channel layer; a ferroelectric layer, lying between the gate electrode and the channel layer; and a first insertion layer, extending in between the ferroelectric layer and the channel layer, and comprising a metal carbonitride or a metal nitride.
    Type: Application
    Filed: January 10, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Ling Lee, Chung-Te Lin, Han-Ting Tsai, Wei-Gang Chiu, Yen-Chieh Huang, Ming-Yi Yang
  • Publication number: 20240071952
    Abstract: A method includes depositing solder paste over first contact pads of a first package component. Spring connectors of a second package component are aligned to the solder paste. The solder paste is reflowed to electrically and physically couple the spring connectors of the second package component to the first contact pads of the first package component. A device includes a first package component and a second package component electrically and physically coupled to the first package component by way of a plurality of spring coils. Each of the plurality of spring coils extends from the first package component to the second package component.
    Type: Application
    Filed: January 10, 2023
    Publication date: February 29, 2024
    Inventors: Chih-Chiang Tsao, Hsuan-Ting Kuo, Chao-Wei Chiu, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Patent number: 11914429
    Abstract: An electronic device includes a host, a display, a sliding plate, and a keyboard. The host has an operating surface. The display is pivoted to the host. The sliding plate is slidably disposed in the host, where the display is mechanically coupled to the sliding plate, and the sliding plate includes a plat portion and a recess portion that are arranged side by side. The keyboard is integrated to the host. The keyboard includes a key structure, where the key structure includes a key cap and a reciprocating element, and the key cap is exposed from the operating surface of the host. The reciprocating element is disposed between the key cap and the sliding plate and has a first end connected to the key cap and a second end contacting the sliding plate. The second end is located on a sliding path of the plat portion and the recess portion.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: February 27, 2024
    Assignee: Acer Incorporated
    Inventors: Hung-Chi Chen, Shun-Bin Chen, Huei-Ting Chuang, Yen-Chieh Chiu, Yu-Wen Lin, Yen-Chou Chueh, Po-Yi Lee
  • Publication number: 20240063322
    Abstract: Systems, apparatuses, and methods for optical sensing are provided. For example, an optical sensing apparatus can include a substrate, a light-receiving device, a light-emitting device, an encapsulating structure, a covering cap, and an adhesive layer. The light-receiving device and the light-emitting device can be disposed on and electrically connected to the substrate. The encapsulating structure can be disposed on the substrate and cover the light-emitting device and the light-receiving device. The encapsulating structure can include a top surface, a first side surface, and a lower surface. The first side surface and the lower surface can collectively form a recess. The covering cap can be disposed on the encapsulating structure and can include a first opening, a top portion, a protruding portion, and an extending portion. The adhesive layer can be arranged between the encapsulating structure and the covering cap to adhere the encapsulating structure and the covering cap.
    Type: Application
    Filed: June 30, 2023
    Publication date: February 22, 2024
    Inventors: Huei-Hsiung Hsu, Cheng-Te Yu, Yu-Ting Chiu
  • Patent number: 11901180
    Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: February 13, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
  • Patent number: 11884372
    Abstract: A floatation device is provided. In some embodiments, a floatation device is provided, comprising an inflatable ring composed of a transparent material, wherein the inflatable ring includes: an outer air chamber having a first valve for inflating the outer air chamber; an inner air chamber having a second valve for inflating the inner air chamber, wherein the outer air chamber and the inner air chamber are not in communication; a cut through the outer air chamber and the inner air chamber of the inflatable ring that forms opposing ends of the inflatable ring; and a plurality of fasteners placed on a top surface and a bottom surface of the outer or inner air chamber for detachably connecting the opposing ends of the inflatable ring.
    Type: Grant
    Filed: March 25, 2022
    Date of Patent: January 30, 2024
    Inventor: Tiffany An-Ting Chiu
  • Patent number: 11860775
    Abstract: The invention relates to a method, and an apparatus for programming data into flash memory. The method includes: driving, by the routing engine, a host interface (I/F) according to the front-end parameter set when determining that a front-end processing stage needs to be activated for the data-programming transaction; driving, by the accelerator, a Redundant Array of Independent Disks (RAID) engine according to the mid-end parameter set when receiving an activation message of the data-programming transaction from the routing engine and determining that a mid-end processing stage needs to be activated; and driving, by the accelerator, a data access engine according to the back-end parameter set when determining that the mid-end processing stage for the data-write transaction does not need to be activated or the mid-end processing stage for the data-write transaction has been completed, and a back-end processing stage for the data-write transaction needs to be activated.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: January 2, 2024
    Assignee: Silicon Motion, Inc.
    Inventor: Shen-Ting Chiu
  • Patent number: 11827751
    Abstract: A nanonetwork with controlled chirality prepared via self-assembly of triblock terpolymers, wherein each of the triblock terpolymers includes a first block, a second block and a third block. The first block is connected to the second block, and the third block is connected to the second block. The first block, the second block and the third block are incompatible. The third block has a homochiral characteristic, and a chirality of the nanonetwork with controlled chirality is determined by the homochiral characteristic.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: November 28, 2023
    Assignee: NATIONAL TSING HUA UNIVERSITY
    Inventors: Hsiao-Fang Wang, Po-Ting Chiu, Chih-Ying Yang, Zhi-Hong Xie, Yu-Chueh Hung, Jing-Yu Lee, Jing-Cherng Tsai, Ishan Prasad, Hiroshi Jinnai, Edwin L. Thomas, Rong-Ming Ho
  • Patent number: 11808938
    Abstract: An optical measurement apparatus includes a thermal insulation housing, a first light-transmissive plate, a second light-transmissive plate, a heat-conductive layer, a cooling source and a photosensor. The thermal insulation housing, the first light-transmissive plate and the second light-transmissive plate define a chamber. The heat-conductive layer is disposed in the chamber, the cooling source is coupled to the heat-conductive layer, and the photosensor is disposed outside the chamber and on one side of the second light-transmissive plate facing away from the first light-transmissive plate.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: November 7, 2023
    Assignee: YOUNG OPTICS INC.
    Inventors: Wei-Ting Chiu, Chu-Tsung Chan, Sandeep Kumar Paral, Chia-Chang Lee
  • Patent number: 11798859
    Abstract: An electronic device package includes an encapsulated electronic component, a substrate, a conductor and a buffer layer. The encapsulated electronic component includes a redistribution layer (RDL) and an encapsulation layer. The first surface is closer to the RDL than the second surface is. The encapsulation layer includes a first surface, and a second surface opposite to the first surface. The substrate is disposed on the second surface of the encapsulation layer. The conductor is disposed between the substrate and the encapsulated electronic component, and electrically connecting the substrate to the encapsulated electronic component. The buffer layer is disposed between the substrate and the encapsulated electronic component and around the conductor.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: October 24, 2023
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia-Pin Chen, Chia-Sheng Tien, Wan-Ting Chiu, Chi Long Tsai
  • Publication number: 20230315622
    Abstract: The invention relates to a method, a non-transitory computer-readable storage medium and an apparatus for data access in response to a host discard command. The method includes: allocating space in a random access memory (RAM) for an expanded discard table; receiving the host discard command from a host side; appending new entries each including one first logical address to the expanded discard table; and setting a start-address register and/or an end-address register in a performance engine for redefining an address range in the RAM that stores the expanded discard table, thereby enabling the performance engine to search the expanded discard table in the address range in the RAM for determining whether a specific logical address of user data is no longer used.
    Type: Application
    Filed: February 16, 2023
    Publication date: October 5, 2023
    Applicant: Silicon Motion, Inc.
    Inventor: Shen-Ting CHIU