Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.

Abstract: An electronic device package includes an encapsulated electronic component, a substrate, a conductor and a buffer layer. The encapsulated electronic component includes a redistribution layer (RDL) and an encapsulation layer. The first surface is closer to the RDL than the second surface is. The encapsulation layer includes a first surface, and a second surface opposite to the first surface. The substrate is disposed on the second surface of the encapsulation layer. The conductor is disposed between the substrate and the encapsulated electronic component, and electrically connecting the substrate to the encapsulated electronic component. The buffer layer is disposed between the substrate and the encapsulated electronic component and around the conductor.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: Semiconductor devices and methods of manufacture are described herein. A method includes forming an opening through an interlayer dielectric (ILD) layer to expose a contact etch stop layer (CESL) disposed over a conductive feature in a metallization layer. The opening is formed using photo sensitive materials, lithographic techniques, and a dry etch process that stops on the CESL. Once the CESL is exposed, a CESL breakthrough process is performed to extend the opening through the CESL and expose the conductive feature. The CESL breakthrough process is a flexible process with a high selectivity of the CESL to ILD layer. Once the CESL breakthrough process has been performed, a conductive fill material may be deposited to fill or overfill the opening and is then planarized with the ILD layer to form a contact plug over the conductive feature in an intermediate step of forming a semiconductor device.

Abstract: In some implementations, fluorine is oxidized after dry etching an oxide layer above a source/drain contact and before cleaning. Accordingly, less hydrofluoric acid is formed during cleaning, which reduces unexpected wet etching of the source/drain contact. This allows for forming a recess in the source/drain contact with a depth to width ratio in a range from approximately 1.0 to approximately 1.4 and prevents damage to a layer of silicide below the source/drain that can be caused by excessive hydrofluoric acid. Additionally, or alternatively, the recess is formed using multiple wet etch processes, and any residual fluorine is oxidized between the wet etch processes. Accordingly, each wet etching process may be shorter and less corrosive, which allows for greater control over dimensions of the recess. Additionally, less hydrofluoric acid may be formed during cleaning processes between the wet etch processes, which reduces the etching of the source/drain contact between processes.

Abstract: A method of forming a semiconductor device includes: forming a semiconductor feature over a substrate, the semiconductor feature includes a conductive region; forming a dielectric layer over the semiconductor feature; patterning the dielectric layer to form a contact opening exposing a top surface of the conductive region; forming a monolayer over the dielectric layer, the top surface of the conductive region remaining exposed; and depositing a conductive material in the contact opening.

Abstract: A semiconductor device includes a gate electrode, a source/drain structure, a lower contact contacting either of the gate electrode or the source/drain structure, and an upper contact disposed in an opening formed in an interlayer dielectric (ILD) layer and in direct contact with the lower contact. The upper contact is in direct contact with the ILD layer without an interposing conductive barrier layer, and the upper contact includes ruthenium.

Abstract: An optical lens includes a first lens group, an aperture, and a second lens group which are sequentially arranged along an optical axis from a magnified side to a minified side. The first lens group has a negative refractive power and includes three lenses with refractive powers. The first lens group includes a lens with positive refractive power. The first lens group includes an aspheric lens. The second lens group has a positive refractive power and includes three lenses with refractive power. The second lens group includes a lens with a negative refractive power. The second lens group includes a lens closest to the minified side which is a cemented lens. The second lens group includes an aspheric lens. In the optical lens, a number of the lenses having the refractive powers is within a range from 6 to 8.

Abstract: The invention relates to the synthesis of boronic ester and acid compounds. More particularly, the invention provides improved synthetic processes for the large-scale production of boronic ester and acid compounds, including the peptide boronic acid proteasome inhibitor bortezomib.

Abstract: A data storage device utilized for accessing boot data includes a flash memory, a controller and a RAM. The flash memory includes several blocks, and each block includes several pages. The controller is coupled to the flash memory and the RAM. The controller receives a write command from a host and determines whether the data of the write command is system data or normal data. If the data to be written is system data, the controller transmits a confirm message to the host after the system data has been completely stored on the data storage device.

Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.

Abstract: Provided is a perovskite film including crystal grains with a crystalline structure of [A][B][X]3.n[C], wherein [A], [B], [X], [C] and n are as defined in the specification. The present disclosure further provides a precursor composition of perovskite film, method for producing of perovskite film, and semiconductor element including such films, as described above. With the optimal lattice arrangement, the perovskite film shows the effects of small surface roughness, and the semiconductor element thereof can thus achieve high efficiency and stability even with large area of film formation, thereby indeed having prospect of the application.

Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side when loading and executing program code of a first layer, at least including: receiving a slot bit table (SBT) including an entry from a second layer, where each entry is associated with an IO operation; receiving a plurality of addresses of callback functions from the second layer; and repeatedly executing a loop until IO operations of the SBT have been processed completely, and, in each iteration of the loop, calling the callback functions implemented in the second layer for a write operation or a read operation of the SBT to drive the frontend interface through the second layer.

Abstract: The invention introduces an apparatus for searching linked lists at least including: a memory arranged to operably store a linked list; a linked-list search engine arranged to operably search content of the linked list until a search success or fail and generate a search result; and a processing unit arranged to operably write the content of the linked list into the memory, drive the linked-list search engine to start a search on the linked list and obtain the search result from the linked-list search engine.

Abstract: Vacuum insulated storage containers storage containers are provided.

Abstract: A floatation device is provided. In some embodiments, a floatation device is provided, comprising an inflatable ring composed of a transparent material, wherein the inflatable ring includes: an outer air chamber having a first valve for inflating the outer air chamber; an inner air chamber having a second valve for inflating the inner air chamber, wherein the outer air chamber and the inner air chamber are not in communication; a cut through the outer air chamber and the inner air chamber of the inflatable ring that forms opposing ends of the inflatable ring; and a plurality of fasteners placed on a top surface and a bottom surface of the outer or inner air chamber for detachably connecting the opposing ends of the inflatable ring.

Abstract: A method of manufacturing an integrated fan-out (InFO) package includes at least the following steps. A package array is formed. A core layer and a dielectric layer are sequentially stacked over the package array. The core layer includes a plurality of cavities. A plurality of first conductive patches is formed on the dielectric layer above the cavities.

Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.

Abstract: Provided are a perovskite film and a manufacturing method thereof. The method includes the following steps. A perovskite precursor material is coated in a linear direction on a substrate with a temperature between 100° C. and 200° C., wherein a concentration of the perovskite precursor material is between 0.05 M and 1.5 M. An infrared light irradiation is performed on the perovskite precursor material to cure the perovskite precursor material to form a thin film including a compound represented by formula (1). The perovskite film has a single 2D phase structure or has a structure in which a 3D phase structure is mixed with a single 2D phase structure. (RNH3)2MA(n?1)M1nX(3n+1)??formula (1), wherein the definitions of R, MA, M1, X, and n are as defined above.