Abstract: The present invention provides a QFN packaging structure and QFN packaging method. By providing the insulating layer on the outer side of the leads of the QFN packaging structure, a short circuit between the leads and the electromagnetic shielding layer can be prevented. In addition, the grounding lead is exposed from the insulating layer, such that the electromagnetic shielding layer is grounded via the grounding lead, thereby realizing the electromagnetic shielding design of the QFN packaging structure.

Abstract: The present invention provides a QFN packaging structure and QFN packaging method. The electromagnetic shielding layer as provided on the outer side of the QFN packaging structure by spacing at a certain interval from the leads may cooperate with the base island having the lug boss on the side edge, such that all surfaces of the chip can be electromagnetically shielded and protected while ensuring the insulation between the electromagnetic shielding layer and the leads.

Abstract: A display device includes a pixel array substrate and a circuit board. The pixel array substrate has a first surface, a second surface opposite to the first surface, and a first side surface connecting the first surface and the second surface. Multiple bonding pads are located on the first surface. The circuit board is bent from above the first surface of the pixel array substrate to below the second surface. The circuit board is electrically connected to the bonding pads and includes a thermoplastic substrate. The thermoplastic substrate includes a third surface facing the pixel array substrate and a fourth surface opposite to the third surface. The thermoplastic substrate includes a first bend formed by thermoplastics.

Abstract: A package device and a manufacturing method thereof are provided. The package device includes a redistribution layer including a first dielectric layer, a conductive layer, and a second dielectric layer. The conductive layer is disposed between the first dielectric layer and the second dielectric layer. The redistribution layer has a test mark, the test mark includes a plurality of conductive patterns formed of the conductive layer, and the conductive patterns are arranged in a ring shape.

Abstract: This disclosure relates to an apparatus and methods for applying X-ray reflectometry (XRR) in characterizing three dimensional nanostructures supported on a flat substrate with a miniscule sampling area and a thickness in nanometers. In particular, this disclosure is targeted for addressing the difficulties encountered when XRR is applied to samples with intricate nanostructures along all three directions, e.g. arrays of nanostructured poles or shafts. Convergent X-ray with long wavelength, greater than that from a copper anode of 0.154 nm and less than twice of the characteristic dimensions along the film thickness direction, is preferably used with appropriate collimations on both incident and detection arms to enable the XRR for measurements of samples with limited sample area and scattering volumes.

Abstract: Novel steviol glycoside compounds characterized by a first group of four glucopyranose residues attached via the number 13 carbon (C13) of the steviol moiety and a second group of two or three glucopyranose residues attached via the number 19 carbon (C19) of the steviol moiety are described, and exemplified by compounds 1-4. These compounds can be present in a composition with other steviol glycosides (e.g., Reb D and Reb M) to enhance their solubilities. Accordingly, the novel compounds can facilitate the preparation of aqueous compositions having a higher concentration of steviol glycosides. A steviol glycoside composition including one or more of compounds 1-4 can be used as a sweetener composition to sweeten other compositions (sweetenable compositions) such as foods, beverages, medicines, oral hygiene compositions, nutraceuticals, and the like.

Abstract: An airtight device includes a container and an airtight cover on the container, and the airtight cover includes a fixing bracket, a door, and a pressuring handle. The fixing bracket has a through hole and a guiding slot, and the through hole communicates with internal space of the container. The guiding slot has adjacent first and second top surfaces, and the second top surface is higher than the first top surface. The door selectively covers the through hole. The pressuring handle pivoted on the door has a first section, a second section, and a rotating axis between the first and second sections, and the first section rotates relative to the second section. The second section receives a force to drive the first section to move from below the second top surface to below the first top surface such that the rotating axis pressures the door.

Abstract: The present invention relates to a layered semi-parallel LDPC decoder system having a single permutation network, and belongs to the field of decoder hardware design. The system comprises a layered decoding architecture of the single permutation network, a layered semi-parallel decoding architecture of the single permutation network, a pipeline design for layered semi-parallel decoding and a hardware framework of a layered semi-parallel LDPC decoder. The present invention removes a permutation network module between a check node and a variable node by modifying the cyclic shift value of each information block transferred from the variable node to the check node, i.e., the cyclic shift operation of the decoder can be completed through the single permutation network so as to reduce hardware resources of the decoder. A semi-parallel decoding structure is adopted, and meanwhile, a pipeline is added between half layers.

Abstract: The present invention discloses a method for determining a maximum value of a heart activity parameter of a user performing a physical activity. Acquire first heart activity data in a first duration of the physical activity performed by the user. Acquire motion data in the first duration of the physical activity performed by the user. Calculate second heart activity data based on the motion data in the first duration of the physical activity performed by the user by a mathematical model and estimate the maximum value of the heart activity parameter of the user based on a comparison between the first heart activity data and the second heart activity data.

Abstract: A semiconductor device includes an active region. A metal gate electrode is disposed over the active region. A conductive layer is disposed over the metal gate electrode. A silicon-containing layer is disposed over a first portion of the conductive layer. A dielectric layer is disposed over a second portion of the conductive layer. A gate via vertically extends through the silicon-containing layer. The gate via is disposed over, and electrically coupled to, the metal gate electrode.

Abstract: The embodiments of the present disclosure provide a cell culture composition and a use thereof, and the cell culture composition includes a culture medium and mitochondria. The cell culture composition including mitochondria can promote cell growth and improve the function of the damaged or aged stem cells, thereby improving overall cell growth.

Abstract: An immersion cooling system includes a tank, a first condenser, an enclosure, a second condenser and a connecting pipe. The tank has a first space. The first space is configured to accommodate a cooling liquid for at least one electronic equipment to immerse therein. The first condenser is disposed inside the tank. The enclosure is disposed outside the tank. The enclosure forms a second space together with the tank. The second condenser is disposed in the second space. The connecting pipe includes a first end and a second end opposite to the first end. The first end is connected with the second condenser. The second end is communicated with the first space.

Abstract: A semiconductor structure includes a semiconductor fin protruding from a substrate; a gate structure engaging with the semiconductor fin. The semiconductor structure also includes an interlayer dielectric (ILD) layer disposed over the substrate and adjacent to the gate structure, where a top surface of the gate structure is below a top surface of the ILD layer; a first metal layer in direct contact with a top surface of the gate structure; a second metal layer disposed over the first metal layer, where the first metal layer is disposed on bottom and sidewall surfaces of the second metal layer, where the bottom surface of the second metal layer has a concave profile, and where the second metal layer differs from the first metal layer in composition; and a gate contact disposed over the second metal layer.

Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming an n-type work function layer in a gate trench in a gate structure, wherein the n-type work function layer is formed around first channel layers in a p-type gate region and around second channel layers in an n-type gate region, forming a first metal fill layer in a first gate trench over the n-type work function layer in the p-type gate region and in a second gate trench over the n-type work function layer in the n-type gate region, removing the first metal fill layer from the p-type gate region, removing the n-type work function layer from the p-type gate region, forming a p-type work function layer in the first gate trench of the p-type gate region, and forming a second metal fill layer in the first gate trench of the p-type gate region.

Abstract: A semiconductor structure and a method of forming the same are provided. In an embodiment, an exemplary semiconductor structure includes a gate structure. The gate structure includes a gate dielectric layer, an n-type work function layer embedded in the gate dielectric layer, a dielectric capping layer embedded in the n-type work function layer, and a p-type work function layer embedded in the dielectric capping layer. A top surface of the gate structure exposes the n-type work function layer, the dielectric capping layer, and the p-type work function layer. The semiconductor structure also includes a first metal cap on the n-type work function layer and a second metal cap on the p-type work function layer. The first metal cap is spaced apart from the second metal cap. without formed on the dielectric capping layer.

Abstract: An agent for cryopreservation includes trehalose, HEPES and serum albumin. The agent for cryopreservation does not include potassium chloride, sodium chloride, ethylene glycol, ethylene glycol tetraacetic acid and ethylenediaminetetraacetic acid.

Abstract: Semiconductor processing methods are described that include providing a substrate to a reaction chamber, where the substrate includes substrate trenches that have a top surface and a bottom surface. A deposition gas that includes a carbon-containing gas and a nitrogen-containing gas flows into a plasma excitation region of the reaction chamber. A deposition plasma having an electron temperature less than or about 4 eV is generated from the deposition gas. The methods further include depositing a carbon-containing layer on the top surface and the bottom surface of the substrate trenches, where the as-deposited carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1. Also described are semiconductor structures that include an as-deposited carbon-containing layer on the top and bottom surface of at least a first and second trench, where the carbon-containing layer has a top surface-to-bottom surface thickness ratio of greater than or about 3:1.

Abstract: A method and a system for manufacturing a semiconductor package structure are provided. The method includes: (a) providing a package body including at least one semiconductor device encapsulated in an encapsulant; (b) providing a flattening force to the package body; (c) thinning the package body after (b); (d) attaching a film to the package body; and (e) releasing the flattening force after (d).

Abstract: A transparent polyimide film, prepared from a copolymerized polyamide acid according to a chemical cyclization method, is provided. The copolymerized polyamide acid requires at least a semi-aromatic polyamide acid, and the semi-aromatic polyamide acid is formed by reacting cyclobutane-1,2,3,4-tetracarboxylic dianhydride (CBDA) and 2,2?-bis(trifluoromethyl)diaminodiphenyl (TFMB). The molar number of dianhydrides of the semi-aromatic polyamide acid is more than 20% of the total molar number of anhydrides of the copolymerized polyamide acid, so that the transparent polyimide film has a light transmittance greater than 80%, a chroma b* less than 5, and a CTE less than 35 ppm/° C.

Abstract: A method includes providing a structure having a substrate and a channel layer over the substrate; forming a high-k gate dielectric layer over the channel layer; forming a work function metal layer over the high-k gate dielectric layer; forming a silicide layer over the work function metal layer; annealing the structure such that a first portion of the work function metal layer that interfaces with the high-k gate dielectric layer is doped with silicon elements from the silicide layer; removing the silicide layer; and forming a bulk metal layer over the work function metal layer.