Patents by Inventor Tomoaki Nakamura

Tomoaki Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10453614
    Abstract: A multilayer ceramic capacitor includes: a multilayer chip having a parallelepiped shape in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer chip; and a pair of external electrodes that are formed from the two edge faces to at least one of side faces of the multilayer chip; wherein in the external electrodes, a first metal layer whose ceramic amount is 5 wt % or more contacts with the two edge faces, and a second metal layer whose ceramic amount is less than 5 wt % contacts with the at least one of the side faces.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: October 22, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tomoaki Nakamura, Mikio Tahara
  • Patent number: 10441248
    Abstract: An ultrasonic device includes a substrate and a support member. The substrate has an element array including a plurality of ultrasonic transducer elements arranged in an array form. The support member has a surface adhered to the substrate in an area including the element array, and an opposite surface opposite from the surface adhered to the substrate, a distance from the surface adhered to the substrate to the opposite surface being different with respect to two adjacent ones of the ultrasonic transducer elements in the element array.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: October 15, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Tomoaki Nakamura, Yasunori Onishi, Tomohide Onogi
  • Publication number: 20190304697
    Abstract: A multi-layer ceramic electronic component includes a ceramic body including: a multi-layer unit including a capacitance forming unit including ceramic layers laminated in a first direction and internal electrodes disposed therebetween, a side surface facing in a second direction orthogonal to the first direction, an end surface facing in a third direction orthogonal to the above directions, a drawn portion extending from the capacitance forming unit in the third direction, the internal electrodes being drawn to the end surface, and a cover that covers the capacitance forming unit and the drawn portion in the first direction; and a side margin that covers the side surface. The drawn portion includes a first region and a second region disposed between the cover and the first region, an end portion of each internal electrode in the second region being positioned inward in the second direction relative to that in the first region.
    Type: Application
    Filed: March 15, 2019
    Publication date: October 3, 2019
    Inventors: TOMOAKI NAKAMURA, MIKIO TAHARA, KOICHIRO MORITA, TETSUHIKO FUKUOKA, SHOJI KUSUMOTO
  • Patent number: 10385203
    Abstract: Provided is a highly versatile heat-curable resin composition for semiconductor encapsulation that exhibits a favorable water resistance and abradability when used to encapsulate a semiconductor device; and a superior fluidity and a small degree of warpage even when used to perform encapsulation on a large-sized wafer. The heat-curable resin composition for semiconductor encapsulation comprises: (A) a cyanate ester compound having not less than two cyanato groups in one molecule, and containing a particular cyanate ester compound that has a viscosity of not higher than 50 Pa·s; (B) a phenol curing agent containing a resorcinol-type phenolic resin; (C) a curing accelerator; (D) an inorganic filler surface-treated with a silane coupling agent; and (E) an ester compound.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: August 20, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Kazuaki Sumita, Tomoaki Nakamura, Naoyuki Kushihara
  • Patent number: 10363574
    Abstract: A piezoelectric element which includes a vibrating film, a piezoelectric body disposed on one surface of the vibrating film, and a horizontal electrode structure in which electrodes are disposed at a predetermined gap therebetween on the piezoelectric body. The vibrating film includes a recess portion in a portion corresponding to the predetermined gap in plan view.
    Type: Grant
    Filed: October 1, 2016
    Date of Patent: July 30, 2019
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Hiromu Miyazawa, Hiroshi Ito, Tomoaki Nakamura, Masayoshi Yamada, Jiro Tsuruno, Tsukasa Funasaka
  • Publication number: 20190180938
    Abstract: A ceramic electronic device includes: a multilayer chip including a multilayer structure and cover layers, the multilayer structure having a structure in which each of a plurality of dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the multilayer chip, a main component of the plurality of dielectric layers being a ceramic, the cover layers being provided on an upper face and a lower face of the multilayer structure in a stacking direction; and a pair of external electrodes that are formed on the two edge faces, wherein each of the external electrodes has a smaller thickness on a corner portion of the cover layers, has a crook toward the internal electrode layers, and has a larger thickness on an area of the two edge faces where the internal electrode layers are extracted.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 13, 2019
    Inventors: Mikio TAHARA, Tomoaki NAKAMURA
  • Publication number: 20190148070
    Abstract: In an exemplary embodiment, a multilayer ceramic capacitor has, at two opposing respective end parts of a capacitor body 11 of roughly rectangular solid shape, external electrodes 12 that each have a conductive resin layer F3 inside. Each of the external electrodes 12 continuously has an end face part 12a corresponding to one face, and a wraparound part 12b corresponding to four faces surrounding the one face, of the capacitor body 11. Also, the end face part 12a of each of the external electrodes 12 has a bulging part 12a1 on the outer face of the end face part 12a. An electronic component using the multilayer ceramic capacitor can maximally prevent the Manhattan phenomenon that may otherwise occur when the electronic component is mounted on a circuit board, even though its external electrodes have the conductive resin layer inside.
    Type: Application
    Filed: November 7, 2018
    Publication date: May 16, 2019
    Inventors: Satoshi KOBAYASHI, Takahisa FUKUDA, Tomoaki NAKAMURA, Mikio TAHARA
  • Publication number: 20190148075
    Abstract: A ceramic electronic device includes: a ceramic main body that has internal electrode layers inside thereof and has a parallelepiped shape in which a part of one of the internal electrode layers is extracted to a first edge face of the parallelepiped shape and a part of another internal electrode layer is extracted to a second edge face of the parallelepiped shape facing the first edge face; external electrodes that are respectively formed on the first edge face and the second edge face and extend to at least one of side faces of the ceramic main body, wherein an interval between side edge portions of the external electrodes on the at least one of side faces is shorter than center portions of the external electrodes on the at least one of side faces.
    Type: Application
    Filed: November 1, 2018
    Publication date: May 16, 2019
    Inventors: Tomoaki NAKAMURA, Mikio TAHARA, Michio OSHIMA, Hiroaki UENISHI, Takehiko KAMOBE
  • Publication number: 20190096577
    Abstract: A ceramic electronic device includes: a ceramic main body having at least two edge faces facing each other; and external electrodes formed on the two edge faces, wherein: the external electrodes have a structure in which a plated layer is formed on a ground layer having ceramic; a main component of the ground layer is a metal; the external electrodes have an extension region that extends to at least one of four side faces from the two edge faces of the ceramic main body; a part of the extension region corresponding to a corner portion of the ceramic main body has a first portion having a maximum spaced distance of 10 ?m or less in a face direction of the ground layer; and the plated layer has an average thickness that is 30% or more with respect to the maximum spaced distance, and covers the first portion.
    Type: Application
    Filed: September 21, 2018
    Publication date: March 28, 2019
    Inventors: Hiroaki UENISHI, Takehiko KAMOBE, Tomoaki NAKAMURA
  • Patent number: 10242924
    Abstract: A base-attached encapsulant for semiconductor encapsulation is used for collectively encapsulating a device-mounted surface of the semiconductor device-mounted substrate having semiconductor devices mounted thereon or a device-formed surface of a semiconductor device-formed wafer having semiconductor devices formed thereon. The base-attached encapsulant has a base and an encapsulating resin layer containing an uncured or semi-cured thermosetting resin component formed onto one of the surfaces of the base, and a linear expansion coefficient ?1 of the semiconductor device to be encapsulated by the base-attached encapsulant, a linear expansion coefficient ?2 of a cured product of the encapsulating resin layer, and a linear expansion coefficient ?3 of the base satisfy both of the following formula (1) and (2); ?1<?3<?2??(1) ?2<?1+?2?2?3<2??(2) wherein the unit of the linear expansion coefficient is ppm/K.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: March 26, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tomoaki Nakamura, Hideki Akiba, Toshio Shiobara
  • Patent number: 10242801
    Abstract: A multilayer ceramic capacitor includes: a first and a second external electrodes; internal electrode layers that are alternately connected to the first and the second external electrodes; and dielectric layers including a ceramic material as a main component, wherein a D20% diameter of the ceramic material of an end margin region, in which internal electrode layers connected to one of the first external electrode and the second external electrode face with each other and does not face with internal electrode layers connected to the other, is smaller than that of a capacity region in which internal electrode layers connected to different external electrodes face with each other and a D80% diameter of the ceramic material of the end margin region is larger than that of the capacity region, or 1/(log D80?log D20) of the ceramic material of the capacity region is larger than that of the end margin region.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: March 26, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kunihiko Nagaoka, Tomoaki Nakamura, Noriyuki Chigira
  • Patent number: 10224147
    Abstract: In an embodiment, a capacitor body 11 of the multilayer ceramic capacitor 10 has protective parts 11a made of ceramics, capacitance-forming parts 11b comprising multiple internal electrode layers 11b1 stacked together with ceramic layers 11b2 placed in between, and a non-capacitance-forming part 11c made of ceramics, in the order of “protective part 11a—capacitance-forming part 11b—non-capacitance-forming part 11c—capacitance-forming part 11b—protective part 11a” from one side to the other side along the laminating direction, and T2 representing the thickness of each protective part 11a in the laminating direction, T3 representing the thickness of each capacitance-forming part 11b in the laminating direction, and T4 representing the thickness of the non-capacitance-forming part 11c in the laminating direction, satisfy the relationship of “T2<T3?T4.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: March 5, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Satoshi Kobayashi, Takahisa Fukuda, Tomoaki Nakamura
  • Publication number: 20190031565
    Abstract: A ceramic electronic component includes: a ceramic body that includes internal electrodes; and an external electrode that includes a plurality of crystal particles containing Ba, Zn, Si, and O, the external electrode being formed on a surface of the ceramic body and connected to the internal electrodes.
    Type: Application
    Filed: July 11, 2018
    Publication date: January 31, 2019
    Inventors: TOMOAKI NAKAMURA, MIKIO TAHARA
  • Publication number: 20190029643
    Abstract: An ultrasonic sensor includes a vibration plate, a first electrode, a piezoelectric body, and a second electrode. The first electrode is laminated on the vibration plate, that has a length along a surface of the vibration plate in a first direction, and that has a width Wbe along the surface of the vibration plate in a second direction that is orthogonal to the first direction. The width Wbe is not more than the length. The piezoelectric body is laminated on the first electrode and has a width Wpz in the second direction. The second electrode is laminated on the piezoelectric body. A ratio Wbe/Wpz between the width Wbe of the first electrode and the width Wpz of the piezoelectric body is not less than 0.1 and not more than 0.8.
    Type: Application
    Filed: October 5, 2018
    Publication date: January 31, 2019
    Inventors: Masayoshi YAMADA, Hiroshi MATSUDA, Tomoaki NAKAMURA, Hiroshi ITO, Hiromu MIYAZAWA
  • Patent number: 10177059
    Abstract: A base-attached encapsulant for semiconductor encapsulation is used for collectively encapsulating a device-mounted surface of the semiconductor device-mounted substrate having semiconductor devices mounted thereon or a device-formed surface of a semiconductor device-formed wafer having semiconductor devices formed thereon. The base-attached encapsulant has a base and an encapsulating resin layer containing an uncured or semi-cured thermosetting resin component formed onto one of the surfaces of the base, and a linear expansion coefficient ?1 of the semiconductor device to be encapsulated by the base-attached encapsulant, a linear expansion coefficient ?2 of a cured product of the encapsulating resin layer, and a linear expansion coefficient ?3 of the base satisfy both of the following formula (1) and (2); ?1<?3<?2??(1) ?2<?1+?2?2?3<2??(2) wherein the unit of the linear expansion coefficient is ppm/K.
    Type: Grant
    Filed: April 18, 2017
    Date of Patent: January 8, 2019
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Tomoaki Nakamura, Hideki Akiba, Toshio Shiobara
  • Patent number: 10172590
    Abstract: An ultrasonic transducer device 100 includes a substrate 130, an ultrasonic transducer element array 110 that is provided on the substrate 130 and in which a plurality of ultrasonic transducer elements 111 are arranged, and an identification ultrasonic transducer element array 120 that is provided on the substrate 130 and in which a plurality of identification ultrasonic transducer elements 121 are arranged. Identification information of the ultrasonic transducer device 100 is set by some of the plurality of identification ultrasonic transducer elements 121 being set to a receivable state and the rest being set to a non-receivable state.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: January 8, 2019
    Assignee: Seiko Epson Corporation
    Inventors: Tomoaki Nakamura, Jiro Tsuruno
  • Patent number: 10117639
    Abstract: An ultrasonic sensor includes a vibration plate, a first electrode, a piezoelectric body, and a second electrode. The first electrode is laminated on the vibration plate, that has a length along a surface of the vibration plate in a first direction, and that has a width Wbe along the surface of the vibration plate in a second direction that is orthogonal to the first direction. The width Wbe is not more than the length. The piezoelectric body is laminated on the first electrode and has a width Wpz in the second direction. The second electrode is laminated on the piezoelectric body. A ratio Wbe/Wpz between the width Wbe of the first electrode and the width Wpz of the piezoelectric body is not less than 0.1 and not more than 0.8.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: November 6, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Masayoshi Yamada, Hiroshi Matsuda, Tomoaki Nakamura, Hiroshi Ito, Hiromu Miyazawa
  • Patent number: 10086405
    Abstract: A piezoelectric element includes a vibrating film, a piezoelectric body, a first electrode, a second electrode, and a groove. The piezoelectric body is arranged upon the vibrating film. The first electrode is arranged upon the piezoelectric body. The second electrode is arranged upon the piezoelectric body and at a position that is separated from the first electrode. The groove is located between the first electrode and the second electrode and splits a surface of the piezoelectric body in two, as seen in plan view from a thickness direction of the vibrating film.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: October 2, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Jiro Tsuruno, Tsukasa Funasaka, Tomoaki Nakamura, Hiromu Miyazawa, Hiroshi Ito, Masayoshi Yamada
  • Patent number: 10040098
    Abstract: An ultrasonic transducer element chip includes a substrate defining an opening, an ultrasonic transducer element disposed at a position corresponding to the opening in a thickness direction of the substrate, and a reinforcing member connected to the substrate to cover the opening. The reinforcing member defines a ventilation passage from the opening to an outside of the substrate.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: August 7, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Tomoaki Nakamura, Jiro Tsuruno, Kanechika Kiyose
  • Publication number: 20180146949
    Abstract: An ultrasonic device includes: a substrate that is provided with a first surface and a second surface as a back surface of the first surface and has an opening opened from the first surface to the second surface; a support that blocks the opening on the first surface side; a vibrator provided on the support; and a metal membrane provided in an unopened region, which is not opened by the opening, on the second surface of the substrate.
    Type: Application
    Filed: November 20, 2017
    Publication date: May 31, 2018
    Inventor: Tomoaki NAKAMURA