Abstract: A spatial multiplexing wireless transmission system is formed by a base station, and by a plurality of terminal stations that are provided with a plurality of antennas. The base station is provided with an information signal generating portion, a control signal generating portion, a transmission frame generating portion, a multiple beamforming portion, a transmission/reception switching portion, a reception signal processing portion, a propagation environment estimating portion, and an antenna information generating portion. At least one of the terminal stations is provided with a transmission/reception switching portion, a reception signal processing portion, a decoding portion, an antenna information extracting portion, an antenna information generating portion, an transmitting portion, a battery, a remaining battery detecting portion, a transmission request extracting portion, and a propagation environment estimating portion.

Abstract: In a substrate processing apparatus, a process vessel is configured to accommodate and process a substrate held at a horizontal position. A gas introduction port is installed at a periphery of a first side of the process vessel and configured to introduce gas into the process vessel from a lateral direction of the substrate. A gas exhaust port is installed at a second side of the process vessel which is opposite to the first side, and is configured to exhaust gas inside the process vessel from a lateral direction of the substrate. A slope part is installed between the gas introduction port and the gas exhaust port inside the process vessel, and is configured to guide a flow path of the gas introduced into the process vessel.

Abstract: A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.

Abstract: A semiconductor device provided on a semiconductor substrate includes an element region including an element, a moisture-resistant frame surrounding the element region, an insulating layer provided between the moisture-resistant frame and an outer peripheral edge of the semiconductor device and on the semiconductor substrate, a first metal line extending along the outer peripheral edge and provided in the insulating layer, and a groove provided in the insulating layer.

Abstract: A substrate processing apparatus detects malfunction of mechanisms in MFC. An inert gas supply line, a first shut-off valve shutting off the inert gas supply, a process gas supply line, and a second shut-off valve shutting off the process gas supply are installed upstream of the MFC. A gas supply pipe connected to a process chamber, a third shut-off valve shutting off gas supply to the gas supply pipe, an exhaust vent line which is exhaustible, and a fourth shut-off valve shutting off gas supply to the exhaust vent line are installed downstream of the MFC. A main control unit determines that the MFC is abnormal if a transition time exceeds a previously set time when the MFC transitions from a closed state to an opened state while the shut-off valves are in a closed state.

Abstract: A substrate processing apparatus includes a holder configured to hold a substrate and carry the substrate into a process chamber, a waiting station located outside the process chamber in which the holder waits prior to carrying the substrate into the process chamber, a circulation path configured to circulate a gas throughout the waiting station, and an exhaust path formed in the circulation path and configured to exhaust the gas from the waiting station.

Abstract: A friction drive belt (B) includes a belt body (10) that is wrapped around pulleys in contact therewith to transmit power. At least a pulley contact portion (15) of the belt main body (10) is made of a rubber composition containing 30-80 parts by mass of at least one layered silicate selected from a smectite group and a vermiculite group, per 100 parts by mass of raw rubber containing an ethylene-?-olefin elastomer.

Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.

Abstract: Two AWG circuits are integrated while preventing degradation in quality of a multiplexing/demultiplexing function. An arrayed waveguide grating circuit includes: a first slab waveguide (52) connected to a first input waveguide (51a) and second output waveguides (55b); a second slab waveguide (54) connected to first output waveguides (55a) and a second input waveguide (51b); and an array waveguide (53) connecting the first slab waveguide (52) and the second slab waveguide (54), wherein the input waveguides (51a, 51b) are connected to the slab waveguides (52, 54) at an interval of 1.5× from the outermost second output waveguide out of the second output waveguides (55a, 55b) connected at an interval x depending on a wavelength.

Abstract: A simulation method to be implemented in a computer causes the computer to execute a procedure carrying out a weighting with respect to layout parameters of a circuit, which is an analyzing target, based on priority information of cells forming the circuit, and converting the weighted layout parameters into physical characteristics and storing the physical characteristics in a memory part, a procedure converting the physical characteristic read from the memory part into circuit parameters and storing the circuit parameters into the memory part, and analyzing the circuit based on a net list including the circuit parameters read from the memory part.

Abstract: A design support program stored in a recording medium readable by a computer includes acquiring a first analysis result including information about an area included in circuit information of a design target circuit and a second analysis result relating to a path of the circuit information, the temperature of the area being equal to or higher than a certain temperature; determining an arbitrary cell on a non-critical path from among cells arranged in the area as a target cell for decreasing the area temperature; and outputting a result of the determination.

Abstract: The present invention is a package for optical semiconductor devices, and an optical semiconductor device using the package, which can prevent discoloration of a plating layer formed on a lead frame even when a silicone resin is used as a sealing resin for an optical semiconductor device, and which enables high luminous efficiency for a long time. Specifically, in the package for semiconductor devices, a plating laminate 15, wherein a pure Ag plating layer 4, a thin reflective plating layer 6 serving as the uppermost layer for improving the light reflection ratio, and a resistant plating layer 5 serving as an intermediate layer therebetween and having chemical resistance against at least either metal chlorides or metal sulfides are laminated, is formed on at least the surface of a lead electrode. The reflective plating layer 4 is composed of a pure Ag thin film, and the resistant plating layer 5 is composed of a complete solid solution Au—Ag alloy plating layer.

Abstract: A friction drive belt for transmitting power while being wound around a pulley such that a compression rubber layer provided on an inner periphery of a belt body is in contact with the pulley enables both of noise reduction during the run of the belt and greater durability. A plurality of pores 15 having an average size of 5-120 ?m are formed in the compression rubber layer 12 such that the compression rubber layer 12 has an air content of 5-40%.

Abstract: In a friction transmission belt in which a compression rubber layer provided to an inner circumferential side of the belt body is wrapped over pulleys such that the compression rubber layer contacts the pulleys, such a configuration that both of a noise reduction and durability while the belt is running can be achieved is obtained. The compression rubber layer is configured so as not to include short fibers and so as to have a surface roughness, i.e., an Ra of at least a pulley contact surface of the compression rubber layer equal to or more than 3 ?m.

Abstract: An object is to provide a rubber composition that is capable of significantly improving mechanical properties. Another object is to provide a rubber belt that has excellent mechanical properties. Provided are a rubber composition, and a rubber belt formed by using the rubber composition, which is incorporated with a rubber component containing an ethylene/?-olefin copolymer, and an organically treated clay mineral organically treated with an organic ammonium ion, wherein the ethylene content of the ethylene/?-olefin copolymer is in a range of 60-85% by mass, the rubber component has a Mooney viscosity of 10-55 at 125° C., and the organically treated clay mineral is incorporated in 6-30 parts by mass per 100 parts by mass of the rubber component.

Abstract: A layout verification method for verifying a layout of a semiconductor device by a computer having a memory storing layout data and information of operation conditions for a plurality of operation modes in which the semiconductor device is expected to assume during its testing and practical use, the semiconductor device including a semiconductor substrate of one conductivity type, a plurality of wells accommodating at least one of the circuit elements and being applicable to a plurality of different bias voltages in dependence of the operation modes, the method includes specifying combination of all the adjacent pairs of the wells located adjacently to each other within the semiconductor substrate, and the distance of each of all the adjacent pairs of the wells in reference to the layout data, determining, for each of the wells.

Abstract: A lead frame (100) for a semiconductor device is formed by applying nickel plating (102), palladium plating (103), and gold flash plating (104) substantially entirely to lead frame body (101) such as copper thin plate in this order, and further applying silver plating (105) selectively to part of an inner part that is to be enclosed with a package of the semiconductor device. The lead frame (100) may also include a base of the package. The silver plating contributes to an excellent light reflectance and wire bonding efficiency of the inner part, whereas the gold flash plating contributes to an excellent resistance to corrosion and soldering efficiency of an outer part that is outside the package.

Abstract: An object of the present invention is to improve substrate processing efficiency. A substrate processing apparatus has a reaction tube that processes a substrate inside, and a heating apparatus disposed so as to surround an external periphery of the reaction tube, so that at least a gas inlet tube is disposed on a side surface in an area in which the substrate is processed inside the reaction tube, and the heating apparatus has a heat insulator that surrounds the reaction tube, an inlet opening formed in the shape of a groove in the heat insulator from the lower end of the heating apparatus so as to avoid the gas inlet tube, and a heating element disposed between the heat insulator and the reaction tube.