Patents by Inventor Toshiaki Ono

Toshiaki Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977789
    Abstract: A display screen generation apparatus includes: an acquisition portion acquiring for each of a plurality of print products produced through a plurality of processes, progress of the processes; and a display portion generating a display screen that displays for each of the plurality of print products, the process waiting to be executed, the process being executed, the process already executed, and the process not intended to be executed in a distinguishable manner from each other.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: May 7, 2024
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuyuki Minamihara, Kana Ogawa, Toshiaki Kimura, Yoshiki Katsuma, Yuto Fukuchi, Ayako Kobayashi, Satoru Ono, Yuichi Sugiyama
  • Publication number: 20240071756
    Abstract: A method for manufacturing a group III nitride semiconductor substrate, that includes: growing a first AlN buffer layer on an Si substrate at a first growth temperature; growing a second AlN buffer layer on the first AlN buffer layer at a second growth temperature higher than the first growth temperature; and growing a group III nitride semiconductor layer on the second AlN buffer layer, wherein an Al raw material and an N raw material are alternately repeatedly fed in the growing the first AlN buffer layer.
    Type: Application
    Filed: October 25, 2023
    Publication date: February 29, 2024
    Applicant: SUMCO CORPORATION
    Inventors: Koji MATSUMOTO, Toshiaki ONO, Hiroshi AMANO, Yoshio HONDA
  • Patent number: 11901391
    Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: February 13, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takeyoshi Komoto, Masahiko Nakamizo, Toshiaki Ono, Tomonori Yamashita
  • Publication number: 20240038788
    Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes a stacked photoelectric converter for each of pixels. The stacked photoelectric converter has a plurality of photoelectric conversion elements stacked therein. The plurality of photoelectric conversion elements each has different wavelength selectivity. This solid-state imaging device further includes a plurality of data output lines from which pixel signals based on electric charges outputted from the photoelectric conversion elements are outputted. A plurality of data output lines is provided for each predetermined unit pixel column. The plurality of the data output lines is equal in number to an integer multiple of the photoelectric conversion elements stacked in the stacked photoelectric converter.
    Type: Application
    Filed: October 6, 2023
    Publication date: February 1, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Toshiaki ONO
  • Patent number: 11888036
    Abstract: A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: January 30, 2024
    Assignee: SUMCO CORPORATION
    Inventors: Kazuya Kodani, Toshiaki Ono, Kazuhisa Torigoe
  • Patent number: 11885038
    Abstract: A convection pattern estimation method of a silicon melt includes: applying a horizontal magnetic field of 0.2 tesla or more to a silicon melt in a rotating quartz crucible with use of a pair of magnetic bodies disposed across the quartz crucible; before a seed crystal is dipped into the silicon melt to which the horizontal magnetic field is applied; measuring temperatures at a first and second measurement points positioned on a first imaginary line that passes through a center of a surface of the silicon melt and is not in parallel with a central magnetic field line of the horizontal magnetic field as viewed vertically from above; and estimating a direction of a convection flow in a plane in the silicon melt orthogonal to the direction in which the horizontal magnetic field is applied on a basis of the measured temperatures of the first and second measurement points.
    Type: Grant
    Filed: February 27, 2019
    Date of Patent: January 30, 2024
    Assignee: SUMCO CORPORATION
    Inventors: Wataru Sugimura, Ryusuke Yokoyama, Toshiyuki Fujiwara, Toshiaki Ono
  • Publication number: 20240022839
    Abstract: The present technology relates to an imaging device and an imaging method capable of improving image quality of an image captured by the imaging device. The present technology includes: a photoelectric conversion section that performs photoelectric conversion; a first capacitor that holds a first signal from the photoelectric conversion section; a second capacitor that holds a second signal from the photoelectric conversion section; a first reading section that reads the first signal held in the first capacitor; a second reading section that reads the second signal held in the second capacitor; a differential circuit in which the first signal from the first reading section is input at one end and the second signal from the second reading section is input at another end; and an initialization section that initializes the differential circuit. The present technology can be applied to, for example, an imaging device.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Inventor: TOSHIAKI ONO
  • Patent number: 11855108
    Abstract: A solid-state imaging element which detects visible light and ultraviolet light in one pixel provides improved resolution. First and second photoelectric conversion elements each perform photoelectric conversion of incident light. A first accumulation part accumulates electric charges that are photoelectrically converted by the first photoelectric conversion element second accumulation part is disposed on one face of a substrate and accumulates electric charges that are photoelectrically converted by the second photoelectric conversion element. A connection part is connected to the second accumulation part and transfers the electric charges accumulated in the second accumulation part to another face of the substrate.
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: December 26, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoko Iida, Yoshiaki Kitano, Kengo Nagata, Toshiaki Ono, Tomohiko Asatsuma
  • Publication number: 20230412945
    Abstract: The present technology relates to an image pickup apparatus capable of improving image quality of an image captured by the image pickup apparatus. Included are a photoelectric conversion unit that performs photoelectric conversion, a first capacitor and a second capacitor that hold a signal from the photoelectric conversion unit, and an initialization switch that initializes the second capacitor, in which one end of the first capacitor, one end of the second capacitor, and an amplification unit that amplifies a signal from the photoelectric conversion unit are connected, another end of the second capacitor and one end of the initialization switch are connected, and another end of the first capacitor and another end of the initialization switch are connected to a voltage source. The present technology can be applied to, for example, an image pickup apparatus.
    Type: Application
    Filed: October 29, 2021
    Publication date: December 21, 2023
    Inventor: TOSHIAKI ONO
  • Publication number: 20230412943
    Abstract: The present technology relates to an imaging device and an imaging method capable of improving image quality of an image captured by the imaging device. The present technology includes: a photoelectric conversion section that performs photoelectric conversion; a first capacitor that holds a first signal from the photoelectric conversion section; a second capacitor that holds a second signal from the photoelectric conversion section; a first reading section that reads the first signal held in the first capacitor; a second reading section that reads the second signal held in the second capacitor; a differential circuit in which the first signal from the first reading section is input at one end and the second signal from the second reading section is input at another end; and an initialization section that initializes the differential circuit. The present technology can be applied to, for example, an imaging device.
    Type: Application
    Filed: October 26, 2021
    Publication date: December 21, 2023
    Inventor: TOSHIAKI ONO
  • Publication number: 20230303026
    Abstract: Provided are a forming method of forming, with high efficiency, a tear line groove even with a layout of unsuitable for processing for drawing a locus in a unicursal manner, and an instrument panel formed by the forming method. The forming method is a method of forming a tear line groove in an airbag deployment portion, the tear line groove including: an airbag deployment portion forming step of applying, as one die of two dies constituting a cavity into which a molten resin is injected to form the airbag deployment portion, a die having a ridge protruding inwardly in the cavity to form a part of the tear line groove; and a post-processing step of processing the remaining tear line groove, which were not formed in the airbag deployment portion forming step.
    Type: Application
    Filed: February 23, 2023
    Publication date: September 28, 2023
    Inventors: Toshihisa KAGA, Toshiaki ONO, Takaaki NAGATA, Shoichiro NEGISHI
  • Publication number: 20230307505
    Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.
    Type: Application
    Filed: June 5, 2023
    Publication date: September 28, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Kazuhisa TORIGOE, Toshiaki ONO, Shunya KAWAGUCHI
  • Publication number: 20230300495
    Abstract: The present invention is a solid-state imaging device including: a pixel array section including a plurality of unit pixels capable of accumulating charge photoelectrically converted by a photoelectric conversion section in a predetermined floating diffusion (FD) region; a system control section that controls the pixel array section; and a pixel signal reading mechanism that reads a pixel signal based on the charge from the predetermined FD region of a unit pixel of the plurality of unit pixels under control of the system control section. The pixel signal reading mechanism may include an AD converter that performs AD conversion processing on the pixel signal read, and a determination section that performs brightness/darkness determination of light received by the unit pixel on the basis of the pixel signal read in a determination phase.
    Type: Application
    Filed: June 15, 2021
    Publication date: September 21, 2023
    Inventors: Toshiaki Ono, Yorito Sakano, Masaki Sakakibara
  • Patent number: 11695048
    Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: July 4, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Kazuhisa Torigoe, Toshiaki Ono, Shunya Kawaguchi
  • Publication number: 20230133472
    Abstract: A silicon wafer is provided in which a dopant is phosphorus, resistivity is from 0.5 m?·cm to 1.2 m?·cm, and carbon concentration is 3.0×1016 atoms/cm3 or more. The carbon concentration is decreased by 10% or more near a surface of the silicon wafer compared with a center-depth of the silicon wafer.
    Type: Application
    Filed: June 29, 2022
    Publication date: May 4, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Kohtaroh KOGA, Yasuhito NARUSHIMA, Naoya NONAKA, Toshiaki ONO, Masataka HOURAI
  • Publication number: 20230024598
    Abstract: Provided is a semiconductor element capable of inspecting a plurality of wires formed in parallel. A semiconductor element according to an embodiment includes: a first circuit (45B) connected to a first position of each of a plurality of wires of a first wire group (31) including the plurality of wires; a second circuit (45A) connected to a second position corresponding to an end of each of the plurality of wires; and a plurality of connection units (43) that connects a third circuit (14) with each of the plurality of wires, the plurality of connection units (43) being provided on a one-to-one basis to the plurality of wires between the first position and the second position of each of the plurality of wires.
    Type: Application
    Filed: December 14, 2020
    Publication date: January 26, 2023
    Inventors: TOSHIAKI ONO, TADAYUKI TAURA
  • Patent number: 11509842
    Abstract: Provided is a solid-state imaging element configured to automatically extend dynamic range for each unit pixel. A solid-state imaging element includes, for a unit pixel, a first photoelectric conversion element, a first accumulation portion that accumulates electric charge obtained by photoelectric conversion by the first photoelectric conversion element, and a first film that is electrically connected to the first accumulation portion and has an optical characteristic changing according to applied voltage. Furthermore, the unit pixel of the solid-state imaging element can further include a first transfer transistor that transfers electric charge obtained by photoelectric conversion by the photoelectric conversion element to the first accumulation portion, an amplification transistor that is electrically connected to the first accumulation portion, and a selection transistor that is electrically connected to the amplification transistor.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: November 22, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Toshiaki Ono, Satoko Iida, Tomohiko Asatsuma, Yoshiaki Kitano, Yusuke Matsumura, Ryoko Kajikawa
  • Publication number: 20220367555
    Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.
    Type: Application
    Filed: June 26, 2020
    Publication date: November 17, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takeyoshi KOMOTO, Masahiko NAKAMIZO, Toshiaki ONO, Tomonori YAMASHITA
  • Publication number: 20220319851
    Abstract: A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.
    Type: Application
    Filed: June 24, 2022
    Publication date: October 6, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Kazuya KODANI, Toshiaki ONO, Kazuhisa TORIGOE
  • Publication number: 20220093624
    Abstract: A method of reducing warp imparted to a silicon wafer having a (110) plane orientation and a <111> notch orientation by anisotropic film stress of a multilayer film that is to be formed on a surface of the silicon wafer, that includes forming the multilayer film on a surface of the silicon wafer in an orientation so that a direction in which the warp of the wafer will be greatest coincides with a direction in which Young's modulus of a crystal orientation of the silicon wafer is greatest. Also, a method of reducing warp imparted to a silicon wafer having a (111) plane orientation by isotropic film stress of a multilayer film to be formed on a surface of the silicon wafer, that includes, prior to forming the multilayer film, causing the silicon wafer to have an oxygen concentration of 8.0×1017 atoms/cm3 or more (ASTM F-121, 1979).
    Type: Application
    Filed: December 3, 2021
    Publication date: March 24, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Toshiaki ONO, Bong-Gyun KO