Abstract: A display screen generation apparatus includes: an acquisition portion acquiring for each of a plurality of print products produced through a plurality of processes, progress of the processes; and a display portion generating a display screen that displays for each of the plurality of print products, the process waiting to be executed, the process being executed, the process already executed, and the process not intended to be executed in a distinguishable manner from each other.

Abstract: Provided is a semiconductor element capable of inspecting a plurality of wires formed in parallel. A semiconductor element according to an embodiment includes: a first circuit (45B) connected to a first position of each of a plurality of wires of a first wire group (31) including the plurality of wires; a second circuit (45A) connected to a second position corresponding to an end of each of the plurality of wires; and a plurality of connection units (43) that connects a third circuit (14) with each of the plurality of wires, the plurality of connection units (43) being provided on a one-to-one basis to the plurality of wires between the first position and the second position of each of the plurality of wires.

Abstract: A display apparatus includes: a first acquisition portion acquiring progress of a plurality of processes for print product produced through the processes based on information transmitted from a printer; a second acquisition portion acquiring the progress in response to an operation of a user to proceed with the production; and a display portion displaying in a distinguishable manner on a display, an automatic transition process and a manual transition process included in the processes, the automatic transition process automatically transitioning to the subsequent process based on the information transmitted from the printer and a manual transition process manually transitioning to the subsequent process in response to the operation.

Abstract: Provided is a solid-state imaging element configured to automatically extend dynamic range for each unit pixel. A solid-state imaging element includes, for a unit pixel, a first photoelectric conversion element, a first accumulation portion that accumulates electric charge obtained by photoelectric conversion by the first photoelectric conversion element, and a first film that is electrically connected to the first accumulation portion and has an optical characteristic changing according to applied voltage. Furthermore, the unit pixel of the solid-state imaging element can further include a first transfer transistor that transfers electric charge obtained by photoelectric conversion by the photoelectric conversion element to the first accumulation portion, an amplification transistor that is electrically connected to the first accumulation portion, and a selection transistor that is electrically connected to the amplification transistor.

Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.

Abstract: A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.

Abstract: The purpose of the present invention is to reduce the amount of sputtering in a welding method wherein a welding wire feed rate is alternately switched between a forward feed period and a reverse feed period. Provided is an arc welding control method that switches a feed rate Fw for welding wire alternately between a forward feed period and a reverse feed period, repeats a short period and an arc period, and electrifies with a welding current Iw switched to a small current value in the latter half of the arc period, wherein a basic voltage setting value is set according to an average feed rate setting value, the error amplitude value for a voltage setting value and the basic voltage setting value is calculated, and the timing (current reduction time Td) for switching the welding current Iw to the small current value is varied on the basis of the average feed rate setting value and the error amplitude value.

Abstract: A shaped hook member of hook-and-loop fastener including a base plate and a plurality of hook-type engaging elements that rise from a surface of the base plate. The hook-type engaging elements are each tapered from the proximal end to the distal end, and are each curved from a point in the course from the proximal end to the distal end, and the distal end is directed toward the base plate. The plurality of hook-type engaging elements are arranged in rows extending in the same direction as the curving direction of the hook-type engaging elements, and the curving directions of the hook-type engaging elements in two adjacent rows or two adjacent units each of two or more rows are opposite to each other. The base plate and the hook-type engaging element are formed of a semi-aromatic polyamide resin containing a semi-aromatic polyamide and an elastomer.

Abstract: A process control unit (41) causes a plurality of control-target processes to operate in a memory area of a size equal to or smaller than a limiting value x. When a stopping process is detected, a resource allocation unit (43) allocates a size of a usable memory area for each of the control-target processes as a relaxed limiting value. When the stopping process is detected, the process control unit (41) causes each of the control-target processes to perform fallback operation in a memory area of a size equal to or smaller than the relaxed limiting value allocated to the process by the resource allocation unit (43).

Abstract: A method of reducing warp imparted to a silicon wafer having a (110) plane orientation and a <111> notch orientation by anisotropic film stress of a multilayer film that is to be formed on a surface of the silicon wafer, that includes forming the multilayer film on a surface of the silicon wafer in an orientation so that a direction in which the warp of the wafer will be greatest coincides with a direction in which Young's modulus of a crystal orientation of the silicon wafer is greatest. Also, a method of reducing warp imparted to a silicon wafer having a (111) plane orientation by isotropic film stress of a multilayer film to be formed on a surface of the silicon wafer, that includes, prior to forming the multilayer film, causing the silicon wafer to have an oxygen concentration of 8.0×1017 atoms/cm3 or more (ASTM F-121, 1979).

Abstract: At least one solid-state image pickup element includes a plurality of pixels that are arranged in a two-dimensional manner. Each of the plurality of pixels includes a plurality of photoelectric conversion units each including a pixel electrode, a photoelectric conversion layer disposed on the pixel electrode, and a counter electrode disposed such that the photoelectric conversion layer is sandwiched between the pixel electrode and the counter electrode. In one or more embodiments, each of the plurality of pixels also includes a microlens disposed on the plurality of photoelectric conversion units.

Abstract: A silicon wafer having a layer of oxygen precipitates and method of manufacturing thereof wherein the wafer exhibiting robustness characterized as having a ratio of a first average density from a first treatment that to a second average density from a second treatment is between 0.74 to 1.02, wherein the first treatment includes heating the wafer or a portion of the wafer at about 1150° C. for about 2 minutes and then between about 950 to 1000° C. for about 16 hours, and the second treatment includes heating the wafer or a portion of the wafer at about 780° C. for about 3 hours and then between about 950 to 1000° C. for about 16 hours. The wafer exhibits heretofore unattainable uniformity wherein a ratio of an oxygen precipitate density determined from any one cubic centimeter in the BMD layer of the wafer to another oxygen precipitate density from any other one cubic centimeter in the BMD layer of the wafer is in a range of 0.77 to 1.30.

Abstract: A solid-state imaging device according to an embodiment of the present disclosure includes a stacked photoelectric converter for each of pixels. The stacked photoelectric converter has a plurality of photoelectric conversion elements stacked therein. The plurality of photoelectric conversion elements each has different wavelength selectivity. This solid-state imaging device further includes a plurality of data output lines from which pixel signals based on electric charges outputted from the photoelectric conversion elements are outputted. A plurality of data output lines is provided for each predetermined unit pixel column. The plurality of the data output lines is equal in number to an integer multiple of the photoelectric conversion elements stacked in the stacked photoelectric converter.

Abstract: Provided is a method of accurately predicting the thermal donor formation behavior in a silicon wafer, a method of evaluating a silicon wafer using the prediction method, and a method of producing a silicon wafer using the evaluation method. The method of predicting the formation behavior of thermal donors, includes: a first step of setting an initial oxygen concentration condition before performing heat treatment on the silicon wafer for reaction rate equations based on both a bond-dissociation model of oxygen clusters associated with the diffusion of interstitial oxygen and a bonding model of oxygen clusters associated with the diffusion of oxygen dimers; a second step of calculating the formation rate of oxygen clusters formed through the heat treatment using the reaction rate equations; and a third step of calculating the formation rate of thermal donors formed through the heat treatment based on the formation rate of the oxygen clusters.

Abstract: A solid-state image sensor includes a plurality of imaging device blocks each including P×Q imaging devices. In an imaging device block, first charge movement controlling electrodes are provided between the imaging devices, and second charge movement controlling electrodes are provided between the imaging device blocks. In the imaging device block, P imaging devices are arrayed along a first direction, and Q imaging devices are arrayed along a second direction. Charge accumulated in a photoelectric conversion layer of the (P?1)th imaging device from the first imaging device along the first direction is transferred to the photoelectric conversion layer of the Pth imaging device and read out together with charge accumulated in the photoelectric conversion layers of the Q Pth imaging devices, under the control of the first charge movement controlling electrodes.

Abstract: A silicon wafer having a BMD density of 5×108/cm3 or more and 2.5×1010/cm3 or less in a region of 80 ?m to 285 ?m from the wafer surface when the silicon wafer is heat-treated at a temperature X (° C., 700° C.?X?1000° C.) for a time Y (min) and then subjected to an infrared tomography method in which the laser power is set to 50 mW and the exposure time of a detector is set to 50 msec. The time Y and the temperature X satisfy Y=7.88×1067×X?22.5.

Abstract: Provided is a method of producing a high resistance n-type silicon single crystal ingot with small tolerance margin on resistivity in the crystal growth direction, which is suitably used in a power device. In the method of producing a silicon single crystal ingot using Sb or As as an n-type dopant, while a silicon single crystal ingot is pulled up, the amount of the n-type dopant being evaporated from a silicon melt per unit solidification ratio is kept within a target evaporation amount range per unit solidification ratio by controlling one or more pulling condition values including at least one of the pressure in a chamber, the flow volume of Ar gas, and a gap between a guide portion and the silicon melt.

Abstract: A manufacturing method allows growth of a group III nitride semiconductor layer on a Si substrate with an AlN buffer layer interposed between same, so as to suppress group III material from diffusing into the Si substrate. The group III nitride semiconductor substrate manufacturing method includes: a step of forming an AlN coating on the inside of a furnace; steps of installing an Si substrate in the furnace covered with the AlN coating and forming an AlN buffer layer on the Si substrate; and a step of forming a group III nitride semiconductor layer on the AN buffer layer.

Abstract: A solid-state imaging element which detects visible light and ultraviolet light in one pixel provides improved resolution. First and second photoelectric conversion elements each perform photoelectric conversion. of incident light. A first accumulation part accumulates electric charges that are photoelectrically converted by the first photoelectric conversion element. second accumulation part is disposed on one face of a substrate and accumulates electric charges that are photoelectrically converted by the second photoelectric conversion element. A connection part is connected to the second accumulation part and transfers the electric charges accumulated in the second accumulation part to another face of the substrate.

Abstract: Diffusion of a group III material into an Si substrate is suppressed during the time when a group III nitride semiconductor layer is grown on the Si substrate, with an AlN buffer layer being interposed therebetween. A method for manufacturing a group III nitride semiconductor substrate comprises: a step for growing a first AlN buffer layer on an Si substrate; a step for growing a second AlN buffer layer on the first AlN buffer layer at a temperature higher than a growth temperature of the first AlN buffer layer; and a step for growing a group III nitride semiconductor layer on the second AlN buffer layer. The growth temperature of the first AlN buffer layer is 400-600° C.