Abstract: Provided is an imaging device that includes a pixel unit in which each of a plurality of pixels includes m photoelectric conversion units and each of at least a part of the plurality of pixels outputs a first signal based on signal charges of n photoelectric conversion unit or units, where n is less than m; an adder unit configured to add a plurality of first signals output from a plurality of pixels different from each other; a determination unit configured to compare each of the plurality of first signals and a predetermined threshold to determine whether or not the plurality of first signals added by the adder unit include a signal larger than a predetermined threshold; and an output unit configured to output a determination result and the added signal.

Abstract: A manufacturing method of an epitaxial silicon wafer including a silicon wafer doped with boron and having a resistivity of 100 m?•cm or less and an epitaxial film formed on the silicon wafer includes: growing the epitaxial film on the silicon wafer; and applying a heat treatment on the epitaxial silicon wafer at a temperature of less than 900 degrees C.

Abstract: After determining the precipitated oxygen concentration and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress ?cri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained precipitated oxygen concentration and residual oxygen concentration; and the obtained critical shear stress and the thermal stress ? applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress ? is equal to or more than the critical shear stress ?cri, or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress ? is less than the critical shear stress ?cri.

Abstract: An object of the present invention is to provide an epitaxial wafer on which dislocation is preventable even when a LSA treatment is performed in device processes. An epitaxial wafer according to the present invention includes a wafer 11 whose nitrogen concentration is 1×1012 atoms/cm3 or more or whose specific resistance is 20 m?·cm or less by boron doping, and an epitaxial layer 12 provided on the wafer 11. On the wafer 11, if a thermal treatment is performed at 750° C. for 4 hours and then at 1,000° C. for 4 hours, polyhedron oxygen precipitates grow predominantly over plate-like oxygen precipitates. Therefore, in the device processes, plate-like oxygen precipitates cannot be easily formed. As a result, even when the LSA treatment is performed after various thermal histories in the device processes, it is possible to prevent the dislocation, which is triggered by oxygen precipitates, from generating.

Abstract: Ones of row addresses and column addresses of pixels in a first group are the same as those of a second group. A range of the others of the row addresses and the column addresses of the first group excludes that of the second group. A range of the others of row addresses and column addresses is included in a range of the others of the row addresses and the column addresses of the first and second groups. A portion of the range of the others of the row addresses and the column addresses of the first group overlaps with that of the third group, and the other portion of the range of the first group does not overlap with that of the third group. Intra-group addition signals of the first, second, and third groups are obtained.

Abstract: An imaging apparatus includes: pixel circuits (1) arranged in a matrix, each configured to generate a pixel signal by photoelectric conversion; readout circuits (50) each provided correspondingly to each column of the plurality of pixel circuits, and each configured to read out the pixel signals from the pixel circuits of a corresponding column; 2n first output lines (5-1 to 5-8) to which output terminals of every 2n columns of the readout circuits are commonly connected; and an adding unit configured to add the pixel signals from the pixel circuits arranged in different columns. Among the readout circuits on plural columns connected to the pixel circuits which are subjected to adding by the adding unit, only the readout circuit on one column performs the read out, and all of the 2n first output lines receives input of the pixel signals from one of the plural readout circuits.

Abstract: A solid-state image sensor includes an image sensing unit in which a plurality of pixels are arrayed, a plurality of readout units configured to read out signals from the image sensing unit, a detector configured to detect an occurrence of a latch-up in each of the plurality of readout units, and a controller configured to control power supply to the plurality of readout units. The plurality of readout units are configured to read out signals from a same pixel in the image sensing unit. The controller is configured to shut off power supply to at least part of a readout unit in which the occurrence of the latch-up has been detected out of the plurality of readout units and thereafter supply power to the at least part.

Abstract: An image sensor includes a readout unit having a plurality of circuit blocks. At least a part of each of the plurality of circuit blocks is arranged in each of a plurality of regions electrically isolated from each other. When latchup has occurred in a circuit block of the plurality of circuit blocks, the voltage supply unit shuts off supply of a power supply voltage to the region in which the part is arranged, and then performs the supply of the power supply voltage to the region in which the part is arranged, and the voltage supply unit supplies the power supply voltage to the region in which the circuit block without latchup is arranged, while shutting off the supply of the power supply voltage to the region in which the part is arranged.

Abstract: Provided is a method of driving an imaging apparatus, including: a first step of generating, by at least some of a plurality of comparison circuits, a determination signal that indicates a result of a comparison made between an electric potential of a photoelectric conversion signal and a predetermined electric potential; a second step of setting, based on the determination signal generated by the at least some of the plurality of comparison circuits, an amount of change with time of an electric potential of a reference signal, which is input to at least two of the plurality of comparison circuits; and a third step of performing, by each of the plurality of comparison circuits, analog-to-digital conversion of the photoelectric conversion signal based on a result of a comparison made between the photoelectric conversion signal and the reference signal set in the second step.

Abstract: A solid-state image sensor comprising a pixel array in which a plurality of pixels are arrayed in a matrix having a plurality of rows and a plurality of columns, wherein the pixel array includes a first wiring layer and a second wiring layer arranged above the first wiring layer, the first wiring layer includes first column signal lines arranged at the respective columns of the pixel array, and the second wiring layer includes second column signal lines arranged at the respective columns of the pixel array.

Abstract: An image sensor including a pixel unit in which a plurality of pixels are arranged in a matrix, an A/D conversion circuit provided corresponding to each column of the matrix and configured to A/D-convert a pixel signal output from the pixel unit and output digital data corresponding to the pixel signal, a memory provided on each column, and a redundant data generation unit configured to generate redundant data based on a generating rule of an error correction code for the digital data, wherein the digital data and the redundant data are stored in the memory.

Abstract: After determining the size of oxygen precipitates and the residual oxygen concentration in a silicon wafer after heat treatment performed in a device fabrication process; the critical shear stress ?cri at which slip dislocations are formed in the silicon wafer in the device fabrication process is determined based on the obtained size of the oxygen precipitates and residual oxygen concentration; and the obtained critical shear stress ?cri and the thermal stress ? applied to the silicon wafer in the heat treatment of the device fabrication process are compared, thereby determining that slip dislocations are formed in the silicon wafer in the device fabrication process when the thermal stress ? is equal to or more than the critical shear stress ?cri, or determining that slip dislocations are not formed in the silicon wafer in the device fabrication process when the thermal stress ? is less than the critical shear stress ?cri.

Abstract: A method of manufacturing an epitaxial wafer, including a silicon substrate having a surface sliced from single-crystalline silicon and a silicon epitaxial layer deposited on the surface of the silicon substrate, includes an oxygen concentration controlling heat treatment process in which a heat treatment of the epitaxial layer is performed under a non-oxidizing atmosphere after the epitaxial growth such that an oxygen concentration of the surface of the silicon epitaxial layer is set to 1.0×1017 to 12×1017 atoms/cm3 (ASTM F-121, 1979).

Abstract: An epitaxial silicon wafer cut from a silicon single crystal grown by the Czochralski method, and having a diameter of 300 mm or more. In this epitaxial silicon wafer, the time required to cool every part of the silicon single crystal during the growth from 800° C. down to 600° C. is set to 450 minutes or less, the interstitial oxygen concentration is from 1.5×1018 to 2.2×1018 atoms/cm3 (old ASTM standard), the entire surface of the cut silicon wafer is composed of a COP region, and the BMD density in the bulk of the epitaxial wafer after a heat treatment at 1000° C. for 16 hours is 1×104/cm2 or less. In this epitaxial silicon wafer, even if the thermal process in a semiconductor device fabrication process is a low temperature thermal process, epitaxial defects do not occur, as well as sufficient gettering capability being obtainable.

Abstract: A method of manufacturing an epitaxial wafer, including a silicon substrate having a surface sliced from single-crystalline silicon and a silicon epitaxial layer deposited on the surface of the silicon substrate, includes an oxygen concentration controlling heat treatment process in which a heat treatment of the epitaxial layer is performed under a non-oxidizing atmosphere after the epitaxial growth such that an oxygen concentration of the surface of the silicon epitaxial layer is set to 1.0×1017 to 12×1017 atoms/cm3 (ASTM F-121, 1979).

Abstract: The present invention relates to a technology for providing a selection unit configured to perform selection of a bit memory that holds a signal of a first bit of a digital signal from among a plurality of bit memories commonly in a memory unit in each of a plurality of AD conversion units.

Abstract: A manufacturing method of an epitaxial silicon wafer includes: an epitaxial-film-growth step in which an epitaxial film is grown on a silicon wafer in a reaction container, and a temperature reduction step in which a temperature of the epitaxial silicon wafer is reduced from a temperature at which the epitaxial film is grown. In the temperature reduction step, a temperature reduction rate of the epitaxial silicon wafer is controlled to satisfy a relationship represented by R?2.0×10-4X?2.9, where X (?·cm) represents a resistivity of the silicon wafer, and R (degrees C./min) represents the temperature reduction rate for lowing the temperature of the epitaxial silicon wafer from 500 degrees C. to 400 degrees C.

Abstract: An AD conversion unit AD-converts a first analog signal output from a clamping unit and generated based on a signal generated at a first photoelectric conversion unit. Then, while the first analog signal is clamped at a reference level, signals generated based on the signals generated at the first and second photoelectric conversion units are applied to the clamping unit, whereby the AD conversion unit AD-converts a second analog signal output from the clamping unit.

Abstract: An epitaxial silicon wafer cut from a silicon single crystal grown by the Czochralski method, and having a diameter of 300 mm or more. In this epitaxial silicon wafer, the time required to cool every part of the silicon single crystal during the growth from 800° C. down to 600° C. is set to 450 minutes or less, the interstitial oxygen concentration is from 1.5×1018 to 2.2×1018 atoms/cm3 (old ASTM standard), the entire surface of the cut silicon wafer is composed of a COP region, and the BMD density in the bulk of the epitaxial wafer after a heat treatment at 1000° C. for 16 hours is 1×104/cm2 or less. In this epitaxial silicon wafer, even if the thermal process in a semiconductor device fabrication process is a low temperature thermal process, epitaxial defects do not occur, as well as sufficient gettering capability being obtainable.

Abstract: An image pickup apparatus of the present invention includes a clipping circuit that clips the voltage of an input node of an amplifying unit in a pixel. The clipping circuit can operate at least in a time period in which a charge is transferred from a photoelectric conversion unit to the input node of the amplifying unit, and can switch among multiple clipping voltages.