Abstract: An image pickup apparatus of the present invention includes a clipping circuit that clips the voltage of an input node of an amplifying unit in a pixel. The clipping circuit can operate at least in a time period in which a charge is transferred from a photoelectric conversion unit to the input node of the amplifying unit, and can switch among multiple clipping voltages.

Abstract: At least one solid-state image pickup element includes a plurality of pixels that are arranged in a two-dimensional manner. Each of the plurality of pixels includes a plurality of photoelectric conversion units each including a pixel electrode, a photoelectric conversion layer disposed on the pixel electrode, and a counter electrode disposed such that the photoelectric conversion layer is sandwiched between the pixel electrode and the counter electrode. In one or more embodiments, each of the plurality of pixels also includes a microlens disposed on the plurality of photoelectric conversion units.

Abstract: A manufacturing method of an epitaxial silicon wafer includes: an epitaxial-film-growth step in which an epitaxial film is grown on a silicon wafer in a reaction container, and a temperature reduction step in which a temperature of the epitaxial silicon wafer is reduced from a temperature at which the epitaxial film is grown. In the temperature reduction step, a temperature reduction rate of the epitaxial silicon wafer is controlled to satisfy a relationship represented by R?2.0×10-4X?2.9, where X (?·cm) represents a resistivity of the silicon wafer, and R (degrees C./min) represents the temperature reduction rate for lowing the temperature of the epitaxial silicon wafer from 500 degrees C. to 400 degrees C.

Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.

Abstract: A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.

Abstract: A solid-state image sensor comprising a pixel array in which a plurality of pixels are arrayed in a matrix having a plurality of rows and a plurality of columns, wherein the pixel array includes a first wiring layer and a second wiring layer arranged above the first wiring layer, the first wiring layer includes first column signal lines arranged at the respective columns of the pixel array, and the second wiring layer includes second column signal lines arranged at the respective columns of the pixel array.

Abstract: A solid-state image sensor comprising a pixel array in which a plurality of pixels are arrayed in a matrix having a plurality of rows and a plurality of columns, wherein the pixel array includes a first wiring layer and a second wiring layer arranged above the first wiring layer, the first wiring layer includes first column signal lines arranged at the respective columns of the pixel array, and the second wiring layer includes second column signal lines arranged at the respective columns of the pixel array.

Abstract: Each of pixels in a pixel array includes a photoelectric converter and a readout circuit which outputs a signal in accordance with charges generated in the photoelectric converter. The readout circuit includes a group of transistors which are disposed so as to form a current path fed by a current source. The readout circuit of a pixel in a first line in the array and the readout circuit of a pixel in a second line in the array are disposed between the photoelectric converter of the pixel in the first line and the photoelectric converter of the pixel in the second line. Directions of currents respectively flowing through the group of transistors in the readout circuit of the pixel in the first line and the plurality of transistors in the readout circuit of the pixel in the second line are the same.

Abstract: A solid-state imaging apparatus includes: a read out circuit configured to convert the analog signal generated by a pixel into a digital signal. The read out circuit includes an analog circuit, a digital circuit and a logic circuit arranged between the analog circuit and the digital circuit. The analog circuit is formed within first and second semiconductor regions of first and second conductivity type. The logic circuit is formed within third and fourth semiconductor regions of the first and second conductivity types. The digital circuit is formed within a fifth and sixth semiconductor regions of the first and second conductivity types. The first to sixth semiconductor regions are isolated one from another. And, a number of elements included in the logic circuit is smaller than a number of elements included in the digital circuit.

Abstract: An image sensor including a pixel unit in which a plurality of pixels are arranged in a matrix, an A/D conversion circuit provided corresponding to each column of the matrix and configured to A/D-convert a pixel signal output from the pixel unit and output digital data corresponding to the pixel signal, a memory provided on each column, and a redundant data generation unit configured to generate redundant data based on a generating rule of an error correction code for the digital data, wherein the digital data and the redundant data are stored in the memory.

Abstract: A solid-state imaging apparatus includes: a plurality of pixels; a reference signal generating circuit configured to generate a ramp signal; a counter performing a counting operation according to the changing of the ramp signal; a read out circuit having a comparator comparing a signal read out from the pixel with the ramp signal, and converting an analog signal outputted from the pixel to a digital signal; and a control circuit configured to adjust a reset potential to be used when the comparator is reset, wherein the control circuit obtains a conversion value derived by converting an analog signal derived of a reset level of the pixel to a digital signal, and adjusts a reference potential based on the conversion value to make a dynamic range of A/D conversion follow the fluctuation of the reset level of the pixel.

Abstract: A solid-state imaging apparatus improving a read-out speed and a noise-reduction rate comprises: a photoelectric conversion portion configured to convert light into an electric charge; a floating diffusion portion configured to convert the electric charge into a voltage; a transfer transistor configured to transfer the electric charge converted by the photoelectric conversion portion to the floating diffusion portion; an amplifying transistor configured to amplify the voltage of the floating diffusion portion; a selecting transistor configured to output the voltage amplified by the amplifying transistor to an output line; and a switch provided between the output line and a current source, wherein the selecting transistor and the switch are held at an OFF state, during a period of a transition of the transfer transistor from an OFF state to an ON state and during a period of a transition of the transfer transistor from the ON state to the OFF state.

Abstract: An AD conversion unit AD-converts a first analog signal output from a clamping unit and generated based on a signal generated at a first photoelectric conversion unit. Then, while the first analog signal is clamped at a reference level, signals generated based on the signals generated at the first and second photoelectric conversion units are applied to the clamping unit, whereby the AD conversion unit AD-converts a second analog signal output from the clamping unit.

Abstract: A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.

Abstract: An imaging apparatus includes: pixel circuits (1) arranged in a matrix, each configured to generate a pixel signal by photoelectric conversion; readout circuits (50) each provided correspondingly to each column of the plurality of pixel circuits, and each configured to read out the pixel signals from the pixel circuits of a corresponding column; 2n first output lines (5-1 to 5-8) to which output terminals of every 2n columns of the readout circuits are commonly connected; and an adding unit configured to add the pixel signals from the pixel circuits arranged in different columns. Among the readout circuits on plural columns connected to the pixel circuits which are subjected to adding by the adding unit, only the readout circuit on one column performs the read out, and all of the 2n first output lines receives input of the pixel signals from one of the plural readout circuits.

Abstract: A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600° C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10×1017 to 12×1017 atoms/cm3 and a resistivity of 0.03 to 0.01 ?cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900° C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.

Abstract: Each of pixels in a pixel array includes a photoelectric converter and a readout circuit which outputs a signal in accordance with charges generated in the photoelectric converter. The readout circuit includes a group of transistors which are disposed so as to form a current path fed by a current source. The readout circuit of a pixel in a first line in the array and the readout circuit of a pixel in a second line in the array are disposed between the photoelectric converter of the pixel in the first line and the photoelectric converter of the pixel in the second line. Directions of currents respectively flowing through the group of transistors in the readout circuit of the pixel in the first line and the plurality of transistors in the readout circuit of the pixel in the second line are the same.

Abstract: A switched-capacitor input circuit which receives an analog input signal, and samples and holds the analog input signal, comprising a differential amplifier, a first capacitor, one terminal of the first capacitor being connected to a non-inverting input terminal of the differential amplifier, a second capacitor, one terminal of the second capacitor being connected to an inverting input terminal of the differential amplifier, a first switch configured to connect the other terminal of the first capacitor to one of a first reference voltage and a second reference voltage, a second switch configured to connect the other terminal of the second capacitor to one of the first reference voltage and the second reference voltage, and a third switch configured to connect the other terminal of the first capacitor to the other terminal of the second capacitor.

Abstract: A method of manufacturing a silicon wafer provides a silicon wafer which can reduce the precipitation of oxygen to prevent a wafer deformation from being generated and can prevent a slip extension due to boat scratches and transfer scratches serving as a reason for a decrease in wafer strength, even when the wafer is provided to a rapid temperature-rising-and-falling thermal treatment process.

Abstract: A solid-state image sensor, comprising a pixel array complying with a Bayer array, a first signal processor configured to process each of red-pixel and blue-pixel signals output from the pixel array, a second signal processor configured to process each of green-pixel signals output from the pixel array, and a control unit configured to control the pixel array, the first signal processor, and the second signal processor, wherein the solid-state image sensor selects a readout method, by changing timings of the control signals, from a progressive method, an interlace method, and a pseudo-progressive method.