Patents by Inventor Toshihiko Takeuchi

Toshihiko Takeuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9550544
    Abstract: A bicycle handlebar clamp assembly has a handlebar clamp, a fixing nut, and a fixing bolt. The fixing nut includes a threaded bore having a bolt entrance opening and a bolt exit opening. The fixing nut defines a bolt shaft receiving space disposed adjacent the bolt exit opening. The fixing bolt includes a head and a shaft extending from the head. The shaft has a non-threaded portion disposed between two threaded portions. One of threaded portions is disposed closer to the head of the fixing bolt than the other threaded portion. The threaded portions are dimensioned to threadedly engage the threaded bore of the fixing nut. The non-threaded portion has a axial length that is greater than the axial length of the threaded bore of the fixing nut.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 24, 2017
    Assignee: Shimano Inc.
    Inventors: Toshihiko Takeuchi, Yoshimitsu Miki, Shinya Hirotomi
  • Publication number: 20170018631
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film. In the antioxidant film, a width of a region overlapping with the pair of electrodes is longer than a width of a region not overlapping with the pair of electrodes.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Inventors: Shunpei YAMAZAKI, Akihisa SHIMOMURA, Yasumasa YAMANE, Yuhei SATO, Tetsuhiro TANAKA, Masashi TSUBUKU, Toshihiko TAKEUCHI, Ryo TOKUMARU, Mitsuhiro ICHIJO, Satoshi TORIUMI, Takashi OHTSUKI, Toshiya ENDO
  • Publication number: 20170012135
    Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2? of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 12, 2017
    Inventors: Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE
  • Publication number: 20160343867
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Application
    Filed: May 20, 2016
    Publication date: November 24, 2016
    Inventors: Masashi TSUBUKU, Toshihiko TAKEUCHI, Yasumasa YAMANE, Masashi OOTA
  • Patent number: 9478664
    Abstract: A change in electrical characteristics is suppressed and reliability in a semiconductor device using a transistor including an oxide semiconductor is improved. The semiconductor device includes an oxide semiconductor film over an insulating surface, an antioxidant film over the insulating surface and the oxide semiconductor film, a pair of electrodes in contact with the antioxidant film, a gate insulating film over the pair of electrodes, and a gate electrode which is over the gate insulating film and overlaps with the oxide semiconductor film. In the antioxidant film, a width of a region overlapping with the pair of electrodes is longer than a width of a region not overlapping with the pair of electrodes.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yasumasa Yamane, Yuhei Sato, Tetsuhiro Tanaka, Masashi Tsubuku, Toshihiko Takeuchi, Ryo Tokumaru, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toshiya Endo
  • Patent number: 9443592
    Abstract: A manufacturing method of a semiconductor device in which the threshold is corrected is provided. In a semiconductor device including a plurality of transistors each includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit for supplying a signal to the gate electrode and a circuit for supplying a signal to the source or drain electrode are electrically separated from each other. The process is performed in the state where the potential of the former circuit is set higher than the potential of the latter circuit.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: September 13, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Yasuhiko Takemura, Tetsuhiro Tanaka, Takayuki Inoue, Toshihiko Takeuchi, Yasumasa Yamane, Shunpei Yamazaki
  • Patent number: 9443990
    Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted is provided. In a semiconductor device including a plurality of transistors arranged in a matrix each including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit that supplies a signal to the gate electrode (e.g., word line driver) is provided with a selection circuit formed of an OR gate, an XOR gate, or the like, whereby potentials of word lines can be simultaneously set higher than potentials of bit lines.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: September 13, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Yasuhiko Takemura, Tetsuhiro Tanaka, Takayuki Inoue, Toshihiko Takeuchi, Yasumasa Yamane, Shunpei Yamazaki
  • Patent number: 9397153
    Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2? of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: July 19, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Toshihiko Takeuchi, Yasumasa Yamane
  • Patent number: 9349875
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: May 24, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masashi Tsubuku, Toshihiko Takeuchi, Yasumasa Yamane, Masashi Oota
  • Patent number: 9337475
    Abstract: A power storage device in which silicon is used as a negative electrode active material layer and which can have an improved performance such as higher discharge capacity, and a method for manufacturing the power storage device are provided. A power storage device includes a current collector and a silicon layer having a function as an active material layer over the current collector. The silicon layer includes a thin film portion in contact with the current collector, a plurality of bases, and a plurality of whisker-like protrusions extending from the plurality of bases. A protrusion extending from one of the plurality of bases is partly combined with a protrusion extending from another one of the plurality of bases.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: May 10, 2016
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Toshihiko Takeuchi, Minoru Takahashi, Takeshi Osada, Teppei Oguni, Kazuki Tanemura
  • Publication number: 20160111546
    Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.
    Type: Application
    Filed: October 15, 2015
    Publication date: April 21, 2016
    Inventors: Sachiaki TEZUKA, Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Hideomi SUZAWA, Suguru HONDO
  • Publication number: 20160054362
    Abstract: A current measurement method with which an extremely low current can be measured is provided. In the method, a charge written to a first terminal of a capacitor through a transistor under test is retained, data on the correspondence between a potential V of the first terminal of the capacitor and Time t is generated, and a stretched exponential function represented by Formula (a1) is fitted to the data to determine parameters of Formula (a1). The derivative of Formula (a1) with respect to time gives a stretched exponential function describing an off-state current of the transistor under test. The potential of the first terminal of the capacitor is measured using an on-state current of a transistor whose gate is connected to the first terminal of the capacitor.
    Type: Application
    Filed: August 20, 2015
    Publication date: February 25, 2016
    Inventors: Masashi TSUBUKU, Shunpei YAMAZAKI, Hidetomo KOBAYASHI, Kazuaki OHSHIMA, Masashi FUJITA, Toshihiko TAKEUCHI
  • Patent number: 9263514
    Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2? of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: February 16, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuhiro Tanaka, Toshihiko Takeuchi, Yasumasa Yamane
  • Publication number: 20160005871
    Abstract: A transistor with a small subthreshold swing value is provided. A transistor with a low density of shallow interface states at an interface between a semiconductor and a gate insulator is provided. A transistor with favorable electrical characteristics is provided. A semiconductor device includes an insulator, a semiconductor, and a conductor. The semiconductor includes a region in which the semiconductor and the conductor overlap each other with the insulator positioned therebetween, and the density of shallow interface states at an interface between the semiconductor and the insulator in the region is lower than or equal to 1×1013 cm?2.
    Type: Application
    Filed: June 29, 2015
    Publication date: January 7, 2016
    Inventors: Shinpei MATSUDA, Toshihiko TAKEUCHI, Daisuke MATSUBAYASHI
  • Publication number: 20150364610
    Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.
    Type: Application
    Filed: June 8, 2015
    Publication date: December 17, 2015
    Inventors: Masashi TSUBUKU, Toshihiko TAKEUCHI, Yasumasa YAMANE, Masashi OOTA
  • Publication number: 20150322146
    Abstract: The present disclosure relates, in general, to materials and methods for antibodies specific for transforming growth factor beta (TGF?), including TGF?1, TGF?2 and TGF?3, and uses of these antibodies in the treatment of subjects having cancer, an eye disease, condition or disorder, fibrosis, including ophthalmic fibrosis or fibrosis of the eye, and other conditions or disorders related to TGF? expression.
    Type: Application
    Filed: July 24, 2015
    Publication date: November 12, 2015
    Inventors: Daniel Bedinger, Shireen S. Khan, Amer Mirza, Ajay J. Narasimha, Toshihiko Takeuchi
  • Patent number: 9174697
    Abstract: A bicycle operating device comprises an operating unit, a mounting member, and a positioning structure. The operating unit includes a first portion. The mounting member includes a second portion configured to be connected with the first portion of the operating unit. The positioning structure is configured to adjustably position the first portion with respect to the second portion in a first direction and a second direction. The positioning structure comprises an abutment member and a fixing member. The abutment member is arranged opposite to the first portion with respect to the second portion. The fixing member is configured to fix the second portion with respect to the first portion by sandwiching the second portion between the first portion and the abutment member.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: November 3, 2015
    Assignee: SHIMANO INC.
    Inventors: Yoshimitsu Miki, Yasuhisa Watanabe, Kazutaka Fukao, Toshihiko Takeuchi
  • Patent number: 9166021
    Abstract: Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: October 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiaki Tezuka, Tetsuhiro Tanaka, Toshihiko Takeuchi, Hideomi Suzawa, Suguru Hondo
  • Publication number: 20150284047
    Abstract: A bicycle component fixing structure has a fixing nut that is configured to be coupled to a handlebar clamp and a fixing bolt. The fixing nut includes a threaded bore with an entrance opening and an exit opening. The threaded bore has a first axial length between the entrance and exit openings. The fixing nut defines a bolt shaft receiving space that is disposed adjacent the bolt exit opening. The fixing bolt includes a head and a shaft. The shaft has a non-threaded portion disposed between first and second threaded portions. The first threaded portion is disposed closer to the head of the fixing bolt than the second threaded portion. The first and second threaded portions threadedly engage the threaded bore of the fixing nut. The non-threaded portion has a second axial length that is greater than the first axial length of the threaded bore of the fixing nut.
    Type: Application
    Filed: June 23, 2015
    Publication date: October 8, 2015
    Inventors: Toshihiko TAKEUCHI, Yoshimitsu MIKI, Shinya HIROTOMI
  • Patent number: 9145458
    Abstract: The present disclosure relates, in general, to materials and methods for antibodies specific for transforming growth factor beta (TGF?), including TGF?1, TGF?2 and TGF?3, and uses of these antibodies in the treatment of subjects having cancer, an eye disease, condition or disorder, fibrosis, including ophthalmic fibrosis or fibrosis of the eye, and other conditions or disorders related to TGF? expression.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: September 29, 2015
    Assignee: XOMA TECHNOLOGY LTD.
    Inventors: Daniel Bedinger, Shireen S. Khan, Amer Mirza, Ajay J. Narasimha, Toshihiko Takeuchi