Patents by Inventor Toshio Yoshida

Toshio Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050280421
    Abstract: Vehicles (1-1) or ships (1-2) each carry a magnetic force line sensor (11), a GPS position detector (12), and a data transmitter (13) and travel within an observation area transmitting magnetic field data and position data of each point to an earthquake prediction center (4). A telluric current induction field estimation unit (43) of the earthquake prediction center (4) estimates telluric current induction fields based on the observation data that it receives and collects. A telluric current estimation unit (44) estimates telluric currents based on the results of estimating the telluric current induction fields. A telluric current induction field intensity change pattern generation unit (45) generates patterns that indicate the change over time of the intensity of telluric current induction fields.
    Type: Application
    Filed: August 18, 2004
    Publication date: December 22, 2005
    Applicant: NEC MOBILING, LTD.
    Inventors: Tomonari Yomoda, Toshio Yoshida
  • Publication number: 20050232520
    Abstract: A slider is constituted by a main body made of a metal and a frame member and an end cap made of a synthetic resin. The main body is provided with a rolling groove. The frame member is provided with a return passage and an inner side groove of a direction changing passage. The end cap is provided with an outer side groove of the direction changing passage. A longest outer dimension in a slider width direction between lower end portions of inner legs of the main body is made to be larger than a shortest dimension in the slider width direction between projected portions of the frame member. The frame member is detachably engaged with the main body by putting a side of a leg portion of the main body to and from a side of a frame member horizontal portion by elastically deforming the frame member.
    Type: Application
    Filed: September 7, 2004
    Publication date: October 20, 2005
    Inventors: Yasuyuki Yamazaki, Toshio Yoshida
  • Patent number: 6883069
    Abstract: A cache control device comprises a command control section 43 for receiving a cache deterioration report and generating a cache flush mode initiation signal which performs degeneration of the cache 44, a software interrupt section 52 for interrupting the supply of commands from software in response to the cache flush mode initiation signal, a command generating section 53a for generating fetch requests in which cache data flushing occurs to the cache in response to the cache flush mode initiation signal, an address generating section 54 for generating addresses for flushing the cache data in response to the cache flush mode initiation signal, and a request counter 58 for specifying ways at which flushing of the cache will be performed, whereby degeneration is possible where different CPUs are mounted in the system, or where a CMP micro architecture is employed, without the necessity of changing the system hardware or OS, or making additions to the computer architecture.
    Type: Grant
    Filed: January 17, 2003
    Date of Patent: April 19, 2005
    Assignee: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040220778
    Abstract: An object is to provide a remote maintenance system which can present a client with an avoiding action against the occurrence of an abnormality in the future. It is structured by a data measuring part 180 which measures operation data of a maintenance-receiving equipment of a client and outputs it, a residual lifetime predicting part 50 which receives the operation data outputted from the data measuring part 180 via the Internet 1, makes a diagnosis of the maintenance-receiving equipment, and predicts a residual lifetime of the maintenance-receiving equipment or its part, and a notifying part 40 which writes the result of the residual lifetime prediction by the residual lifetime predicting part 50 to an electric mail and notifies it to the client via the Internet 1.
    Type: Application
    Filed: April 28, 2004
    Publication date: November 4, 2004
    Inventors: Kanehisa Imai, Junji Shirai, Toshio Yoshida, Kiyoshi Fujiwara, Hiromichi Fukuoka
  • Publication number: 20040006670
    Abstract: A cache control device comprises a command control section 43 for receiving a cache deterioration report and generating a cache flush mode initiation signal which performs degeneration of the cache 44, a software interrupt section 52 for interrupting the supply of commands from software in response to the cache flush mode initiation signal, a command generating section 53a for generating fetch requests in which cache data flushing occurs to the cache in response to the cache flush mode initiation signal, an address generating section 54 for generating addresses for flushing the cache data in response to the cache flush mode initiation signal, and a request counter 58 for specifying ways at which flushing of the cache will be performed, whereby degeneration is possible where different CPUs are mounted in the system, or where a CMP micro architecture is employed, without the necessity of changing the system hardware or OS, or making additions to the computer architecture.
    Type: Application
    Filed: January 17, 2003
    Publication date: January 8, 2004
    Applicant: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040006687
    Abstract: A following CC read instruction which is decoded simultaneously with a previous CC update instruction is developed into a multiflow. The first flow is set to a no-operation. A CC renaming update is executed by a CC renaming map update processing unit by the decoding of the previous CC update instruction. The resultant instruction is stored into a CC read instruction multiflow instruction word register. At the next second flow, the CC read instruction is issued from the multiflow instruction word register and, in a state where another instruction is not simultaneously issued, a CC renaming map is referred to by a CC renaming map reference processing unit by the decoding of the CC read instruction.
    Type: Application
    Filed: January 21, 2003
    Publication date: January 8, 2004
    Applicant: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040006682
    Abstract: When all of a plurality of instructions are symmetry instructions, a symmetry instruction issuing unit issues the symmetry instructions to a plurality of reservation stations provided for every different arithmetic operating units until they become full. If it is determined that there is an asymmetry instruction among the plurality of instructions and the residual instructions are the symmetry instructions, an asymmetry instruction issuing unit 56 develops the asymmetry instruction into a multiflow of a previous flow and a following flow, issues the asymmetry instruction to the reservation station provided in correspondence to the specific arithmetic operating unit, and issues the residual symmetry instructions to the plurality of reservation stations provided for every different arithmetic operating units in an issuing cycle different from that of the asymmetry instruction until they become full.
    Type: Application
    Filed: January 23, 2003
    Publication date: January 8, 2004
    Applicant: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040006685
    Abstract: When a predetermined instruction is fetched and decoded, an instruction issuing unit develops the instruction operation into a multiflow of a previous flow and a following flow and issues the instruction by in-order. It is held into a reservation station. An instruction executing unit executes the instruction held in the reservation station by out-of-order. Further, an execution result of the instruction is committed by in-order. A multiflow guarantee processing unit guarantees an execution result of the previous flow stored in an allocation register on a register update buffer until the following flow is committed. Even if the previous flow is committed and the allocation register is released, the guaranteeing process is realized by stalling another instruction serving as a next register allocation destination in a decoding cycle until the following flow is committed.
    Type: Application
    Filed: January 21, 2003
    Publication date: January 8, 2004
    Applicant: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040006686
    Abstract: A latest register update buffer which stores latest register update data is allocated and prepared every general register for storing source data. A latest register update processing unit stores a value in the general register as latest register update data into the latest register update buffer when a register update instruction is not speculatively executed, and overwrites a result of the speculative execution when the instruction is speculatively executed. Upon instruction decoding, a matching processing unit reads out the latest register update data from the latest register update allocation buffer and stores it into a data area in a reservation station.
    Type: Application
    Filed: January 21, 2003
    Publication date: January 8, 2004
    Applicant: Fujitsu Limited
    Inventor: Toshio Yoshida
  • Publication number: 20040003205
    Abstract: An apparatus for efficient parallel executing instruction avoiding the usage of cross bypasses, the apparatus including an instruction buffer for storing instructions, of decoders for decoding, in parallel, the instructions which simultaneously issue from the instruction buffer, executing units for executing the instructions decoded in the decoders, and an instruction-issuing controlling means for controlling the issuing of the instructions in such a way that, when the instructions are executed, one of the plural executing units executes instructions more frequently than the rest of the plural executing units. The apparatus is preferably incorporated in an information processor to superscalar or out-of-order instruction execution.
    Type: Application
    Filed: January 10, 2003
    Publication date: January 1, 2004
    Applicant: Fujitsu Limited
    Inventors: Susumu Akiu, Masaki Ukai, Toshio Yoshida
  • Patent number: 6524374
    Abstract: In order to aim at shortening the time of refueling by maintaining the function of prevention of discharge of vapor, similar to that of a conventional canister in the case of other than refueling during resting of an engine while the flow resistance in the canister becomes smaller during refueling, there is provided a canister in which a plate is vertically arranged in a chamber charged therein with absorbent in the canister, and filter support pins are projected from opposite surfaces of the plate while filters are arranged at the tip end faces of the filter support pins, and in which a plurality of constriction passages are formed being arranged in a horizontal direction only in the upper part of the plate.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: February 25, 2003
    Assignee: Aisan Kogyo Kabushiki Kaisha
    Inventors: Masatoshi Moriyama, Toshio Yoshida
  • Patent number: 6525351
    Abstract: A high-concentration light-receiving N-layer 32 is formed by ion implantation in a region near a substrate surface, and a low-concentration N-type epitaxial layer 25 is formed by epitaxial growth in a deeper region. The depletion layer of a photodiode is thus expanded to a deep portion of the substrate by the low-concentration N-type region 25, by which a photoelectric conversion effect on incident light of a long wavelength is increased to improve sensitivity. In the above stage, a deepest potential portion is formed on the substrate surface side. Therefore, a depletion voltage can be prevented from rising. Further, an intermediate-concentration N-type epitaxial layer 23 and a high-concentration N-type epitaxial layer 22 are formed in a stack of two layers by epitaxial growth in a region deeper than a region in which a first P-type layer 24, or a barrier region is formed, by which a shutter voltage can be prevented from rising.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: February 25, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshio Yoshida
  • Patent number: 6523701
    Abstract: A cassette for supporting substrates and an elongated rib therefor is described and represents a further improvement in the previously proposed elongated rib systems of the prior art and is designed particularly to preclude deflection and dampen vibrations of loaded substrates. The elongated ribs for the cassette project from side panels utilizing an elongated rib structure including three segments; namely, a base resin body, a bar-like intermediate resin body extending from the base resin body, and a terminal resin body disposed at the forward end of the intermediate resin body. Preferably, the elongated rib structure includes a linearreinforcing member inserted fromthe base resin body to the intermediate resin body or, alternatively, from the base resin body through the intermediate resin body to the terminal resin body.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: February 25, 2003
    Assignees: Yodogawa Kasei Kabushiki Kaisha, Sharp Kabushiki Kaisha
    Inventors: Toshio Yoshida, Yuji Amano, Taimi Oketani, Masayuki Tsuji, Isao Saraoka
  • Patent number: 6499581
    Abstract: A coin discriminating apparatus includes a magnetic sensor for detecting magnetic properties of a coin being transported and producing magnetic data of the coin, an optical sensor for producing optical data of the coin, a reference optical data memory for storing reference optical data of an obverse surface and a reverse surface of coins of each denomination, a reference magnetic data memory for storing reference magnetic data of an obverse surface and a reverse surface of coins of each denomination to be discriminated, a first coin discriminator for comparing optical data of the coin produced by the optical sensor with reference optical data of an obverse surface and a reverse surface of coins of each denomination and determining whether or not the coin is acceptable and the denomination of the coin, and a second coin discriminator for reading from the reference magnetic data memory magnetic reference data selected depending upon whether reference optical data of the obverse surface of a coin of a certain de
    Type: Grant
    Filed: December 18, 2000
    Date of Patent: December 31, 2002
    Assignee: Laurel Bank Machines Co., Ltd.
    Inventors: Toshio Yoshida, Takao Moritani, Shigetoshi Imai
  • Patent number: 6466740
    Abstract: A lens-fitted film unit has a simple structured lens mechanism that can adapt to photographing under close-up photographing and normal photographing and also with a finder that enable a photographer to check the photographing field from the front in close-up photographing and take pictures including the photographer in a composition. The unit is provided with a selector member selecting a focus adjusting position between a normal photographing position and a close-up photographing position.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: October 15, 2002
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Toshio Yoshida, Fuminori Kawamura, Osamu Noguchi, Takashi Tobioka
  • Patent number: 6465821
    Abstract: A CCD area sensor has an effective pixel region for detecting optical information of a subject and an ineffective pixel region for detecting optical black. On a light-receiving region in the ineffective pixel region, a light shielding film is provided with an opening portion. This enables hydrogen ions to be sufficiently diffused from a passivation film made of a P—SiN film toward a silicon substrate in a hydrogen annealing process even though the light shielding film is made of a material such as a high-melting point metal of TiW that is hard for hydrogen ions to penetrate. As a result, interface state densities in a light-receiving region and a transfer channel region are reduced, and a dark-time output voltage of the ineffective pixel region is reduced to be equivalent to that of the effective pixel region. Thus, no difference occurs between the effective pixel region and the ineffective pixel region in terms of the black level.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: October 15, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshio Yoshida, Yoshinori Kamada
  • Publication number: 20020128896
    Abstract: In an information display method applied to an information management system for managing a plurality of jobs, a plurality of information items, respectively associated with the plurality of jobs, are stored. When a user designates an attribute serving as a reference for information classification, information contained in the plurality of information items is classified with reference to the designated attribute and the classified information is displayed.
    Type: Application
    Filed: March 4, 2002
    Publication date: September 12, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyuki Matsuda, Toshio Yoshida, Tsuyoshi Matsuzaki, Ichirou Kikukawa
  • Publication number: 20020120489
    Abstract: There is provided an information management method of managing information generated in a group including a plurality of persons. In case of receiving a first request, first information indicating a hierarchical order of a plurality of jobs is displayed on a screen. In case of receiving a second request, second information indicating a time sequence in executing the plurality of jobs is displayed on a screen. In case of receiving a third request, third information indicating a relationship between each job and a final product finally produced in executing that job is displayed on a screen. In case of receiving a fourth request, fourth information indicating a relationship between each job and an intermediate product generated during that job is displayed on a screen.
    Type: Application
    Filed: February 28, 2002
    Publication date: August 29, 2002
    Inventors: Kazuyuki Matsuda, Toshio Yoshida, Tsuyoshi Matsuzaki, Ichirou Kikukawa
  • Patent number: 6391068
    Abstract: The present invention provides a flat cell that employs strip-shaped electrode plates on which an active material layer has been formed by coating paste or by electrolytic deposition on both sides or one side of a core material consisting of a metal foil.
    Type: Grant
    Filed: January 5, 2001
    Date of Patent: May 21, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshio Yoshida, Kazuo Omine
  • Patent number: 6376231
    Abstract: The improved sample loading sheet for loading an assay sample in specified lane positions in a gel electrolyte layer in an electrophoresis plate to be used in a gel electrophoretic apparatus is formed of cation-exchange chromatographic paper and has part or all of at least one of its principal surfaces coated with a water-resistant resin film. The sheet enables DNA samples to be positively absorbed and migrate to produce ladder patterns at high resolution.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: April 23, 2002
    Assignee: Hitachi Electronics Engineering Co., Ltd.
    Inventors: Tomoichi Enomoto, Hisashi Hagiwara, Kazuyoshi Kurihara, Toshio Yoshida, Yusuke Miyazaki