Patents by Inventor Toshiyuki Honda

Toshiyuki Honda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8527691
    Abstract: A nonvolatile storage device includes a controller and a nonvolatile memory. The controller has: a logical-physical address conversion part for converting a logical address designated by a host device into a physical address; and a boot code address conversion part for converting boot code address information designated by the host device into a physical address. After the power-on and before the logical-physical address conversion part becomes usable, a boot code is read from a part of region which can be accessed by designating a logical address from the host device by designating the boot code address information from the outside. Thus, it is possible to rapidly start the nonvolatile memory system after the power-on. In the state where the logical-physical address conversion part can be used, data-reading and data-writing are carried out by designating a logical address from the host device.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: September 3, 2013
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Honda, Masayuki Toyama, Masahiro Nakanishi
  • Patent number: 8484409
    Abstract: A controller includes a control unit for controlling writing and/or reading of data to and from physical block based on a logical address from a host device, a logical defective cluster table for storing information concerning a logical address of a logical defective cluster which is one or more partial areas within the effective logical address range and an address conversion table for storing corresponding information of a logical address of the effective logical address range and a physical address of the physical block on the data stored in the physical block. Upon receiving a data write command from the host device for writing data to the logical address stored in the logical defective cluster table, the control unit disables the reflection of writing of data for the logical address to the physical block.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Patent number: 8431589
    Abstract: There are provided compounds of formula I wherein X, R1, R2, R3, R4, R5, R6, R7, R8 and R9 are as indicated in claim 1 , useful in disorders where ZAP-70 and/or Syk inhibition plays a role or caused by a malfunction of signal cascades connected with FAK.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: April 30, 2013
    Assignee: Novartis AG
    Inventors: Rolf Baenteli, Gerhard Zenke, Nigel Graham Cooke, Rudolf Duthaler, Gebhard Thoma, Anette Von Matt, Toshiyuki Honda, Naoko Matsuura, Kazuhiko Nonomura, Osamu Ohmori, Ichiro Umemura, Klaus Hinterding, Christos Papageorgiou
  • Patent number: 8411197
    Abstract: An image pickup device is disclosed that has little deformation caused by thermal expansion of a transparent resin for sealing an image pickup element. The image pickup device includes an image pickup element having a light receiving surface, a micro-lens for condensing incident light to the image pickup element, a first transparent plate disposed on the light receiving surface of the image pickup element with the micro-lens in between, a transparent resin that seals the image pickup element and the first transparent plate, and a second transparent plate disposed on the transparent resin to face the first transparent plate.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: April 2, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Naoyuki Watanabe, Toshiyuki Honda, Yoshito Akutagawa, Susumu Moriya, Izumi Kobayashi
  • Patent number: 8413016
    Abstract: In a nonvolatile memory device of the present application, when data of each write unit is read from a nonvolatile memory, an all-clear detector detects whether the read data is already cleared, and a control portion judges whether a flag is already written into a written flag area of the data that has been descrambled by a descrambler and then corrected by an error detection and correction portion. Using a scramble pattern that is generated by a scramble pattern generator and corresponds to the written flag area, a predetermined bit pattern is scrambled to a state that differs from the cleared state.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: April 2, 2013
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Patent number: 8375238
    Abstract: A memory controller takes in the first to (N?1)th pieces of data respectively in synchronization with the second to Nth return read clocks. The memory controller takes in the Nth piece of data from stop of output of the Nth read clock and before a first predetermined time. The memory controller sets an output period of the Nth read clock to be longer than an output period of each of the first to (N?1)th read clocks.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: February 12, 2013
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Patent number: 8356237
    Abstract: The invention is intended to curtail the circuit scale of the error correction circuit of a flash memory.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: January 15, 2013
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Publication number: 20120317340
    Abstract: A non-volatile storage device comprises non-volatile memories for storing data; and a memory controller for carrying out control of the non-volatile memory. The memory controller stores second error correcting code as well as first error correcting code stored in the same page of the data. The memory controller, when writing data smaller than a predefined size, does not add the second error correcting code, and stores duplexed data of the data and the first correcting code in a different page. The memory controller, when reading, corrects data using the first and/or second correcting code. The valid data management table manages which logical block stores valid data with respect to an identical logical address.
    Type: Application
    Filed: March 30, 2012
    Publication date: December 13, 2012
    Inventors: Hirokazu SO, Toshiyuki Honda
  • Publication number: 20120317341
    Abstract: A non-volatile storage device, which communicates with an access device and carries out reading and/or writing of data in accordance with a command from the access device, the device comprises one or more non-volatile memories for storing data and a memory controller for carrying out control of the non-volatile memory. The memory controller writes data to the error correcting group and writes a provisional error correcting code with respect to the data to the parity table if a data size is smaller than the first size when writing the data.
    Type: Application
    Filed: May 4, 2012
    Publication date: December 13, 2012
    Inventors: Hirokazu So, Toshiyuki Honda
  • Publication number: 20120317458
    Abstract: A non-volatile storage device includes one or more non-volatile memories for storing data, and a memory controller for carrying out the control of the non-volatile memory. The non-volatile memory includes the plurality of blocks, which are erase units, and the block includes the plurality of pages, which are write units of data, in each of the blocks at least one set of pages existing which include at least two pages sharing one word line. The memory controller configures a plurality of error correcting groups, each including at least one data page, which is a page for storing data, and at least one error correcting code page for storing a code for error correcting calculation of the data page, and assigns a page of a separate word line with respect to each of the data page and the error correcting page in the same error correcting group.
    Type: Application
    Filed: May 3, 2012
    Publication date: December 13, 2012
    Inventors: Hirokazu SO, Toshiyuki Honda
  • Patent number: 8312247
    Abstract: A plural-partitioned type nonvolatile storage device which solves the problem that a memory card composed of a flash memory and a controller, when a storage area is divided into a plurality of partitions, cannot be correctly used with a conventional host apparatus incapable of recognizing plural partitions. The memory card includes, as its storage areas, a device characteristic data storage area, a division table storage area, and a device storage area, where the device storage area is partitioned into plural partitions. The memory card can have different modes for adapting different accesses from the external host, and allows the external host to access partitions corresponding to the mode. Division information as to a dividing method for the plural partitions, and access information as to the host-accessible partitions corresponding to each individual mode are stored in the division table storage area.
    Type: Grant
    Filed: June 17, 2009
    Date of Patent: November 13, 2012
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Patent number: 8307149
    Abstract: A nonvolatile memory device (101) includes a plurality of physical blocks, each of which is provide with a nonvolatile memory (103), a logic/physical address conversion table, a temporary block and a temporary table. The nonvolatile memory (103) includes a plurality of pages which are predetermined writing units, respectively. The logical-physical address conversion table (106) stores correspondence information between logic addresses and physical addresses of data to be stored in the physical blocks. The temporary block is a physical block to store data that are smaller in size than those of the page. The temporary table (107) stores correspondence information between logic addresses and physical addresses with respect to data to be stored in the temporary block.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: November 6, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Honda, Hirokazu So, Shigekazu Kogita, Masayuki Toyama, Seiji Nakamura, Masato Suto, Manabu Inoue
  • Publication number: 20120185121
    Abstract: The electric-vehicle control device is used in an electric vehicle which is provided with a vehicle body having a driving tire and an axle shaft and with a driving motor which imparts torque to the driving tire. The electric-vehicle control device issues a motor control command to the driving motor. The electric-vehicle control device is provided with a control unit, and the control unit gives feedback control to the driving motor by vibration parameters indicating vertical vibration of the electric vehicle at the center of the axle shaft.
    Type: Application
    Filed: April 12, 2010
    Publication date: July 19, 2012
    Inventors: Ryuichi Umehara, Osamu Nakakita, Masataka Kawaguchi, Toshiyuki Honda, Wataru Mizunuma
  • Patent number: 8214714
    Abstract: A nonvolatile storage device includes a nonvolatile memory for storing data such as a flash memory, and a controller for controlling writing or reading of data to or from the nonvolatile memory. The nonvolatile memory stores control information (control program, control parameter) specifying a method of controlling writing or reading of data to or from the nonvolatile memory. The controller determines a type of the nonvolatile memory, and acquires the control information from the nonvolatile memory according to an acquisition procedure corresponding to the type of the nonvolatile memory, and stores (loads) the control information.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: July 3, 2012
    Assignee: Panasonic Corporation
    Inventor: Toshiyuki Honda
  • Publication number: 20120151166
    Abstract: Upon copying data stored on a page in a copy source block of a nonvolatile memory (104) to a page of a copy destination block, an access control unit (108) of a memory controller (103) copies data stored on a page associated with a first copy method to a page of the copy destination block after error correction by an error correction control unit (109), copies data stored on a page associated with a second copy method to a page of the copy destination block without performing the error correction by the error correction control unit (109) according to a copy mode stored in a copy mode storage area, and changes the copy mode associated with the copy destination block to a copy mode that is different from the copy mode of the copy source block.
    Type: Application
    Filed: February 2, 2011
    Publication date: June 14, 2012
    Inventors: Masato Suto, Toshiyuki Honda
  • Patent number: 8168252
    Abstract: The present invention provides an electromagnetic wave shielding material that has high electromagnetic wave shielding effects, excellent transparency, and excellent see-through property, and a simple and inexpensive production process for the electromagnetic wave shielding material. Specifically, the present invention provides a process for producing an electromagnetic wave shielding material, the process comprising screen-printing in a geometric pattern a conductive paste containing a particulate silver oxide, a tertiary fatty acid silver salt, and a solvent, onto a transparent porous layer surface of a transparent resin substrate having a transparent porous layer containing as a main component at least one member selected from the group consisting of oxide ceramics, non-oxide ceramics, and metals; and performing heat treatment to form a conductive region with a geometric pattern on the transparent porous layer surface; and an electromagnetic wave shielding material produced by the production process.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: May 1, 2012
    Assignees: Gunze Limited, Fujikura Kasei Co., Ltd.
    Inventors: Atsushi Okada, Akio Kiyohara, Hideki Tanaka, Toshiyuki Honda, Masafumi Ito, Junichi Kato, Noboru Toshima, Yasuhisa Nakao
  • Patent number: 8169848
    Abstract: Power consumption required for making a nonvolatile storage device having a radio communication function operate as a file server for a radio host device is great for a host device which supplies the power. The present invention enables a user to operate a host device to which the nonvolatile storage device having the radio communication function is attached so as to activate and inactivate the radio communication function of the nonvolatile storage device. This reduces unnecessary power consumption by the radio communication function.
    Type: Grant
    Filed: July 26, 2007
    Date of Patent: May 1, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Honda, Masahiro Nakanishi, Hirofumi Nakagaki
  • Patent number: 8112575
    Abstract: A file to be read or written is designated and accessed from an access device side to a nonvolatile memory device. In an initialization after start-up of the power source, an empty capacity detector detects empty capacity parameters of a nonvolatile memory with dividing the memory into a plurality of regions. An empty capacity parameter notification part notifies the access device of the empty capacity parameters in a stepwise fashion whenever the empty capacity detector detects an empty capacity. With this, at the time when the empty capacity becomes not less than a capacity required to write file data, the data can be written to the nonvolatile memory without waiting for completion of the initialization, resulting in improvement of a response in the recording.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: February 7, 2012
    Assignee: Panasonic Corporation
    Inventors: Masahiro Nakanishi, Takuji Maeda, Toshiyuki Honda, Tatsuya Adachi
  • Publication number: 20110238898
    Abstract: A controller includes a control unit for controlling writing and/or reading of data to and from physical block based on a logical address from a host device, a logical defective cluster table for storing information concerning a logical address of a logical defective cluster which is one or more partial areas within the effective logical address range and an address conversion table for storing corresponding information of a logical address of the effective logical address range and a physical address of the physical block on the data stored in the physical block. Upon receiving a data write command from the host device for writing data to the logical address stored in the logical defective cluster table, the control unit disables the reflection of writing of data for the logical address to the physical block.
    Type: Application
    Filed: March 18, 2011
    Publication date: September 29, 2011
    Inventor: Toshiyuki HONDA
  • Publication number: 20110238895
    Abstract: A flash memory unit includes a plurality of physical blocks including a plurality of memory cells and serving as erase units of data, each of the memory cells is capable of recording information of 1 bit or more, degradation in the characteristics of the memory cells differs according to the amount of information that is recorded, a controller includes a control unit for controlling the reading, writing and erasure of data to and from the flash memory unit, and a degradation level table for recording a degradation level of the memory cells in physical block units, and the control unit stores, in the degradation level table, the degradation level of the memory cells according to the amount of information stored in the memory cells for each cycle of data erasure from the physical blocks.
    Type: Application
    Filed: March 2, 2011
    Publication date: September 29, 2011
    Inventor: Toshiyuki HONDA