Abstract: A host device includes a voltage source which is connected to a voltage line via a host voltage switch and which supplies a first voltage to the voltage line, a host regulator which is connected to the voltage line and which outputs the first voltage or a second voltage that is lower than the first voltage, a host IO driver for driving a data line with the output of the host regulator as a power source, a host voltage detection circuit for detecting whether the voltage of the data line is the second voltage or a voltage that is higher than the second voltage, and a host control unit for detecting a mismatch of interface voltages between the host device and a memory card based on the output voltage of the host regulator and the detection result of the host voltage detection circuit.

Abstract: A memory controller includes a reading/writing control unit for controlling writing and reading of data to and from a physical block of a nonvolatile memory, a writing mode table for storing one of a first writing mode of protecting data against a power shutdown during writing and a second writing mode of writing data at a higher speed than the first writing mode, and a setting unit for setting the writing mode received from an access device in a writing mode table. The reading/writing control unit performs data writing based on the writing mode that has been set in the writing mode table.

Abstract: A nonvolatile storage device includes a nonvolatile memory that stores data and a memory controller that controls the nonvolatile memory. The memory controller accepts a pause instruction to pause writing from the access device within a period in which data from the access device are written, and writes the data received from the access device to the nonvolatile memory within a predetermined time interval, then pauses the writing and accepts read and/or write of new data from the access device.

Abstract: To provide an image pickup apparatus with excellent optical characteristics as well as high reliability and a method of manufacturing the same, capable of efficiently manufacturing the image pickup apparatus in large quantities. The image pickup apparatus of the present invention includes a support board 10, an image pickup device 20 mounted on the support board 10, and a lens component 30 provided on the light receiving region of the image pickup device 20, wherein the lens component 30 has a protrusion part 33 provided around the lens part 31, and the height of the protrusion part 33 from the surface of image pickup device 20 is greater than that of the top 31A of lens part 31 from the surface of the image pickup device 20.

Abstract: A display device in accordance with the present invention includes: a timer (106) for measuring a time period from a time at a start of a touch, i.e.

Abstract: It is possible to eliminate the defect that a long time is required for writing into a semiconductor memory card by resulting from the fact, with enlargement of its capacity, that the external data management size is different from the internal data management size in the semiconductor memory card. A partial physical block corresponding to the size managed externally is used regardless of the size of the physical block in a non-volatile memory device. Data are written in the partial physical block unit and an erase block is assured in the physical block unit, thereby enabling the write rate to be increased.

Abstract: There are provided compounds of formula I wherein X, R1, R2, R3, R4, R5, R6, R7, R8 and R9 are as indicated in claim 1, useful in disorders where ZAP-70 and/or Syk inhibition plays a role or caused by a malfunction of signal cascades connected with FAK.

Abstract: There are provided compounds of formula I wherein X, R1, R2, R3, R4, R5, R6, R7, R8 and R9 are as indicated in claim 1, useful in disorders where ZAP-70 and/or Syk inhibition plays a role or caused by a malfunction of signal cascades connected with FAK.

Abstract: Gold bumps are located over electrode pads of a solid imaging device and an adhesive is formed over the gold bumps. A transparent plate is supported by the gold bumps and is made to adhere over the solid imaging device by the adhesive. The gold bumps and an electrode and wiring pattern formed over a circuit board are connected by gold wires. At this time the gold wires are approximately parallel to the circuit board near portions where the gold wires and the gold bumps are connected. As a result, it is easy to locate the transparent plate over the portions where the gold wires and the gold bumps are connected. By locating the adhesive over the portions where the gold wires and the gold bumps are connected, the solid imaging device can be made small and light. As a result, a smaller lighter semiconductor device is fabricated.

Abstract: A plural-partitioned type nonvolatile storage device which solves the problem that a memory card composed of a flash memory and a controller, when a storage area is divided into a plurality of partitions, cannot be correctly used with a conventional host apparatus incapable of recognizing plural partitions. The memory card includes, as its storage areas, a device characteristic data storage area, a division table storage area, and a device storage area, where the device storage area is partitioned into plural partitions. The memory card can have different, modes for adapting different accesses from the external host, and allows the external host to access partitions corresponding to the mode. Division information as to a dividing method for the plural partitions, and access information as to the host-accessible partitions corresponding to each individual mode are stored in the division table storage area.

Abstract: A method of resin sealing an electronic part, includes the steps of: providing a board where one or more of the electronic parts are mounted in an upper mold; melting a resin material received in a cavity forming part of a lower mold; and dipping the electronic part held by the upper mold into the molten resin so that the resin sealing is achieved. The resin material is received in the cavity forming part of the lower mold after the resin material is pressurized and dispersed in a sealing resin supply apparatus.

Abstract: The memory controller writes and reads data in and from a nonvolatile memory. The nonvolatile memory has a plurality of memory cell blocks, each memory cell block includes a plurality of multi-level cells each capable of storing m-bit data (m is a natural number of two or more), a first page to a m-th page are allocated to the respective m bits of the multi-level cell, the memory controller sequentially writes the data to the memory cells from the first page in ascending order, and comprises a backup unit, and when a write command is received from the outside of the memory controller, in a case where a data write destination of the data in the nonvolatile memory is a n-th (n is a natural number of two to m) page of the multi-level cell, and data is already written in the first to (n-1)th pages, the backup unit copies the already written data to a nonvolatile storable backup region.

Abstract: A method for increasing the speed of processing when writing multiple files in parallel and writing file data in a stable manner in the case where the regions of a non-volatile memory in an information recording module are managed according to a filesystem is provided. An access module (1) includes a unit (104) that communicates, to an information recording module (2), information regarding the storage location of a directory entry, and also includes a unit (105) that pads file data when writing fractional data such as the end of a file and writes that data into the information recording module (2). Upon determining that the directory entry is to be written based on the communicated information, the information recording module (2) stores the directory entry in a dedicated physical block. Furthermore, the access module (1) pads the data of multiple files as necessary and records those files in continuous addresses in units that are a multiple of a predetermined size of a unit of recording processing.

Abstract: The memory controller of a storage device includes a scramble pattern generator, a scramble processor, a logical and physical address conversion table, a memory interface, and a controller, in which the physical page is managed by dividing to a data section and a management section. For the data section, the controller controls the scramble pattern generator to generate a scramble pattern on the basis of a logical address specific to the data section, and controls the scramble processor to scramble the data of the data section corresponding to the logical address by using the scramble pattern, and for the management section, the controller controls the scramble pattern generator to generate a scramble pattern on the basis of a physical address as the write destination of the management section, and scrambling the management data by the scramble processor by using the scramble pattern, so that data is written and reading to and from the semiconductor memory.

Abstract: The invention is intended to curtail the circuit scale of the error correction circuit of a flash memory. The invention relates to a controller with error correction function capable of controlling writing and reading of data in a plurality of memories, including a buffer memory, an error correction circuit, and a plurality of interface modules provided individually corresponding to each one of the plurality of memories, for exchanging data with the memories, in which the plurality of interface modules have a plurality of syndrome generation function parts for receiving sector data from the memories and error correction codes corresponding to the sector data, and generating syndromes on the basis of the received sector data and error correction codes, the buffer memory.

Abstract: A nonvolatile storage device can read and write data by receiving a logical address from a host. The nonvolatile storage device includes: a nonvolatile memory writing and reading data based on a physical address; a logical/physical conversion table storing information on correspondence between the logical address and the physical address for each of a plurality of data management units; a duplication table storing information on correspondence between the logical address and the physical address of data arranged over a plurality of areas in a duplicate (redundant) manner in the nonvolatile memory and having a size smaller than a size of a data management unit; and a controller controlling an operation of the nonvolatile storage device.

Abstract: In a controller (memory controller) (2) that performs drive control of first and second flash memories (nonvolatile memories) (3a, 3b) in which multilevel memory cells are used in physical blocks, 64 page groups each including physical pages (9) provided in these physical blocks (8) are defined with respect to the plurality of physical blocks (8), and the physical pages (9) of the physical blocks (8) are grouped so that the boundaries of the page groups are defined behind the physical page (9) as the n-th page.

Abstract: A memory controller takes in the first to (N?1)th pieces of data respectively in synchronization with the second to Nth return read clocks. The memory controller takes in the Nth piece of data from stop of output of the Nth read clock and before a first predetermined time. The memory controller sets an output period of the Nth read clock to be longer than an output period of each of the first to (N?1)th read clocks.

Abstract: In a nonvolatile memory device of the present application, when data of each write unit is read from a nonvolatile memory, an all-clear detector detects whether the read data is already cleared, and a control portion judges whether a flag is already written into a written flag area of the data that has been descrambled by a descrambler and then corrected by an error detection and correction portion. Using a scramble pattern that is generated by a scramble pattern generator and corresponds to the written flag area, a predetermined bit pattern is scrambled to a state that differs from the cleared state.

Abstract: A source block (B0) and the logical page number (“8”) of a write target page are identified from the logical address of the write target page. Data objects (DN8, DN9, . . . , DN12) to be written, which a host stores in a page buffer (2), are written into the data areas (DA) of the pages (Q0, Q1, . . . , Q4) of a destination block (Bn), starting from the top page (Q0) in sequence. The logical page number (“8”) of the write target page is written into the redundant area (RA) of the top page (Q0). The physical page number (“6=8?2”) of the write target page is identified, based on the logical page number (“8”) of the write target page and the page offset (“2”) of the source block (B0). When notified by the host of the end of the sending of the data objects (DN8, . . . , DN12), the data items (D13, . . . , D31, D0, D1, . . . , D7) in the source block (B0) are transferred to the pages (Q5, Q6, . . .