Patents by Inventor Tsu Shih

Tsu Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210094052
    Abstract: A spray gun nozzle may include a main body, and a spray hole is formed at a front end thereof. A tapered cylindrical guiding surface having gradually wider diameter from rear to front is extended forwardly from the spray hole, and the inclined angle of the guiding surface with respect to the spray hole is between 45 degrees and 75 degrees. A plurality of air grooves having U-shaped cross-section are formed on the outer periphery of the front end of the main body axially extending from a front end of the guiding surface, and the air grooves are spaced apart with the same interval. With the air grooves on the front end of the main body having the fixed groove diameter, the flow rate of the high-pressure airflow passing through the air groove is consistent.
    Type: Application
    Filed: September 30, 2020
    Publication date: April 1, 2021
    Inventor: Nien-Tsu Shih
  • Publication number: 20200202585
    Abstract: A system include a light source that is deficient of a first primary color, a display device to visually present a content using light beams of the light source, and a processing device to receive the content, calculate, taking into account an effect of deficiency of the first primary color in the light source, a metamer of a visual presentation of the content to compensate for the deficiency of the first primary color in the light source, wherein the calculated metamer when presented on the display device substantially preserves color appearance of the visual presentation rendered on the display device and substantially preserves a hue of the visual presentation by means of digital image processing that compensates for the effect of the deficiency of the first primary color on the color appearance, and provide, to the display device, the metamer of the visual presentation to display using the light beams.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 25, 2020
    Applicant: Focal Sharp, Inc.
    Inventor: Kuang-Tsu Shih
  • Patent number: 10600213
    Abstract: A system include an light emitter to generate a primary light, a filter to filter the primary light to substantially remove a spectrum energy in a wavelength band, a display device to present visual content using the filtered primary light, and a processing device to receive a visual content, calculate, in view of the filtered primary light, a metamer of the visual content, and provide, to the display device, the metamer of the visual content to display in view of the filtered light.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: March 24, 2020
    Assignee: Focal Sharp, Inc.
    Inventor: Kuang-Tsu Shih
  • Publication number: 20170249755
    Abstract: A system include an light emitter to generate a primary light, a filter to filter the primary light to substantially remove a spectrum energy in a wavelength band, a display device to present visual content using the filtered primary light, and a processing device to receive a visual content, calculate, in view of the filtered primary light, a metamer of the visual content, and provide, to the display device, the metamer of the visual content to display in view of the filtered light.
    Type: Application
    Filed: February 24, 2017
    Publication date: August 31, 2017
    Inventor: Kuang-Tsu Shih
  • Patent number: 9367905
    Abstract: A method and system of enhancing a backlight-scaled image include a minimum perceptible luminance threshold of cone response with dim backlight being determined, and a luminance layer associated with an image being extracted. The luminance layer is decomposed into an HVS response layer and a background luminance layer for each pixel of the luminance layer. Luminance of dark pixels of the background luminance layer is boosted and compressed to a perceptible range above the minimum perceptible luminance threshold, thereby resulting in an enhanced background luminance layer. An enhanced luminance layer is generated through composition using the HVS response layer and the enhanced background luminance layer as inputs.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: June 14, 2016
    Assignees: National Taiwan University, Himax Technologies Limited
    Inventors: Tai-Hsiang Huang, Kuang-Tsu Shih, Su-Ling Yeh, Homer H. Chen, Sheng-Chun Niu
  • Publication number: 20160093268
    Abstract: An image processing system and method include first processing a color stimulus relative to a first anchor, and then second processing a processed color stimulus relative to a second anchor. The first processing unit and the second processing unit preserve relative attributes of the color stimulus to enhance color sensation.
    Type: Application
    Filed: September 30, 2014
    Publication date: March 31, 2016
    Inventors: Kuang-Tsu Shih, Homer H. CHEN, Yi-Nung Liu
  • Publication number: 20150085162
    Abstract: A perceptual radiometric compensation system adaptable to a projector-camera system includes a brightness scaling unit that scales down brightness of an input image and obtains appearance attributes by a color appearance model (CAM). A hue adjustment unit adjusts hue of the input image toward tone of a colored projection surface by the CAM.
    Type: Application
    Filed: August 22, 2014
    Publication date: March 26, 2015
    Inventors: Tai-Hsiang HUANG, Ting-Chun Wang, Kuang-Tsu Shih, Homer H. CHEN
  • Publication number: 20150029205
    Abstract: A method and system of enhancing a backlight-scaled image include a minimum perceptible luminance threshold of cone response with dim backlight being determined, and a luminance layer associated with an image being extracted. The luminance layer is decomposed into an HVS response layer and a background luminance layer for each pixel of the luminance layer. Luminance of dark pixels of the background luminance layer is boosted and compressed to a perceptible range above the minimum perceptible luminance threshold, thereby resulting in an enhanced background luminance layer. An enhanced luminance layer is generated through composition using the HVS response layer and the enhanced background luminance layer as inputs.
    Type: Application
    Filed: September 30, 2013
    Publication date: January 29, 2015
    Applicants: Himax Technologies Limited, National Taiwan University
    Inventors: Tai-Hsiang HUANG, Kuang-Tsu Shih, Su-Ling Yeh, Homer H. Chen, Sheng-Chun Niu
  • Patent number: 7153197
    Abstract: A method for removing a metal oxide overlayer over a target polishing surface in conjunction with a chemical mechanical polishing (CMP) process to improve polishing uniformity including providing a substrate target polishing surface having a layer of an oxide of a metal overlying said metal to be chemically mechanically polished; removing the layer of an oxide of the metal using an oxide removal solution prior to performing a CMP process with an abrasive slurry; and, polishing the target polishing surface according to an a CMP process with an abrasive slurry including at least one of an oxidizer and a complexing agent.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: December 26, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Sa-Na Lee, Syun-Ming Jang, Chi-Weng Chung
  • Patent number: 7091126
    Abstract: An improvement in a copper damascene process is disclosed. The improvement comprises the step of projecting an electron beam on to a chemical mechanically polished material surface having copper filled etched trenches at a known angle of incidence with respect to the material surface for a known period of time, the electron beam having a beamwidth substantially covering the material surface and a known intensity.
    Type: Grant
    Filed: April 24, 2003
    Date of Patent: August 15, 2006
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Han-Hsin Kuo, Hung-Wen Su, Wen-Chih Chiou, Tsu Shih, Hsien-Ming Lee
  • Publication number: 20050064629
    Abstract: An interconnect structure utilizing a silicon carbon-containing film as an interlayer between dielectrics. A semiconductor substrate having a conductor thereon is provided, and an insulating layer overlies the semiconductor substrate. The insulating layer has a via hole therein to expose the conductor. A conductive plug, e.g. a tungsten plug, substantially fills the via hole and electrically connects the underlying conductor. A silicon carbon-containing film and a low k dielectric layer overlie the insulating layer and the conductive plug, and have a trench therein exposing the conductive plug. A copper or copper alloy conductor substantially fills the trench.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 24, 2005
    Inventors: Chen-Hua Yu, Tsu Shih, Chung-Shi Liu, Shwang-Min Jeng, Horng-Huei Tseng
  • Patent number: 6833323
    Abstract: A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process including providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion including active areas having semiconductor devices features formed therein the process surface including a dielectric insulating layer; forming a plurality of openings in the periphery portion to form closed communication with the dielectric insulating layer the plurality of openings having an aspect ratio of at least 2; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of openings to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: December 21, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chen-Hua Yui, Tsu Shih
  • Patent number: 6821896
    Abstract: A method is provided for forming contact/via hole openings without the detrimental volcano effect that is normally encountered in forming damascene structures. It is disclosed that the hole openings are needed to be filled with a protective material, in the first place, so as to prevent any damage to the exposed surface at the bottom of the openings. However, the filling material must be chosen properly, for otherwise, the material can leave behind a scum-like residue which then can erupt like a volcano during the subsequent process steps, which in turn can lead to functionality as well as reliability problems. It is disclosed in the present invention that when i-line photoresist (i-line PR), or, spin-on organic oxide is used as the protective filler material, the volcano effect can be avoided, and a Cu dual damascene interconnect with low RC delay characteristics can be obtained.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: November 23, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Tsu Shih
  • Publication number: 20040214441
    Abstract: An improvement in a copper damascene process is disclosed. The improvement comprises the step of projecting an electron beam on to a chemical mechanically polished material surface having copper filled etched trenches at a known angle of incidence with respect to the material surface for a known period of time, the electron beam having a beamwidth substantially covering the material surface and a known intensity.
    Type: Application
    Filed: April 24, 2003
    Publication date: October 28, 2004
    Inventors: Han-Hsin Kuo, Hung-Wen Su, Wen-Chih Chiou, Tsu Shih, Hsien-Ming Lee
  • Patent number: 6787470
    Abstract: A sacrificial semiconductor feature for preventing corrosion that can result during chemical-mechanical planarization (CMP) is disclosed. A semiconductor device of the invention is fabricated at least in part by performing CMP. The device includes a desired semiconductor feature and a sacrificial semiconductor feature. The desired semiconductor feature may have an unbalanced geometric pattern that includes a metallic line ending in at least one tip. The at least one tip is susceptible to corrosion resulting from performing CMP. The sacrificial semiconductor feature is preferably located off the metallic line of the desired semiconductor feature. The sacrificial semiconductor feature attracts charge induced during CMP that is otherwise attracted by the at least one tip of the desired semiconductor feature. The presence of the sacrificial semiconductor feature thus substantially prevents corrosion of the desired semiconductor feature, including its tip(s).
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: September 7, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chu-Wei Hu, Tsu Shih, Chen Cheng Chou
  • Publication number: 20040147128
    Abstract: A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process including providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion including active areas having semiconductor devices features formed therein the process surface including a dielectric insulating layer; forming a plurality of openings in the periphery portion to form closed communication with the dielectric insulating layer the plurality of openings having an aspect ratio of at least 2; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of openings to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 29, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yui, Tsu Shih
  • Patent number: 6767833
    Abstract: A method for avoiding processing damage to an anisotropically etched damascene feature in a reworking process including providing a first photoresist layer over a first anisotropically etched opening the first photoresist layer photolithographically patterned for forming a second anisotropically etched opening overlying the first anisotropically etched opening; blanket depositing a flowable resinous polymeric material to form a resinous layer over the first photoresist layer in a reworking process to include filling a remaining portion of the first anisotropically etched opening; removing the resinous layer and the first photoresist layer in a planarizing process to reveal an upper substrate surface; and, depositing a second photoresist layer over the upper substrate surface for photolithographic patterning of the second anisotropically etched opening overlying the first anisotropically etched opening in the reworking process.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: July 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Tsu Shih, Chen-Hua Yu
  • Publication number: 20040137740
    Abstract: A new method of Chemical Mechanical Polishing of copper surfaces. During the process of CMP and at predetermined instances within the process of CMP, Surface Active Agents of different concentrations are added as a polishing agent of the copper surface that is being polished.
    Type: Application
    Filed: January 15, 2003
    Publication date: July 15, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Chi-Wei Chung, Ying-Ho Chen, Syun-Ming Jang, Tsu Shih
  • Patent number: 6736701
    Abstract: A new method is provided for the post-deposition treatment of copper lines. A damascene copper line pattern whereby a TaN barrier layer and a seed layer have been provided is polished. Under the first embodiment of the invention, the deposited copper is polished (Cu CMP), the surface of the wafer is rinsed using a first High Flow DI rinse that contains a TBA inhibitor. The TaN CMP is performed immediately following the first High Flow DI rinse. A second High Flow DI rinse is applied using DI water that contains TBA inhibitor. The required following rinse step is executed immediately after the second High Flow DI rinse has been completed. Under the second embodiment of the invention, the process of CMP has been divided in two distinct steps where the first step is aimed at corrosion elimination and the second step is aimed at elimination of mechanical damage to the polished copper.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: May 18, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shau-Lin Shue, Ying-Ho Chen, Wen-Chih Chiou, Tsu Shih, Syun-Ming Jang
  • Patent number: 6726535
    Abstract: A method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process including providing a semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the semiconductor wafer polishing surface according to a first CMP process including applying at least one polishing slurry to contact the semiconductor wafer polishing surface for removing an uppermost layer of the semiconductor wafer polishing surface; and, alternately applying a copper corrosion inhibitor solution for a period of time and the at least one polishing slurry for a period of time to contact the semiconductor wafer polishing surface to comprise a polishing cycle said polishing cycle performed at least once during at least a second CMP process.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: April 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Kuan-Ku Hung, Chen-Hua Yu