Patents by Inventor Tsu Shih

Tsu Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040147128
    Abstract: A method for preventing peeling of a metal layer formed over a semiconductor wafer process surface during a chemical mechanical polishing (CMP) process including providing a semiconductor wafer having a process surface comprising a periphery portion and a central portion said central portion including active areas having semiconductor devices features formed therein the process surface including a dielectric insulating layer; forming a plurality of openings in the periphery portion to form closed communication with the dielectric insulating layer the plurality of openings having an aspect ratio of at least 2; blanket depositing a metal layer to cover the process surface including the periphery portion to include filling the plurality of openings to anchor the metal layer; and, performing a CMP process to remove at least a portion of the metal layer from the process surface.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 29, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yui, Tsu Shih
  • Patent number: 6767833
    Abstract: A method for avoiding processing damage to an anisotropically etched damascene feature in a reworking process including providing a first photoresist layer over a first anisotropically etched opening the first photoresist layer photolithographically patterned for forming a second anisotropically etched opening overlying the first anisotropically etched opening; blanket depositing a flowable resinous polymeric material to form a resinous layer over the first photoresist layer in a reworking process to include filling a remaining portion of the first anisotropically etched opening; removing the resinous layer and the first photoresist layer in a planarizing process to reveal an upper substrate surface; and, depositing a second photoresist layer over the upper substrate surface for photolithographic patterning of the second anisotropically etched opening overlying the first anisotropically etched opening in the reworking process.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: July 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Tsu Shih, Chen-Hua Yu
  • Publication number: 20040137740
    Abstract: A new method of Chemical Mechanical Polishing of copper surfaces. During the process of CMP and at predetermined instances within the process of CMP, Surface Active Agents of different concentrations are added as a polishing agent of the copper surface that is being polished.
    Type: Application
    Filed: January 15, 2003
    Publication date: July 15, 2004
    Applicant: Taiwan Semiconductor Manufacturing Company
    Inventors: Chi-Wei Chung, Ying-Ho Chen, Syun-Ming Jang, Tsu Shih
  • Patent number: 6736701
    Abstract: A new method is provided for the post-deposition treatment of copper lines. A damascene copper line pattern whereby a TaN barrier layer and a seed layer have been provided is polished. Under the first embodiment of the invention, the deposited copper is polished (Cu CMP), the surface of the wafer is rinsed using a first High Flow DI rinse that contains a TBA inhibitor. The TaN CMP is performed immediately following the first High Flow DI rinse. A second High Flow DI rinse is applied using DI water that contains TBA inhibitor. The required following rinse step is executed immediately after the second High Flow DI rinse has been completed. Under the second embodiment of the invention, the process of CMP has been divided in two distinct steps where the first step is aimed at corrosion elimination and the second step is aimed at elimination of mechanical damage to the polished copper.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: May 18, 2004
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shau-Lin Shue, Ying-Ho Chen, Wen-Chih Chiou, Tsu Shih, Syun-Ming Jang
  • Patent number: 6726535
    Abstract: A method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process including providing a semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the semiconductor wafer polishing surface according to a first CMP process including applying at least one polishing slurry to contact the semiconductor wafer polishing surface for removing an uppermost layer of the semiconductor wafer polishing surface; and, alternately applying a copper corrosion inhibitor solution for a period of time and the at least one polishing slurry for a period of time to contact the semiconductor wafer polishing surface to comprise a polishing cycle said polishing cycle performed at least once during at least a second CMP process.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: April 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Kuan-Ku Hung, Chen-Hua Yu
  • Publication number: 20040067640
    Abstract: A method for depositing metal to fill an anisotropically etched feature to improve a subsequent CMP process including a semiconductor wafer including a process surface the process surface further including an anisotropically etched opening lined with a blanket deposited barrier/adhesion layer; blanket depositing metal to form a metal layer filling a portion of the anisotropically etched opening; performing a first chemical mechanical polishing (CMP) process to remove at least a portion of the metal layer comprising a metal overlayer formed over the process surface above the anisotropically etched opening; and, repeating the steps of blanket depositing and performing a first CMP process one or more times to form the metal layer substantially filling the anisotropically etched opening.
    Type: Application
    Filed: October 8, 2002
    Publication date: April 8, 2004
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Leon Hsu, Tsu Shih, Chen-Hua Yu
  • Patent number: 6686284
    Abstract: A chemical mechanical polishing apparatus that is equipped with a chilled retaining ring and a method for using the apparatus are described. The retaining ring is mounted therein a heat transfer means such as a metal tube and flowing therethrough a heat exchanging fluid for carrying away heat from the wafer mounted in the retaining ring, resulting in a temperature reduction in the slurry solution that contacts the wafer. The present invention apparatus and method therefore reduces the delamination problem for low k dielectric materials during polishing and the wafer scratching problem.
    Type: Grant
    Filed: February 6, 2002
    Date of Patent: February 3, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chi-Wei Chung, Tung-Ching Tseng, Tsu Shih, Syun-Ming Jang
  • Patent number: 6682396
    Abstract: A linear polisher for polishing a substrate that always provides a fresh abrasive surface for polishing and a method for linear polishing a substrate are described. In the linear polisher, a length of a polishing pad is supported on a pair of rollers which are driven by a motor means for either intermittently or continuously advancing the pad during a polishing process. A vibration generator which is connected to the polishing pad through an adaptor provides lateral, or vibration in a transverse direction of the pad throughout the polishing process. The present invention novel linear polisher enables substantially constant removal rate to be achieved throughout the pad life of a polishing pad without deterioration such as that normally seen in a conventional rotary or linear CMP apparatus. Optionally, a rotatable substrate holder is utilized to further improve the polishing uniformity of the linear polishing apparatus.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: January 27, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Tsu Shih, Chen-Hua Yu
  • Publication number: 20040005782
    Abstract: A method for avoiding processing damage to an anisotropically etched damascene feature in a reworking process including providing a first photoresist layer over a first anisotropically etched opening the first photoresist layer photolithographically patterned for forming a second anisotropically etched opening overlying the first anisotropically etched opening; blanket depositing a flowable resinous polymeric material to form a resinous layer over the first photoresist layer in a reworking process to include filling a remaining portion of the first anisotropically etched opening; removing the resinous layer and the first photoresist layer in a planarizing process to reveal an upper substrate surface; and, depositing a second photoresist layer over the upper substrate surface for photolithographic patterning of the second anisotropically etched opening overlying the first anisotropically etched opening in the reworking process.
    Type: Application
    Filed: July 2, 2002
    Publication date: January 8, 2004
    Applicant: Taiwan Semiconductor Manufacuring Co., Ltd.
    Inventors: Tsu Shih, Chen-Hua Yu
  • Publication number: 20030216047
    Abstract: A sacrificial semiconductor feature for preventing corrosion that can result during chemical-mechanical planarization (CMP) is disclosed. A semiconductor device of the invention is fabricated at least in part by performing CMP. The device includes a desired semiconductor feature and a sacrificial semiconductor feature. The desired semiconductor feature may have an unbalanced geometric pattern that includes a metallic line ending in at least one tip. The at least one tip is susceptible to corrosion resulting from performing CMP. The sacrificial semiconductor feature is preferably located off the metallic line of the desired semiconductor feature. The sacrificial semiconductor feature attracts charge induced during CMP that is otherwise attracted by the at least one tip of the desired semiconductor feature. The presence of the sacrificial semiconductor feature thus substantially prevents corrosion of the desired semiconductor feature, including its tip(s).
    Type: Application
    Filed: May 17, 2002
    Publication date: November 20, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chu-Wei Hu, Tsu Shih, Chen Cheng Chou
  • Publication number: 20030211814
    Abstract: A method for removing a metal oxide overlayer over a target polishing surface in conjunction with a chemical mechanical polishing (CMP) process to improve polishing uniformity including providing a substrate target polishing surface having a layer of an oxide of a metal overlying said metal to be chemically mechanically polished; removing the layer of an oxide of the metal using an oxide removal solution prior to performing a CMP process with an abrasive slurry; and, polishing the target polishing surface according to an a CMP process with an abrasive slurry including at least one of an oxidizer and a complexing agent.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Shen-Nan Lee, Syun-Ming Jang, Chi-Wei Chung
  • Publication number: 20030211744
    Abstract: A method and apparatus for implementing the method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process the method providing at least one semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the at least one semiconductor wafer polishing surface according to a CMP process having a polishing pad surface contacting the at least one semiconductor wafer polishing surface at least a portion of the polishing pad in electrically conductive communication with a conductive polishing platen; and, providing at least one electrically conductive pathway from the conductive polishing platen.
    Type: Application
    Filed: May 7, 2002
    Publication date: November 13, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Kun Ku Hung, Wen-Hun Tung, Wen-Chih Chiou
  • Publication number: 20030207582
    Abstract: The invention teaches a new method of applying slurry during the process of chemical mechanical polishing of copper surfaces. By varying the rate of slurry deposition, starting out with a low rate of slurry flow that is increased as the polishing process proceeds, the invention obtains good planarity for copper surfaces while saving on the amount of slurry that is being used for the copper surface polishing process.
    Type: Application
    Filed: June 3, 2003
    Publication date: November 6, 2003
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY
    Inventors: Jih-Churng Twu, Ying-Ho Chen, Tsu Shih, Syun-Ming Jang
  • Publication number: 20030203706
    Abstract: A method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process including providing a semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the semiconductor wafer polishing surface according to a first CMP process including applying at least one polishing slurry to contact the semiconductor wafer polishing surface for removing an uppermost layer of the semiconductor wafer polishing surface; and, alternately applying a copper corrosion inhibitor solution for a period of time and the at least one polishing slurry for a period of time to contact the semiconductor wafer polishing surface to comprise a polishing cycle said polishing cycle performed at least once during at least a second CMP process.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsu Shih, Kuan-Ku Hung, Chen-Hua Yu
  • Publication number: 20030200702
    Abstract: A bimodal slurry system for a chemical mechanical polishing process including a dispersion comprising a plurality of first particles and a plurality of at least one type of second particles said first particles having a mean particle diameter larger by at least a factor of 3 than a mean particle diameter of the at least one type of second particles said first particles further being compressible.
    Type: Application
    Filed: April 25, 2002
    Publication date: October 30, 2003
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shen-Nan Lee, Tsu Shih, Syun Ming Jang
  • Patent number: 6638328
    Abstract: A bimodal slurry system for a chemical mechanical polishing process including a dispersion comprising a plurality of first particles and a plurality of at least one type of second particles said first particles having a mean particle diameter larger by at least a factor of 3 than a mean particle diameter of the at least one type of second particles said first particles further being compressible.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: October 28, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd
    Inventors: Shen-Nan Lee, Tsu Shih, Syun Ming Jang
  • Patent number: 6638868
    Abstract: A method and apparatus for implementing the method for preventing or reducing corrosion of copper containing features included in a semiconductor wafer in a chemical mechanical polishing (CMP) process the method providing at least one semiconductor wafer polishing surface including copper filled anisotropically etched features; polishing the at least one semiconductor wafer polishing surface according to a CMP process having a polishing pad surface contacting the at least one it semiconductor wafer polishing surface at least a portion of the polishing pad in electrically conductive communication with a conductive polishing platen; and, providing at least one electrically conductive pathway from the conductive polishing platen.
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: October 28, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.
    Inventors: Tsu Shih, Kun Ku Hung, Wen-Hun Tung, Wen-Chin Chiou
  • Patent number: 6634930
    Abstract: A method for preventing copper corrosion on a wafer during a chemical mechanical polishing process when the process is temporarily halted due to equipment malfunction and an apparatus for carrying out such method are disclosed. In the method, after the chemical mechanical polishing process is stopped for correcting equipment malfunction or any other processing problems, a cleaning solvent is sprayed toward the wafer surface to remove substantially all slurry solution from the surface to prevent corrosion of the copper layer, or other metal layer, by the slurry solution. The cleaning solvent may be sprayed from spray nozzles mounted around and juxtaposed to the polishing table onto which the polishing pad is mounted as long as the spray nozzles do not interfere with the rotation of the polishing pad.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: October 21, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd
    Inventors: Ying-Ho Chen, Wen-Chih Chiou, Tsu Shih, Syun-Ming Jang, Chia-Ming Yang
  • Patent number: 6635211
    Abstract: A continuous loop polishing pad that is reinforced by a reinforcing filler and a method for fabricating the polishing pad are described. The reinforced polishing pad is constructed by a sub-layer and a top layer, wherein the sub-layer defines an inner diameter of the polishing pad and contains a reinforcing filler with an aspect ratio of at least 10 oriented substantially in a circumferential direction of the continuous loop polishing pad. The top layer is laminated to the sub-layer with a top surface defining an outer diameter of the polishing pad, while both the sub-layer and the top layer are formed of a polymeric material. The invention further describes a method for fabricating the reinforced polishing pad in a continuous loop.
    Type: Grant
    Filed: June 25, 2001
    Date of Patent: October 21, 2003
    Assignee: Taiwan Semiconductor Manufacturing Co. Ltd
    Inventors: Wen-Chih Chiou, Ying-Ho Chen, Tsu Shih, Syun-Ming Jang
  • Patent number: 6620725
    Abstract: A process for performing CMP in two steps is described. After trenches have been formed and over-filled with copper, in a first embodiment of the invention a hard pad is used initially to remove most of the copper until a point is reached where dishing effects would begin to appear. A soft pad is then substituted and CMP continued until all copper has been removed, except in the trenches. In a second embodiment, CMP is initiated using a pad to which high-pressure is applied and which rotates relatively slowly. As before, this combination is used until the point is reached where dishing effects would begin to appear. Then, relatively low pressure in combination with relatively high rotational speed is used until all copper has been removed, except in the trenches. Both of these embodiments result in trenches which are just-filled with copper, with little or no dishing effects, and with all traces of copper removed everywhere except in the trenches themselves.
    Type: Grant
    Filed: September 13, 1999
    Date of Patent: September 16, 2003
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Shau-Lin Shue, Ming-Hsing Tsai, Wen-Jye Tsai, Ying-Ho Chen, Tsu Shih, Jih-Churng Twu, Syun-Ming Jang