Patents by Inventor Tsung Lin

Tsung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984489
    Abstract: A semiconductor structure includes a first device and a second device. The first device includes: a first gate structure formed over an active region and a first air spacer disposed adjacent to the first gate structure. The second device includes: a second gate structure formed over an isolation structure and a second air spacer disposed adjacent to the second gate structure. The first air spacer and the second air spacer have different sizes.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Hsiu Liu, Feng-Cheng Yang, Tsung-Lin Lee, Wei-Yang Lee, Yen-Ming Chen, Yen-Ting Chen
  • Publication number: 20240154340
    Abstract: An electrical connector includes: an insulating housing; plural rows of signal terminals; and a respective row of grounding terminals disposed in the insulating housing, each of the grounding terminals comprising a main part retained in the insulating housing and an upper elastic arm and a lower elastic arm extending obliquely from the main part, each of the upper and lower elastic arms having a respective contacting portion and a respective end extending downward from the contacting portion, wherein the main part defines a front face and a rear face confronting adjacent signal terminals, an upper face, and a lower face; and the respective ends deviate from the main part toward the rear face or the front face of the main part for contacting with the rear face or the front face of the main part.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 9, 2024
    Inventors: MING-LUN SZU, TSUNG-LIN TSAI
  • Publication number: 20240153412
    Abstract: An electronic device includes a rollable panel and a metal layer. The rollable panel includes a first portion and a second portion. The rollable panel has a first side and a second side opposite to the first side. The rollable panel includes a substrate, a circuit layer disposed on the substrate and a cover layer disposed on the circuit layer. The metal layer is disposed on one of the first side and the second side of the rollable panel and outside the rollable panel. In a rolled mode, at least a part of the metal layer is positioned between the first portion and the second portion of the rollable panel.
    Type: Application
    Filed: January 15, 2024
    Publication date: May 9, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Tsung-Han TSAI
  • Publication number: 20240153896
    Abstract: A first protective layer is formed on a first die and a second die, and openings are formed within the first protective layer. The first die and the second die are encapsulated such that the encapsulant is thicker than the first die and the second die, and vias are formed within the openings. A redistribution layer can also be formed to extend over the encapsulant, and the first die may be separated from the second die.
    Type: Application
    Filed: January 12, 2024
    Publication date: May 9, 2024
    Inventors: Hui-Min Huang, Chih-Wei Lin, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11978712
    Abstract: Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chin-Wei Kuo, Hsiao-Tsung Yen, Min-Chie Jeng, Yu-Ling Lin
  • Publication number: 20240147660
    Abstract: A manifold for cooling server includes an inlet pipe, an outlet pipe, a plurality of first hole groups, and a plurality of second hole groups. The distance between every two adjacent first hole groups is first distance, the distance between every two adjacent second hole groups is second distance, and the first distance is not equal to the second distance. The first distance is designed for one size of server, and the second distance is designed for another size of server. When changing the size of all servers in the rack, turning manifold 100 to 180 degrees to change the first hole groups 30 to the second hole groups 40 for adapting the severs, which makes the manifold 100 adapt two different sizes of server. A rack and a data center cooling system using the manifold are also disclosed.
    Type: Application
    Filed: June 12, 2023
    Publication date: May 2, 2024
    Inventors: YU-CHIA TING, TSUNG-LIN LIU
  • Publication number: 20240139990
    Abstract: An internal rotor type nail drive device of electric nail gun, comprising a nailing rod and an internal rotor type rotary actuator that can output a specific rotation angle and can drive the nailing rod to move downward for nailing. Specifically, the rotary actuator comprises a stator and a rotor arranged inside the stator, even groups of electromagnetic mutual action components are configured in pairs between the stator and the rotor, to generate a tangential force to drive the rotor to rotate for a specific rotation angle, and to drive the nailing rod to move for a nailing stroke. The nailing stroke can be determined by a specific rotation angle. Thus, through the above configuration of the rotary actuator, the structure of the electric nail gun can be simplified, and the kinetic energy for nailing can be increased.
    Type: Application
    Filed: August 22, 2023
    Publication date: May 2, 2024
    Inventors: I-TSUNG WU, CHIA-SHENG LIANG, YU-CHE LIN, WEN-CHIN CHEN
  • Publication number: 20240147664
    Abstract: A flow guiding device in an immersion-cooled chassis of a server comprises at least one deflector located above a chip on a mainboard in the chassis, each deflector comprises a first end for mounting to the mainboard above the chip and a second end inclined away from the mainboard. The first end is immersed in coolant, the second end is higher than the first end; the deflector further comprises a hollow part including multiple through holes for interrupting upward movement vapor bubbles generated by the hot chip, which reduces probability of the vapor bubbles escaping from the coolant liquid and the chassis. A liquid-cooled chassis having the flow guiding device is also disclosed.
    Type: Application
    Filed: December 30, 2022
    Publication date: May 2, 2024
    Inventors: SUNG TSANG, TSUNG-LIN LIU, YU-CHIA TING, CHENG-YI HUANG, CHIA-NAN PAI
  • Publication number: 20240135990
    Abstract: A resistive memory apparatus including a memory cell array, at least one dummy transistor and a control circuit is provided. The memory cell array includes a plurality of memory cells. Each of the memory cells includes a resistive switching element. The dummy transistor is electrically isolated from the resistive switching element. The control circuit is coupled to the memory cell array and the dummy transistor. The control circuit is configured to provide a first bit line voltage, a source line voltage and a word line voltage to the dummy transistor to drive the dummy transistor to output a saturation current. The control circuit is further configured to determine a value of a second bit line voltage for driving the memory cells according to the saturation current. In addition, an operating method and a memory cell array of the resistive memory apparatus are also provided.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 25, 2024
    Applicant: Winbond Electronics Corp.
    Inventors: Ming-Che Lin, Min-Chih Wei, Ping-Kun Wang, Yu-Ting Chen, Chih-Cheng Fu, Chang-Tsung Pai
  • Publication number: 20240138063
    Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 25, 2024
    Applicant: Unimicron Technology Corp.
    Inventors: Ping-Tsung Lin, Kai-Ming Yang, Chia-Yu Peng, Pu-Ju Lin, Cheng-Ta Ko
  • Publication number: 20240136222
    Abstract: Different isolation liners for different type FinFETs and associated isolation feature fabrication are disclosed herein. An exemplary method includes performing a fin etching process on a substrate to form first trenches defining first fins in a first region and second trenches defining second fins in a second region. An oxide liner is formed over the first fins in the first region and the second fins in the second region. A nitride liner is formed over the oxide liner in the first region and the second region. After removing the nitride liner from the first region, an isolation material is formed over the oxide liner and the nitride liner to fill the first trenches and the second trenches. The isolation material, the oxide liner, and the nitride liner are recessed to form first isolation features (isolation material and oxide liner) and second isolation features (isolation material, nitride liner, and oxide liner).
    Type: Application
    Filed: December 18, 2023
    Publication date: April 25, 2024
    Inventors: Tzung-Yi TSAI, Tsung-Lin LEE, Yen-Ming CHEN
  • Publication number: 20240136484
    Abstract: An electronic device includes a substrate, a semiconductor unit and an insulating layer. The semiconductor unit is disposed on the substrate. The insulating layer is disposed on the semiconductor unit, and the insulating layer includes a first portion and a second portion connected to the first portion. In a top view, the first portion partially overlaps the semiconductor unit, the second portion does not overlap the semiconductor unit, and a part of an edge of the insulating layer is irregular.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: InnoLux Corporation
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Publication number: 20240134631
    Abstract: An information handling system includes a memory and a processor. The memory stores a current basic input/output system (BIOS) firmware image. During a regular boot mode of the information handling, the processor creates a first set of tables associated with the current BIOS firmware image, stores the first tables to the memory, and receives a BIOS firmware update image. During a BIOS update boot mode of the information handling system, the processor creates a second plurality of tables associated with the BIOS firmware update image, and compares the first and second tables. In response to a difference being determined between the first and second tables, the processor aborts the BIOS update boot mode and generate an error log.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 25, 2024
    Inventors: Shekar Babu Suryanarayana, Karunakar Poosapalli, Hung V. Ho, James L. Walker, Tsung-Lin Chuang, Chia-Hao Chang, Te-Lung Lin
  • Patent number: 11967613
    Abstract: A semiconductor structure includes a substrate, and an active device and a passive device over the substrate. The active device is disposed in a first region of the substrate, and the passive device is disposed in a second region of the substrate. The semiconductor structure further includes a shielding structure and a passivation layer. The shielding structure includes a barrier layer and a ceiling layer. The barrier layer is on the passive device and the active device, and the ceiling layer is on the barrier layer. The passivation layer is under the barrier layer and covers a top surface of the passive device. An air cavity is defined by sidewalls of the barrier layer, a bottom surface of the ceiling layer, and the substrate.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: April 23, 2024
    Assignee: WIN SEMICONDUCTORS CORP.
    Inventors: Ju-Hsien Lin, Jung-Tao Chung, Shu-Hsiao Tsai, Hsi-Tsung Lin, Chen-An Hsieh, Yi-Han Chen, Yao-Ting Shao
  • Publication number: 20240130052
    Abstract: A display device includes a display panel including a rollable portion and a non-rollable portion. The display panel includes a supporting structure including a groove disposed on a first side of the supporting structure, a substrate disposed on a second side of the supporting structure and the first side opposite to the second side, and a circuit board fixed onto a back of the display panel. The non-rollable portion has a first region. A first region of the circuit board is joined to the first region of the non-rollable portion. The non-rollable portion has a first end and a second end. The first end is connected to the rollable portion. The second end is connected to the circuit board.
    Type: Application
    Filed: December 20, 2023
    Publication date: April 18, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Tsung-Han Tsai, Kuan-Feng Lee
  • Publication number: 20240129167
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Patent number: 11961444
    Abstract: The disclosure provides a transparent display device including a display panel. The display panel includes a display area, a non-display area, and a plurality of pixels. The non-display area is adjacent to the display area. The plurality of pixels are disposed in the display area. A difference between a transmittance of the display area and a transmittance of the non-display area is less than 30% of the transmittance of the display area.
    Type: Grant
    Filed: February 3, 2023
    Date of Patent: April 16, 2024
    Assignee: Innolux Corporation
    Inventors: Yu-Chia Huang, Yuan-Lin Wu, Tsung-Han Tsai, Kuan-Feng Lee
  • Publication number: 20240120451
    Abstract: An electronic assembly is provided. The electronic assembly includes a first circuit structure including a conductive structure, a second circuit structure disposed on the first circuit structure, a plurality of electronic elements disposed on the first circuit structure, and a connecting element disposed on the first circuit layer. The connecting element is disposed between two adjacent ones of the plurality electronic elements and electrically connected to the second circuit layer and one of the two adjacent ones of the plurality of electronic elements.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 11, 2024
    Inventors: Jia-Yuan CHEN, Tsung-Han TSAI, Kuan-Feng LEE, Yuan-Lin WU
  • Publication number: 20240120326
    Abstract: Disclosed is a bio sensing device including a medium layer, a light emitting element and an optical sensor. The light emitting element is configured to emit a light toward a user's skin layer, in which the light passes through the medium layer and has a maximum intensity in a first wavelength. The optical sensor is configured to receive a reflected part of the light from the user's skin layer, in which the reflected part of the light passes through the medium layer, and the medium layer has a first transmittance greater than 60% with respect to the first wavelength.
    Type: Application
    Filed: September 11, 2023
    Publication date: April 11, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin WU, Chandra LIUS, Tsung-Han TSAI, Kuan-Feng LEE
  • Patent number: 11953052
    Abstract: A fastener is adapted for assembling a first housing to a second housing. The first housing is provided with a protruding portion and a buckling portion, and the second housing has a first surface, a second surface, and a through hole. The fastener includes a first portion, at least one connecting portion, at least two elastic portions, and a second portion. The first portion movably abuts against the first surface and has a first opening. The connecting portion is accommodated in the through hole. One end of the connecting portion is connected to the first portion. The connecting portion is spaced apart from an inner edge of the second housing by a gap. The two elastic portions inclinedly extend into the first opening. The second portion movably abuts against the second surface and is disposed at the another end of the connecting portion.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 9, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Jian-Hua Chen, Po-Tsung Shih, Yu-Wei Lin, Ming-Hua Ho, Chih-Hao Wu