Patents by Inventor Tsung Yuan Chen

Tsung Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12369406
    Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.
    Type: Grant
    Filed: July 31, 2023
    Date of Patent: July 22, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsi-Yu Kuo, Tsung-Yuan Chen, Yu-Lin Chu, Chih-Wei Hsu
  • Publication number: 20230378162
    Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company LTD
    Inventors: Hsi-Yu Kuo, Tsung-Yuan Chen, Yu-Lin Chu, Chih-Wei Hsu
  • Patent number: 11764206
    Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: September 19, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, LTD.
    Inventors: Hsi-Yu Kuo, Yu-Lin Chu, Tsung-Yuan Chen, Chih-Wei Hsu
  • Patent number: 11688837
    Abstract: A light-emitting device, including a mount substrate, at least one light emitting element, a first light transparent member, a second light transparent member and a covering member, is disclosed. The at least one light emitting element is disposed on the mount substrate in a flip-chip manner. The first light transparent member is configured to receive the incident light emitting from the light emitting element, wherein the first light transparent member is formed of an inorganic substance and an inorganic phosphor, and includes a top surface and a first side surface contiguous to the top surface. The second light transparent member is disposed on the top surface of the first light transparent member and is formed of the inorganic substance and contains no the inorganic phosphor, and includes an externally exposed light emission surface and a second side surface contiguous to the externally exposed light emission surface.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: June 27, 2023
    Assignee: EVERLIGHT ELECTRONICS CO., LTD.
    Inventors: Hung-Hsiang Yeh, Robert Yeh, Tsung-Yuan Chen, Bo-Yu Chen
  • Publication number: 20230154918
    Abstract: In an integrated circuit (IC) fabrication process, devices or sub-circuits are fabricated in respective first and second electrical isolation regions. A back-to-back (B2B) diodes sub-circuit is fabricated in a third electrical isolation region, which includes a first diode whose cathode is connected with a first terminal and whose anode is connected with a second terminal, and a second diode whose anode is connected with the first terminal and whose cathode is connected with the second terminal. Electrostatic discharge protection is provided to the first and second electrical isolation regions by electrically connecting the first terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the first device or sub-circuit and the second terminal of the B2B diodes sub-circuit with a VSS power supply terminal of the second device or sub-circuit. Thereafter, the first device or sub-circuit and the second device or sub-circuit are electrically connected.
    Type: Application
    Filed: January 24, 2022
    Publication date: May 18, 2023
    Inventors: Hsi-Yu Kuo, Yu-Lin Chu, Tsung-Yuan Chen, Chih-Wei Hsu
  • Publication number: 20210313493
    Abstract: A light-emitting device, including a mount substrate, at least one light emitting element, a first light transparent member, a second light transparent member and a covering member, is disclosed. The at least one light emitting element is disposed on the mount substrate in a flip-chip manner. The first light transparent member is configured to receive the incident light emitting from the light emitting element, wherein the first light transparent member is formed of an inorganic substance and an inorganic phosphor, and includes a top surface and a first side surface contiguous to the top surface. The second light transparent member is disposed on the top surface of the first light transparent member and is formed of the inorganic substance and contains no the inorganic phosphor, and includes an externally exposed light emission surface and a second side surface contiguous to the externally exposed light emission surface.
    Type: Application
    Filed: November 23, 2020
    Publication date: October 7, 2021
    Inventors: Hung-Hsiang YEH, Robert YEH, Tsung-Yuan CHEN, Bo-Yu CHEN
  • Patent number: 10553241
    Abstract: A method and system provides a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) transducer. The method and system include forming the disk of the NFT and forming the pin of the NFT. The disk is formed from a first material. The pin is formed from a second material different from the first material. The pin contacts the disk. At least a portion of the pin is between the disk and an air-bearing surface (ABS) location.
    Type: Grant
    Filed: January 2, 2018
    Date of Patent: February 4, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Kris Vossough, Xiaokai Zhang, Armen Kirakosian, Jinwen Wang, Tsung Yuan Chen, Yufeng Hu
  • Patent number: 10271433
    Abstract: A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.
    Type: Grant
    Filed: September 16, 2015
    Date of Patent: April 23, 2019
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen, Shih-Lian Cheng
  • Patent number: 10106885
    Abstract: A magnetic write apparatus includes a pole and a near field transducer. The pole extends in a yoke direction from a media facing surface where the yoke direction extends perpendicular to the media facing surface. The near field transducer includes a near field transducer cap and a near field transducer nose. The near field transducer nose is separated from the pole by the near field transducer cap and a dielectric gap and the near field transducer nose comprises a bevel surface that forms a bevel angle with a plane extending in the yoke direction.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: October 23, 2018
    Assignee: WESTERN DIGITAL (FREMONT), LLC
    Inventors: Shawn M. Tanner, Mingjun Yu, Min Zheng, Kyung Lee, Tsung Yuan Chen
  • Publication number: 20180122407
    Abstract: A method and system provides a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) transducer. The method and system include forming the disk of the NFT and forming the pin of the NFT. The disk is formed from a first material. The pin is formed from a second material different from the first material. The pin contacts the disk. At least a portion of the pin is between the disk and an air-bearing surface (ABS) location.
    Type: Application
    Filed: January 2, 2018
    Publication date: May 3, 2018
    Inventors: KRIS VOSSOUGH, XIAOKAI ZHANG, ARMEN KIRAKOSIAN, JINWEN WANG, TSUNG YUAN CHEN, YUFENG HU
  • Patent number: 9881638
    Abstract: A method and system provides a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) transducer. The method and system include forming the disk of the NFT and forming the pin of the NFT. The disk is formed from a first material. The pin is formed from a second material different from the first material. The pin contacts the disk. At least a portion of the pin is between the disk and an air-bearing surface (ABS) location.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: January 30, 2018
    Assignee: WESTERN DIGITAL (FREMONT), LLC
    Inventors: Kris Vossough, Xiaokai Zhang, Armen Kirakosian, Jinwen Wang, Tsung Yuan Chen, Yufeng Hu
  • Publication number: 20180005650
    Abstract: A method for fabricating a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) write apparatus is described. The HAMR write apparatus is coupled with a laser for providing energy and has a media-facing surface (MFS) configured to reside in proximity to a media during use. The method includes providing a stack on an underlayer. The stack includes an endpoint detection layer, an optical layer and an etchable layer. The optical layer is between the etchable and endpoint detection layers. The etchable layer is patterned to form a mask. A portion of the optical layer is removed. A remaining portion of the optical layer has a bevel at a bevel angle from the MFS location. The bevel angle is nonzero and acute. The NFT is provided such that the NFT has an NFT front surface adjoining the bevel and at the bevel angle from the MFS location.
    Type: Application
    Filed: September 13, 2017
    Publication date: January 4, 2018
    Inventors: Shawn M. Tanner, Mingjun Yu, Min Zheng, Kyung Lee, Tsung Yuan Chen
  • Patent number: 9836112
    Abstract: A portable device and a method for enabling the portable device are disclosed. The portable device comprises a power module, a processing module, a sensing module, and an enable control module. The power module is configured to provide electric power. The processing module is configured to run an operating system to drive the portable device when the processing module itself is enabled. The sensing module is configured to sense a gesture to generate a group of touch sensing signals, and to judge whether the group of touch sensing signals conform to a group of predefined signals so as to generate an operating system enabling signal. The enable control module is configured to temporarily enable the sensing module according to a switching signal, and to enable the processing module according to the operating system enabling signal.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: December 5, 2017
    Assignee: WISTRON CORP.
    Inventors: Tsung Yuan Chen, Yung-Yen Chang
  • Patent number: 9786304
    Abstract: A method for fabricating a near-field transducer (NFT) for a heat assisted magnetic recording (HAMR) write apparatus is described. The HAMR write apparatus is coupled with a laser for providing energy and has a media-facing surface (MFS) configured to reside in proximity to a media during use. The method includes providing a stack on an underlayer. The stack includes an endpoint detection layer, an optical layer and an etchable layer. The optical layer is between the etchable and endpoint detection layers. The etchable layer is patterned to form a mask. A portion of the optical layer is removed. A remaining portion of the optical layer has a bevel at a bevel angle from the MFS location. The bevel angle is nonzero and acute. The NFT is provided such that the NFT has an NFT front surface adjoining the bevel and at the bevel angle from the MFS location.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: October 10, 2017
    Assignee: WESTERN DIGITAL (FREMONT), LLC
    Inventors: Shawn M. Tanner, Mingjun Yu, Min Zheng, Kyung Lee, Tsung Yuan Chen
  • Patent number: 9536064
    Abstract: An operation method of an electronic apparatus is provided, wherein a setting procedure of safety mechanism is executed first. The procedure includes: receiving a setting operation through a setting interface so as to select plural sensing units from a sensing unit group; creating a unlocking information according to the setting operation, wherein the unlocking information includes an enabling sequence of the selected sensing units; making the unlocking information associated with the operation function. After finishing the setting procedure of safety mechanism, when a trigger event conforming to the unlocking information is received, the operation corresponding to the unlocking information is executed.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: January 3, 2017
    Assignee: Wistron Corporation
    Inventors: Yung-Yen Chang, Tsung-Yuan Chen
  • Patent number: 9510464
    Abstract: A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: November 29, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen
  • Patent number: 9380706
    Abstract: A substrate strip with wiring is provided. The substrate strip includes a plurality of wiring blocks, a carrying substrate, and an adhesive layer. Each of the wiring blocks includes at least one wiring board unit, and each of the wiring board unit includes an insulating layer and a wiring layer disposed on the insulating layer. The carrying substrate has a carrying surface. The adhesive layer is disposed between the carrying surface and the wiring layers, and adheres to the wiring blocks and the carrying substrate. When the adhesive layer is separated from the wiring blocks, the wiring layers are kept on the insulating layers. Further, a manufacturing method for the substrate is provided.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: June 28, 2016
    Assignee: Unimicron Technology Corp.
    Inventor: Tsung-Yuan Chen
  • Patent number: 9324664
    Abstract: An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: April 26, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Tsung-Yuan Chen, Wei-Ming Cheng
  • Patent number: 9307651
    Abstract: A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: April 5, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang
  • Patent number: 9237643
    Abstract: A circuit board structure including a dielectric layer, a fine circuit pattern and a patterned conductive layer is provided, wherein the fine circuit pattern is embedded in a surface of the dielectric layer, and the patterned conductive layer is disposed on another surface of the dielectric layer and protrudes therefrom.
    Type: Grant
    Filed: December 24, 2012
    Date of Patent: January 12, 2016
    Assignee: Unimicron Technology Corp.
    Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang, David C. H. Cheng