Abstract: A method for manufacturing a wiring structure of a wiring board is provided. In the method, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, a barrier layer completely covering the film is formed. Next, an intaglio pattern partially exposing the insulation layer is formed on an outer surface of the barrier layer. Next, an activated layer is formed on the outer surface and in the intaglio pattern. Then, the activated layer on the outer surface is removed, and the activated layer in the intaglio pattern is remained. After the activated layer on the outer surface is removed, a conductive material is formed in the intaglio pattern by using a chemical deposition method. After forming the conductive material, the barrier layer and the film are removed.

Abstract: A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer.

Abstract: A method for fabricating a wiring structure of a wiring board is provided. First, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, an intaglio pattern exposing the insulation layer is formed on an outer surface of the film. The intaglio pattern is formed by removing a portion of the insulation layer and a portion of the film. Next, an activated layer is formed on the outer surface and in the intaglio pattern. The activated layer completely covers the outer surface and all surfaces of the intaglio pattern. Then, the film and the activated layer on the outer surface are removed, and the activated layer in the intaglio pattern is remained. After the film and the activated layer on the outer surface are removed, a conductive material is formed in the intaglio pattern by chemical deposition method.

Abstract: A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.

Abstract: A process of an embedded circuit structure is provided. A complex metal layer, a prepreg, a supporting board, another prepreg and another complex metal layer are laminated together, wherein each of the complex metal layers has an inner metal layer and an outer metal layer stacked on the inner metal layer, the roughness of the outer surfaces of the inner metal layers is less than the roughness of the second outer surfaces of the outer metal layers, and the outer surfaces of the outer metal layers after laminating are exposed outwards. Each of two patterned photoresist layers is respectively formed on the outer surfaces of the outer metal layers. A metal material is created on portions of the outer surfaces of the outer metal layers not covered by the patterned photoresist layers to form two patterned circuit layers. The patterned photoresist layers are then removed to form a laminating structure.

Abstract: An embedded circuit board including a glass fiber layer, two dielectric layers, and two circuit layers is provided. The glass fiber layer has a first surface and a second surface corresponding to the first surface. The dielectric layers are disposed on the first surface and the second surface, respectively. The circuit layers are embedded in the dielectric layers above the first surface and the second surface, respectively. The outer surface of each circuit layer is coplanar with the outer surface of each dielectric layer, and a distance between the circuit layer and the glass fiber layer is greater than or equal to 3 ?m. In addition, a process of the embedded circuit board is provided.

Abstract: A method in a KVM switch system for interacting with the user to switch computer ports using a touch panel device having a touch-sensitive screen is described. The system allows a user to accomplish port switching by “drawing” a symbol (such as an Arabic number) representing a port number on the touch screen, coupled with other actions, such as one or more touches of the screen, an action using another input device such as a mouse, keyboard, buttons, etc., to confirm the port number input.

Abstract: A fabricating method of an embedded package structure includes following steps. First, a first circuit structure and a second circuit structure are formed respectively on a first board and a second board which are combined to form an integrated panel. The first board and the second board are then separated. Next, an embedded element is electrically disposed on the first circuit structure. At least one conductive bump is formed on the second circuit structure. Thereafter, a semi-cured film is provided, and a laminating process is performed to laminate the first circuit structure on the first board, the semi-cured film, and the second circuit structure on the second board. The semi-cured film encapsulates the embedded element and the at least one conductive bump pierces through the semi-cured film and electrically connects the first circuit structure.

Abstract: A method of fabricating a single-pole perpendicular magnetic recording head to contain a bevel angle promotion layer that facilitates the fabrication of the bevel angle in a trapezoidal main pole. The bevel angle promotion layer is made of a non-magnetic material that is softer than the material (e.g., Al2O3) that normally underlies the main pole. In one embodiment, the bevel angle promotion layer is formed between an end of the yoke and the air bearing surface (ABS), with the top surface of the bevel angle promotion layer being substantially coplanar with the top surface of the yoke. In other embodiment the bevel angle promotion layer is integrated with a leading edge taper material, which is formed of a magnetic material, to broaden the magnetic flux path between the yoke and the main pole.

Abstract: In a perpendicular recording head, a notch is formed in the top write gap at a location on top of the main pole. A perpendicular head with this notched top write gap structure has less transition curvature and better writability while reducing the adjacent track interference (ATI). Also, the process used to fabricate the head ensures that the trailing edge (writing edge) of the main pole is extremely flat with no corner rounding.

Abstract: A method of making a package substrate includes providing a cladding sheet comprising a first metal layer, a second metal layer and an intermediate layer between the first and second metal layers; etching away a portion of the first metal layer to expose a portion of the intermediate layer thereby forming a metal island body; laminating a first copper clad on the cladding sheet comprising a first copper foil and a first insulating layer; patterning the first copper foil to form a first circuit trace; patterning the second metal layer to form a second circuit trace; removing the metal island body to form a cavity in the first insulating layer; and removing the intermediate layer from bottom of the cavity.

Abstract: A package substrate structure includes a substrate with a first side and a second side opposite to the first side, a via connecting the first side and the second side, a cavity in the substrate and on the first side, and a patterned conductive layer disposed on at least one of the first side and the second side, filling the cavity and the via, and including a first conductive layer, a second conductive layer and a third conductive layer. The second conductive layer is different from at least one of the first conductive layer and the third conductive layer.

Abstract: A circuit board process is provided. First, multiple carriers is provided, and a first conductive layer having multiple concave structures is formed on each carrier. A dielectric layer is then provided, and the carriers with the first conductive layers are laminated on a first and a second surface of the dielectric layer respectively, wherein portions of the first conductive layers are embedded in the first and second surfaces. Next, the carriers are removed. Thereafter, the first conductive layer corresponding to at least one concave is removed to expose a portion of the dielectric layer. Next, the exposed dielectric layer is removed to form an opening. A second conductive layer is then formed on the inner wall of the opening, wherein the second conductive layer is electrically connected to the first conductive layers on both sides of the dielectric layer.

Abstract: A process for fabricating a circuit board with an embedded passive component is provided. An electrode-patterned layer having electrodes is formed on a surface of a conductive layer. A passive component material is filled in the intervals between the electrodes. The conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. The conductive layer is patterned to form a circuit layer.

Abstract: A method for fabricating a magnetic head with a trapezoidal shaped pole piece tip is described. The body of the main pole piece is deposited; then one or more layers for the pole piece tip are deposited. A bed material is deposited over the pole piece tip material. A void is formed in the bed material over the area for the pole piece tip. The void is filled with an ion-milling resistant material such as alumina preferably using atomic layer deposition or atomic layer chemical vapor deposition. The excess ion-milling resistant material and the bed material are removed. The result is an ion-milling mask formed over the area for the pole piece tip. Ion milling is then used to remove the unmasked material in the pole piece tip layer and to form a beveled pole piece tip and preferably a beveled face on the main pole piece.

Abstract: A process for fabricating a circuit board with an embedded passive component is provided. First, an electrode-patterned layer having electrodes is formed on a surface of a conductive layer. Then, a passive component material is filled in the intervals between the electrodes. Then, the conductive layer and the electrode-patterned layer are laminated to a dielectric layer, wherein the electrode-patterned layer is embedded in the dielectric layer. Next, the conductive layer is patterned to form a circuit layer.

Abstract: A method and system for providing a PMR pole in a magnetic recording transducer including an intermediate layer are disclosed. The method and system include providing a mask on the intermediate layer. The mask includes a line having at least one side. A hard mask layer is provided on the mask. At least a portion of the hard mask layer resides on the side(s) of the line. At least part of the hard mask layer on the side(s) of the line is removed. Thus, at least a portion of the line is exposed. The line is then removed, providing an aperture in the hard mask corresponding to the line. The method also includes forming a trench in the intermediate layer under the aperture. The trench top is wider than its bottom. The method further includes providing a PMR pole, at least a portion of which resides in the trench.

Abstract: A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

Abstract: An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.

Abstract: A wiring board including two wiring layers and a flexible core layer is provided. The flexible core layer is disposed between the wiring layers, and the flexible core layer is an insulator. A flexure of the wiring board is between 0 degree and 170 degrees.