Abstract: A cabinet includes a chassis and an electromagnetic interference (EMI) shielding apparatus. The shielding apparatus includes a bracket installed to a first end of the chassis, a shaft rotatably installed in the bracket, and a shielding member reeled about the shaft. The shielding member includes a first end fixed to the shaft, and a second end opposite to the first end and forming a holder. A second end of the chassis forms a latch opposite to the bracket for engaging with the holder. The shielding member is made of EMI shielding material, and the shielding member is wound on or let out from the shaft as the shaft rotates.

Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.

Abstract: A package substrate includes a core layer, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core layer. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded pads are located on an upper surface of the insulating layer.

Abstract: A method for providing a perpendicular magnetic recording (PMR) head is disclosed. The method comprises: providing an insulating layer; covering the insulating layer with a hard mask material; forming a pre-defined shape in the hard mask material; forming a pole trench and a yoke area in the insulating layer by a first reactive ion etching (RIE) process in which the yoke area includes a loading prevention pattern; performing a wet etching process to remove the hard mask material from the pole trench and the yoke area; performing a second RIE process to remove the loading prevention pattern of the yoke area, wherein the pole trench and the remainder of the yoke area are not removed and remain having similar side wall angles; and providing a PMR pole in which at least a portion of the PMR pole resides in the pole trench.

Abstract: A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.

Abstract: A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.

Abstract: A cabinet includes a chassis and an electromagnetic interference (EMI) shielding apparatus. The shielding apparatus includes a bracket installed to a first end of the chassis, a shaft rotatably installed in the bracket, and a shielding member reeled about the shaft. The shielding member includes a first end fixed to the shaft, and a second end opposite to the first end and forming a holder. A second end of the chassis forms a latch opposite to the bracket for engaging with the holder. The shielding member is made of EMI shielding material, and the shielding member is wound on or let out from the shaft as the shaft rotates.

Abstract: A package substrate includes a core board, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core board. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded bump pads are located on an upper surface of the insulating layer.

Abstract: A supplying device including a supplying part and an adjustment part is provided. The supplying part includes a run-through supplying path for transporting a fluid. The adjustment part includes a channel and one or more recovery paths adjacent to the channel. The supplying part is disposed in the channel to allow the fluid to flow out of the channel through the supplying part and to allow the recovery paths to suck a portion of the etching solution outputted from the channel in order to control the amount of output of the fluid. Wet-etching equipment including the supplying device is also provided.

Abstract: A fabricating method of an embedded package structure is provided. The method includes combining a first board and a second board to form an integrated panel; forming a first circuit structure on the first board and forming a second circuit structure on the second board; separating the first board from the second board; electrically disposing an embedded element on the first circuit structure; forming at least one conductive bump on the second circuit structure; and providing a semi-cured film and performing a laminating process to laminate the first circuit structure on the first board, the semi-cured film, and the second circuit structure on the second board, wherein the semi-cured film encapsulates the embedded element, and after the laminating process is performed, the at least one conductive bump pierces through the semi-cured film and is electrically connected to the first circuit structure.

Abstract: A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.

Abstract: A method in a KVM switch system for interacting with the user to switch computer ports using a touch panel device having a touch-sensitive screen is described. The system allows a user to accomplish port switching by “drawing” a symbol (such as an Arabic number) representing a port number on the touch screen, coupled with other actions, such as one or more touches of the screen, an action using another input device such as a mouse, keyboard, buttons, etc., to confirm the port number input.

Abstract: A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.

Abstract: A circuit board includes a circuit substrate, a dielectric layer, and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit, a first intaglio pattern, and a second intaglio pattern. The patterned circuit structure includes at least a second circuit and a plurality of third circuits. The second circuit is disposed in the first intaglio pattern. The third circuits are disposed in the second intaglio pattern and the blind via. Each third circuit has a first conductive layer, a second conductive layer, and a barrier layer. The first conductive layer is located between the barrier layer and the second intaglio pattern and between the barrier layer and the blind via. The second conductive layer covers the barrier layer.

Abstract: A voltage-drop testing system, including a voltage-drop control apparatus, and a voltage-drop testing method adapted for the voltage-drop testing system based on LABVIEW department platform. When the LABVIEW department platform 12 is running, different groups of test data may be transferred to the PLD tester 20, when the PLD tester 20 finishes the testing based on all groups of test data, the PLD tester 20 feeds back the test results to the LABVIEW department platform 12, and the LABVIEW department platform 12 creates the voltage-drop testing graphic frame displaying the test results for the electronic device under test 2 for the convenience of a user.

Abstract: A process for fabricating a circuit board is provided. A circuit substrate having a first surface and a first circuit layer is provided. A first dielectric layer having a second surface is formed on the circuit substrate and covers the first surface and the first circuit layer. An antagonistic activation layer is formed on the second surface. The antagonistic activation layer is irradiated by a laser beam to form at least a blind via extended from the antagonistic activation layer to the first circuit layer and an intaglio pattern. A first conductive layer is formed inside the blind via. A second conductive layer is formed in the intaglio pattern and the blind via. The second conductive layer covers the first conductive layer and is electrically connected with the first circuit layer through the first conductive layer. The antagonistic activation layer is removed to expose the second surface.

Abstract: A circuit board structure comprising a composite layer, a fine circuit pattern and a patterned conductive layer is provided. The fine circuit pattern is inlaid in the composite layer, and the patterned conductive layer is disposed on a surface of the composite layer. After fine circuit grooves are formed on the surface of the composite layer, conductive material is filled into the grooves to form the fine circuit pattern inlaid in the composite layer. Since this fine circuit pattern has relatively fine line width and spacing, the circuit board structure has a higher wiring density.

Abstract: A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.

Abstract: A manufacturing method of a circuit board is provided. A circuit substrate having a first surface and at least a first circuit is provided. A dielectric layer having a second surface and covering the first surface and the first circuit is formed on the circuit substrate. The dielectric layer is irradiated by a laser beam to form a first intaglio pattern, a second intaglio pattern and at least a blind via. A first conductive layer is formed in the first intaglio pattern, the second intaglio pattern and the blind via. A barrier layer and a second conductive layer are formed in the second intaglio pattern and the blind via. Parts of the second conductive layer, parts of the barrier layer and parts of the first conductive layer are removed until the second surface of the dielectric layer is exposed, so as to form a patterned circuit structure.

Abstract: A method and system for providing a PMR pole in a magnetic recording transducer including an intermediate layer are disclosed. The method and system include providing a mask on the intermediate layer. The mask includes a line having at least one side. A hard mask layer is provided on the mask. At least a portion of the hard mask layer resides on the side(s) of the line. At least part of the hard mask layer on the side(s) of the line is removed. Thus, at least a portion of the line is exposed. The line is then removed, providing an aperture in the hard mask corresponding to the line. The method also includes forming a trench in the intermediate layer under the aperture. The trench top is wider than its bottom. The method further includes providing a PMR pole, at least a portion of which resides in the trench.