Patents by Inventor Tsung Yuan Chen
Tsung Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160007472Abstract: A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is foamed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed.Type: ApplicationFiled: September 16, 2015Publication date: January 7, 2016Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen, Shih-Lian Cheng
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Patent number: 9161454Abstract: A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed. Moreover, the electrical device package structure is also provided.Type: GrantFiled: December 24, 2012Date of Patent: October 13, 2015Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen, Shih-Lian Cheng
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Patent number: 9116191Abstract: A voltage-drop testing system, including a voltage-drop control apparatus, and a voltage-drop testing method adapted for the voltage-drop testing system based on LABVIEW department platform. When the LABVIEW department platform 12 is running, different groups of test data may be transferred to the PLD tester 20, when the PLD tester 20 finishes the testing based on all groups of test data, the PLD tester 20 feeds back the test results to the LABVIEW department platform 12, and the LABVIEW department platform 12 creates the voltage-drop testing graphic frame displaying the test results for the electronic device under test 2 for the convenience of a user.Type: GrantFiled: March 15, 2012Date of Patent: August 25, 2015Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Tsung-Yuan Chen, Kuei-Chih Hou, Wen-Kai Chiang
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Patent number: 9084379Abstract: A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.Type: GrantFiled: March 19, 2012Date of Patent: July 14, 2015Assignee: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Chun-Chien Chen, Cheng-Po Yu
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Publication number: 20150153795Abstract: A portable device and a method for enabling the portable device are disclosed. The portable device comprises a power module, a processing module, a sensing module, and an enable control module. The power module is configured to provide electric power. The processing module is configured to run an operating system to drive the portable device when the processing module itself is enabled. The sensing module is configured to sense a gesture to generate a group of touch sensing signals, and to judge whether the group of touch sensing signals conform to a group of predefined signals so as to generate an operating system enabling signal. The enable control module is configured to temporarily enable the sensing module according to a switching signal, and to enable the processing module according to the operating system enabling signal.Type: ApplicationFiled: April 23, 2014Publication date: June 4, 2015Applicant: Wistron Corp.Inventors: Tsung Yuan CHEN, Yung-Yen CHANG
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Publication number: 20150113256Abstract: An operation method of an electronic apparatus is provided, wherein a setting procedure of safety mechanism is executed first. The procedure includes: receiving a setting operation through a setting interface so as to select plural sensing units from a sensing unit group; creating a locking information according to the setting operation, wherein the locking information includes an enabling sequence of the selected sensing units; making the locking information associated with the operation function. After finishing the setting procedure of safety mechanism, when a trigger event conforming to the locking information is received, the operation corresponding to the locking information is executed.Type: ApplicationFiled: February 24, 2014Publication date: April 23, 2015Applicant: Wistron CorporationInventors: Yung-Yen Chang, Tsung-Yuan Chen
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Patent number: 8955218Abstract: A package substrate includes a core layer, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core layer. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded pads are located on an upper surface of the insulating layer.Type: GrantFiled: November 6, 2013Date of Patent: February 17, 2015Assignee: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Shih-Lian Cheng
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Publication number: 20150042554Abstract: A method for adjusting screen displaying mode and an electronic device suitable for the method are provided; the electronic device has a body sensor. The method includes: determining whether the body sensor has detected a body contact; when the body contact is detected by the body sensor, not adjusting a screen displaying mode of the electronic device; when the body contact is not detected by the body sensor, determining whether to adjust the screen displaying mode of the electronic device according to a tilt status of the electronic device.Type: ApplicationFiled: November 6, 2013Publication date: February 12, 2015Applicant: Wistron CorporationInventors: Tsung-Yuan Chen, Yung-Yen Chang, Yen-Yu Lee
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Patent number: 8943683Abstract: A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.Type: GrantFiled: October 11, 2013Date of Patent: February 3, 2015Assignee: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Ming-Huang Ting
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Publication number: 20140239463Abstract: An embedded chip package structure including a core layer, a chip, a first circuit layer and a second circuit layer is provided. The core layer includes a first surface, a second surface opposite to each other and a chip container passing through the first surface and the second surface. The chip is disposed in the chip container. The chip includes an active surface and a protrusion and a top surface of the protrusion is a part of the active surface. The first circuit layer is disposed on the first surface and electrically connected to the core layer and the chip. The first circuit layer has a through hole. The protrusion of the chip is situated within the through hole, and the top surface of the protrusion is exposed to receive an external signal. The second circuit layer is disposed on the second surface and electrically connected to the core layer.Type: ApplicationFiled: February 22, 2013Publication date: August 28, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Wei-Ming Cheng
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Publication number: 20140174804Abstract: A method of packaging an electrical device including following steps is provided. A circuit board including a substrate and a first conductive pattern is provided. The electrical device having an electrode is disposed on the circuit board. A dielectric layer is formed on the circuit board to cover the electrical device, the electrode and the first conductive pattern, wherein a first caving pattern is formed in the dielectric layer by the first conductive pattern. The dielectric layer is patterned to form a through hole and a second caving pattern connecting with the through hole and exposing the electrode. A conductive material is filled in the through hole and the second caving pattern to form a conductive via in the through hole and a second conductive pattern in the second caving pattern. The substrate is removed. Moreover, the electrical device package structure is also provided.Type: ApplicationFiled: December 24, 2012Publication date: June 26, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen, Shih-Lian Cheng
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Publication number: 20140175050Abstract: A method fabricates a magnetic transducer having an ABS location. Etch stop and nonmagnetic etchable layers are provided. A side shield layer is provided between the ABS location and the etch stop and etchable layers. Part of the side shield and etchable layers are removed using a first removal process. This portion of the pole trench formed has a top wider than the bottom in the side shield layer. Part of the etchable layer is removed using a second removal process, thereby forming the pole trench. The pole trench has a bottom and a top wider than the bottom in the side shield layer and substantially perpendicular sidewalls in the etchable layer. A nonmagnetic side gap layer is provided. A remaining portion of the pole trench has a location and profile for a pole. At least part of the pole is in the pole trench.Type: ApplicationFiled: December 21, 2012Publication date: June 26, 2014Applicant: WESTERN DIGITAL (FREMONT), LLCInventors: JINQIU ZHANG, XIAOYU YANG, FENG LIU, MING JIANG, TSUNG YUAN CHEN
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Patent number: 8735742Abstract: A cabinet includes a chassis and an electromagnetic interference (EMI) shielding apparatus. The shielding apparatus includes a bracket installed to a first end of the chassis, a shaft rotatably installed in the bracket, and a shielding member reeled about the shaft. The shielding member includes a first end fixed to the shaft, and a second end opposite to the first end and forming a holder. A second end of the chassis forms a latch opposite to the bracket for engaging with the holder. The shielding member is made of EMI shielding material, and the shielding member is wound on or let out from the shaft as the shaft rotates.Type: GrantFiled: July 20, 2012Date of Patent: May 27, 2014Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Tsung-Yuan Chen
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Patent number: 8729397Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.Type: GrantFiled: December 13, 2011Date of Patent: May 20, 2014Assignee: Unimicron Technology Corp.Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
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Publication number: 20140053400Abstract: A package substrate includes a core layer, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core layer. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded pads are located on an upper surface of the insulating layer.Type: ApplicationFiled: November 6, 2013Publication date: February 27, 2014Applicant: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Shih-Lian Cheng
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Patent number: 8649123Abstract: A method for providing a perpendicular magnetic recording (PMR) head is disclosed. The method comprises: providing an insulating layer; covering the insulating layer with a hard mask material; forming a pre-defined shape in the hard mask material; forming a pole trench and a yoke area in the insulating layer by a first reactive ion etching (RIE) process in which the yoke area includes a loading prevention pattern; performing a wet etching process to remove the hard mask material from the pole trench and the yoke area; performing a second RIE process to remove the loading prevention pattern of the yoke area, wherein the pole trench and the remainder of the yoke area are not removed and remain having similar side wall angles; and providing a PMR pole in which at least a portion of the PMR pole resides in the pole trench.Type: GrantFiled: November 26, 2008Date of Patent: February 11, 2014Assignee: Western Digital (Fremont), LLCInventors: Jinqiu Zhang, Hai Sun, Hongping Yuan, Tsung Yuan Chen
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Publication number: 20140033526Abstract: A fabricating method of an embedded package structure includes following steps. First and second boards are combined to form an integrated panel. First and second circuit structures are respectively formed on the first and second boards that are then separated. An embedded element is electrically disposed on the first circuit structure. First and second conductive bumps are respectively formed on a conductive circuit substrate and the second circuit structure. First and second semi-cured films are provided; a laminating process is performed to laminate the first circuit structure on the first board, the first and second semi-cured films, the conductive circuit substrate, and the second circuit structure on the second board. The first and second semi-cured films encapsulate the embedded element. The first and second conductive bumps respectively pierce through the first and second semi-cured films and are electrically connected to the first circuit structure and the conductive circuit substrate, respectively.Type: ApplicationFiled: October 11, 2013Publication date: February 6, 2014Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Ming-Huang Ting
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Publication number: 20140034361Abstract: A circuit board including a circuit substrate, a dielectric layer, a first conductive layer and a second conductive layer is provided. The circuit substrate has a first surface and a first circuit layer. The dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The dielectric layer has a second surface, at least a blind via extended from the second surface to the first circuit layer and an intaglio pattern. The first conductive layer is disposed inside the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer through the first conductive layer.Type: ApplicationFiled: October 11, 2013Publication date: February 6, 2014Applicant: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen
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Publication number: 20140008118Abstract: A cabinet includes a chassis and an electromagnetic interference (EMI) shielding apparatus. The shielding apparatus includes a bracket installed to a first end of the chassis, a shaft rotatably installed in the bracket, and a shielding member reeled about the shaft. The shielding member includes a first end fixed to the shaft, and a second end opposite to the first end and forming a holder. A second end of the chassis forms a latch opposite to the bracket for engaging with the holder. The shielding member is made of EMI shielding material, and the shielding member is wound on or let out from the shaft as the shaft rotates.Type: ApplicationFiled: July 20, 2012Publication date: January 9, 2014Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: TSUNG-YUAN CHEN
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Patent number: 8604359Abstract: A package substrate includes a core board, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core board. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded bump pads are located on an upper surface of the insulating layer.Type: GrantFiled: September 23, 2011Date of Patent: December 10, 2013Assignee: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Shih-Lian Cheng