Patents by Inventor Tsung Yuan Chen
Tsung Yuan Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20120312584Abstract: A package substrate includes a core board, a first dielectric layer, a second circuit pattern, a first solder mask and an insulating layer. A first circuit pattern is disposed on a first surface of the core board. The first dielectric layer covers the first circuit pattern. The second circuit pattern is located on the first dielectric layer and the second circuit pattern includes an interconnection circuit pattern within a chip mounting area. The first solder mask covers a portion of the second circuit pattern outside the chip mounting area. The insulating layer covers the chip mounting area and the interconnection circuit pattern. A plurality of embedded bump pads are located on an upper surface of the insulating layer.Type: ApplicationFiled: September 23, 2011Publication date: December 13, 2012Inventors: Tsung-Yuan Chen, Shih-Lian Cheng
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Publication number: 20120312588Abstract: A circuit board includes a circuit substrate, a dielectric layer disposed on the circuit substrate and a patterned circuit structure. The dielectric layer covers a first surface and at least a first circuit of the circuit substrate. The dielectric layer has a second surface, at least a blind via, a second intaglio pattern and a third intaglio pattern connected to the blind via. The patterned circuit structure includes at least a second circuit disposed in the second intaglio pattern and third circuits disposed in the third intaglio pattern and the blind via. Each third circuit has a first conductive layer and a second conductive layer. The materials of the first conductive layer and the second circuit are the same. The line width of the second circuit is shorter than that of each third circuit. At least a third circuit is electrically connected to the first circuit of the circuit substrate.Type: ApplicationFiled: August 17, 2012Publication date: December 13, 2012Applicant: Unimicron Technology Corp.Inventors: TZYY-JANG TSENG, Shu-Sheng Chiang, Tsung-Yuan Chen
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Patent number: 8322679Abstract: A container data center includes a container, a number of shock absorbers installed in the container, and a support plate installed on the shock absorbers. Each shock absorber includes a support bracket and two damping elements positioned at opposite ends of the support bracket. Each damping element includes a first connecting end fixed to a corresponding end of the support bracket, and a second connecting end fixed to the container. The first connecting ends of the damping elements are movable relative to the corresponding second ends of the damping elements through overcoming resistance. The support plate is installed on the support bracket and can support a number of servers.Type: GrantFiled: July 28, 2011Date of Patent: December 4, 2012Assignee: Hon Hai Precision Industry Co., Ltd.Inventor: Tsung-Yuan Chen
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Patent number: 8310785Abstract: A perpendicular magnetic recording (PMR) head comprises a PMR pole having at least one side, a bottom, and a top wider than the bottom, a first portion of the at least one side being substantially vertical, a second portion of the at least one side being nonvertical, the top portion having a width not greater than one hundred fifty nanometers. The PRM head further comprises a nonmagnetic layer surrounding the bottom and the at least one side of the PMR pole, an intermediate layer substantially surrounding at least the second portion of the at least one side of the PMR pole, and a hard mask layer adjacent to the first portion of the at least one side of the PMR pole.Type: GrantFiled: February 13, 2012Date of Patent: November 13, 2012Assignee: Western Digital (Fremont), LLCInventors: Jinqiu Zhang, Liubo Hong, Yong Shen, Hongping Yuan, Tsung Yuan Chen, Honglin Zhu
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Patent number: 8294034Abstract: A circuit board including a circuit substrate, a first dielectric layer, an antagonistic activation layer, a first conductive layer, a second conductive layer and a second dielectric layer is provided. The circuit substrate has a first surface and a first circuit layer. The first dielectric layer is disposed on the circuit substrate and covers the first surface and the first circuit layer. The first dielectric layer has a second surface, at least a blind via extending from the second surface to the first circuit layer and an intaglio pattern. The antagonistic activation layer is disposed on the second surface of the dielectric layer. The first conductive layer is disposed in the blind via. The second conductive layer is disposed in the intaglio pattern and the blind via and covers the first conductive layer. The second conductive layer is electrically connected with the first circuit layer via the first conductive layer.Type: GrantFiled: May 28, 2010Date of Patent: October 23, 2012Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Shu-Sheng Chiang, Tsung-Yuan Chen
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Patent number: 8288663Abstract: An electrical interconnecting structure suitable for a circuit board is provided. The electrical interconnecting structure includes a core, an ultra fine pattern, and a patterned conductive layer. The core has a surface, and the ultra fine pattern is inlaid in the surface of the core. The patterned conductive layer is disposed on the surface of the core and is partially connected to the ultra fine pattern. Since the ultra fine pattern of the electrical interconnecting structure is inlaid in the surface of the core and is partially connected to the patterned conductive layer located on the surface of the core.Type: GrantFiled: December 29, 2008Date of Patent: October 16, 2012Assignee: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang, David C. H. Cheng
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Patent number: 8277669Abstract: A method and system for providing a pole of magnetic transducer having an air-bearing surface (ABS) are described. Leading shield and planarization stop layers are provided. Portions of the planarization stop and shield layers distal from the ABS location are removed, providing a depression forming a bevel. The bevel has an angle greater than zero and less than ninety degrees. An intermediate layer having a top surface substantially perpendicular to the ABS location is provided. Part of the intermediate layer is removed, forming a trench having a bottom corresponding to the leading shield and a location and profile corresponding to the pole. A nonmagnetic layer is provided at least partially in the trench. The pole with a leading edge bevel corresponding to the bevel is provided in the trench. A capping layer covering the pole is provided, at least part of the intermediate layer removed, and a wrap-around shield provided.Type: GrantFiled: December 21, 2009Date of Patent: October 2, 2012Assignee: Western Digital (Fremont), LLCInventors: Tsung Yuan Chen, Yimin Guo, Jinqiu Zhang, Ut Tran
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Publication number: 20120243157Abstract: A container data center includes a container and a number of server systems. A number of dividing plates is set in the container to divide the container into a number of shielding spaces each receiving one of a number of server systems. The dividing plates each include an electromagnetic shield layer made of electromagnetic shield material to prevent electromagnetic interference between the server systems.Type: ApplicationFiled: April 14, 2011Publication date: September 27, 2012Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: TSUNG-YUAN CHEN
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Patent number: 8273651Abstract: A method for fabricating a wiring structure of a wiring board is provided. First, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, an intaglio pattern exposing the insulation layer is formed on an outer surface of the film. The intaglio pattern is formed by removing a portion of the insulation layer and a portion of the film. Next, an activated layer is formed on the outer surface and in the intaglio pattern. The activated layer completely covers the outer surface and all surfaces of the intaglio pattern. Then, the film and the activated layer on the outer surface are removed, and the activated layer in the intaglio pattern is remained. After the film and the activated layer on the outer surface are removed, a conductive material is formed in the intaglio pattern by chemical deposition method.Type: GrantFiled: June 14, 2010Date of Patent: September 25, 2012Assignee: Unimicron Technology Corp.Inventors: Shu-Sheng Chiang, Tsung-Yuan Chen, Wei-Ming Cheng
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Patent number: 8273256Abstract: A method for manufacturing a wiring structure of a wiring board is provided. In the method, a substrate including an insulation layer and a film disposed on the insulation layer is provided. Next, a barrier layer completely covering the film is formed. Next, an intaglio pattern partially exposing the insulation layer is formed on an outer surface of the barrier layer. Next, an activated layer is formed on the outer surface and in the intaglio pattern. Then, the activated layer on the outer surface is removed, and the activated layer in the intaglio pattern is remained. After the activated layer on the outer surface is removed, a conductive material is formed in the intaglio pattern by using a chemical deposition method. After forming the conductive material, the barrier layer and the film are removed.Type: GrantFiled: June 3, 2010Date of Patent: September 25, 2012Assignee: Unimicron Technology Corp.Inventors: Shu-Sheng Chiang, Tsung-Yuan Chen, Wei-Ming Cheng
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Publication number: 20120194046Abstract: A container data center includes a container, a number of shock absorbers installed in the container, and a support plate installed on the shock absorbers. Each shock absorber includes a support bracket and two damping elements positioned at opposite ends of the support bracket. Each damping element includes a first connecting end fixed to a corresponding end of the support bracket, and a second connecting end fixed to the container. The first connecting ends of the damping elements are movable relative to the corresponding second ends of the damping elements through overcoming resistance. The support plate is installed on the support bracket and can support a number of servers.Type: ApplicationFiled: July 28, 2011Publication date: August 2, 2012Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: TSUNG-YUAN CHEN
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Publication number: 20120174391Abstract: A process for fabricating a wiring board is provided. In the process, a wiring carrying substrate including a carry substrate and a wiring layer is formed. Next, at least one blind via is formed in the wiring carrying substrate. Next, the wiring carrying substrate is laminated to another wiring carrying substrate via an insulation layer. The insulation layer is disposed between the wiring layers of the wiring carrying substrates and full fills the blind via. Next, parts of the carry substrates are removed to expose the insulation layer in the blind via. Next, a conductive pillar connected between the wiring layers is formed. Next, the rest carry substrates are removed.Type: ApplicationFiled: March 19, 2012Publication date: July 12, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Chun-Chien Chen, Cheng-Po Yu
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Publication number: 20120168316Abstract: A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.Type: ApplicationFiled: March 15, 2012Publication date: July 5, 2012Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang
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Publication number: 20120160551Abstract: An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.Type: ApplicationFiled: March 7, 2012Publication date: June 28, 2012Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
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Patent number: 8191248Abstract: An embedded structure of circuit board is provided. The embedded structure of the present invention includes a dielectric layer, a pad opening disposed in the dielectric layer, and a via disposed in the pad opening and in the dielectric layer, wherein the outer surface of the dielectric layer has a substantially even surface.Type: GrantFiled: September 17, 2008Date of Patent: June 5, 2012Assignee: Unimicron Technology Corp.Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
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Patent number: 8164004Abstract: A fabricating process for an embedded circuit structure is provided. A through hole is formed in a core panel and penetrates the core panel. Two indent patterns are respectively formed on two opposite surfaces of the core panel. A conductive material is electroplated into the through hole and the indent patterns, so as to form a conductive channel in the through hole and two circuit patterns in the indent patterns respectively. Portions of the circuit patterns, which exceed the indent patterns respectively, are removed for planarizing the circuit patterns to be level with the two surfaces of the core panel respectively.Type: GrantFiled: December 18, 2007Date of Patent: April 24, 2012Assignee: Unimicron Technology Corp.Inventors: Tsung-Yuan Chen, Shu-Sheng Chiang
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Publication number: 20120085569Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.Type: ApplicationFiled: December 13, 2011Publication date: April 12, 2012Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
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Patent number: 8136225Abstract: A method and system for providing a PMR pole in a magnetic recording transducer including an intermediate layer are disclosed. The method and system include providing a mask including a line on the intermediate layer. The method further include providing a hard mask layer on the mask and removing the line. Thus, an aperture in the hard mask corresponding to the line is provided. The method and system also include forming a trench in the intermediate layer under the aperture. The trench has a bottom and a top wider than the bottom. The method further includes providing a PMR pole, at least a portion of which resides in the trench.Type: GrantFiled: May 15, 2008Date of Patent: March 20, 2012Assignee: Western Digital (Fremont), LLCInventors: Jinqiu Zhang, Liubo Hong, Yong Shen, Hongping Yuan, Tsung Yuan Chen, Honglin Zhu
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Patent number: 8132321Abstract: An embedded structure of circuit board is provided. The embedded structure includes a substrate, a first patterned conductive layer disposed on the substrate and selectively exposing the substrate, a first dielectric layer covering the first patterned conductive layer and the substrate, a pad opening disposed in the first dielectric layer, and a via disposed in the pad opening and exposing the first patterned conductive layer, wherein the outer surface of the first dielectric layer has a substantially even surface.Type: GrantFiled: August 13, 2008Date of Patent: March 13, 2012Assignee: Unimicron Technology Corp.Inventors: Yi-Chun Liu, Wei-Ming Cheng, Tsung-Yuan Chen, Shu-Sheng Chiang
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Patent number: 8111479Abstract: A magnetic write head for perpendicular magnetic data recording having a trailing shield with a two step throat height. The trailing shield is formed over a non-magnetic bump that forms a notch in the leading edge of the trailing shield. This notch defines a first, smaller throat height closest to the write pole and a larger throat height away from the write pole. The smaller throat height near the write pole prevents excess magnetic flux from leaking to the write pole, thereby ensuring efficient strong write field. The larger trailing shield throat height away from the write pole prevents magnetic saturation of the trailing shield and also greatly facilitates manufacturing avoiding problems related to variations and deviations in manufacturing processes used to define the trailing shield.Type: GrantFiled: October 23, 2007Date of Patent: February 7, 2012Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Tsung Yuan Chen, Wen-Chien David Hsiao, Yimin Hsu, Vladimir Nikitin, Changqing Shi