Patents by Inventor Tung Chang

Tung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Adjusting Sizes of Connectors of Package Components
    Publication number: 20150347663
    Abstract: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
    Type: Application
    Filed: August 13, 2015
    Publication date: December 3, 2015
    Inventors: Chih-Wei Lai, Ming-Che Ho, Tzong-Hann Yang, Chien Rhone Wang, Chia-Tung Chang, Hung-Jui Kuo, Chung-Shi Liu
  • TILTED IMPLANT FOR POLY RESISTORS
    Publication number: 20150333188
    Abstract: A semiconductor device having a substrate, a dielectric layer, a polycrystalline silicon (“poly”) resistor, a drain, and a source is disclosed. After implantation, the poly resistor may have a lateral doping profile with two peaks, one near each edge of the poly resistor, and a trough near the middle of the poly resistor. Such a doping profile can allow the poly resistor to have a resistance that is insensitive to small variations in critical dimension of the poly resistor. The resistance of the poly resistor may be determined by the doping dose of the tilted implant used to form the poly resistor. The tilted implant may be used to form the drain and the source of a transistor substantially simultaneously as forming the poly resistor.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 19, 2015
    Applicant: Spansion LLC
    Inventors: Shenqing FANG, Timothy Thurgate, Kuo Tung Chang
  • Flash memory cell with flair gate
    Patent number: 9190531
    Abstract: An embodiment of the present invention is directed to a method of forming a memory cell. The method includes etching a trench in a substrate and filling the trench with an oxide to form a shallow trench isolation (STI) region. A portion of an active region of the substrate that comes in contact with the STI region forms a bitline-STI edge. The method further includes forming a gate structure over the active region of the substrate and over the STI region. The gate structure has a first width substantially over the center of the active region of the substrate and a second width substantially over the bitline-STI edge, and the second width is greater than the first width.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 17, 2015
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Meng Ding, YouSeok Suh, Shenqing Fang, Kuo-Tung Chang
  • CURVED TOUCH DISPLAY DEVICE AND METHOD FOR FORMING THE SAME
    Publication number: 20150324045
    Abstract: An embodiment of the invention provides a curved touch display device including: a display panel having a display area and a non-display area; a touch panel disposed on the display panel, wherein the touch panel has a touch area and a peripheral area, and a light shielding layer is disposed in the peripheral area to shield the non-display area; a curved light-transmissive cover plate disposed on the touch panel and having a curved surface; and an optically clear adhesive layer disposed between the light shielding layer of the touch panel and the curved light-transmissive cover plate.
    Type: Application
    Filed: April 24, 2015
    Publication date: November 12, 2015
    Inventors: Meng-Hui CHI, Tung-Chang TSAI, Hung-Sheng CHO
  • Adjacent wordline disturb reduction using boron/indium implant
    Patent number: 9153596
    Abstract: Semiconductor devices having reduced parasitic current and methods of malting the semiconductor devices are provided. Further provided are memory devices having reduced adjacent wordline disturb. The memory devices contain wordlines formed over a semiconductor substrate, wherein at least one wordline space is formed between the wordlines. Adjacent wordline disturb is reduced by implanting one or more of indium, boron, and a combination of boron and indium in the surface of the at least one wordline space.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: October 6, 2015
    Assignee: Cypress Semiconductor Corporation
    Inventors: Gulzar A. Kathawala, Zhizheng Liu, Kuo Tung Chang, Lei Xue
  • FEEDTHROUGH SIGNAL TRANSMISSION CIRCUIT AND METHOD UTILIZING PERMANENTLY ON BUFFER AND SWITCHABLE NORMAL BUFFER
    Publication number: 20150279522
    Abstract: A feedthrough signal transmission circuit includes a first permanently on cell and a cell controlling unit. The first permanently on cell is arranged to transmit a first control signal. The cell controlling unit is coupled to the first permanently on cell, and includes a power switch and a plurality o buffers. The power switch is coupled to the first permanently on cell, arranged to receive a switch control signal and the first control signal, and selectively output the first control signal according to the switch control signal. The plurality of buffers is coupled to the power switch. Each of the buffers is arranged to buffer a data input only when powered by the first control signal output from the power switch.
    Type: Application
    Filed: March 26, 2014
    Publication date: October 1, 2015
    Applicant: MEDIATEK INC.
    Inventors: Chien-Pang Lu, Yu-Tung Chang
  • OUTPUT POWER PROTECTION APPARATUS AND METHOD OF OPERATING THE SAME
    Publication number: 20150244167
    Abstract: An output power protection apparatus includes a DC conversion unit, an output protection unit, a high-voltage battery, a low-voltage battery, and a control unit. The DC conversion unit converts an input DC power into an output DC power. The output protection unit is connected in series to the DC conversion unit, and the output protection unit has a plurality of protection circuits connected in parallel to each other. When a short-circuit condition occurs between the high-voltage battery and the low-voltage battery or the low-voltage battery is reversely connected in polarity, the control unit generates a control signal to control the protection circuits to disconnect the connection between the low-voltage battery and a low-voltage device, and the DC conversion unit.
    Type: Application
    Filed: July 31, 2014
    Publication date: August 27, 2015
    Inventors: Wen-Sheng TSAO, Chin-Hou CHEN, Jui-Teng CHAN, Chen-Tung CHANG, Chen-Bin HUANG, Wei-Cheng PENG
  • Adjusting sizes of connectors of package components
    Patent number: 9111064
    Abstract: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
    Type: Grant
    Filed: June 27, 2014
    Date of Patent: August 18, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Lai, Ming-Che Ho, Tzong-Hann Yang, Chien Rhone Wang, Chia-Tung Chang, Hung-Jui Kuo, Chung-Shi Liu
  • Electrical connector with printed circuit board
    Patent number: 9112301
    Abstract: An electrical connector for a cable includes a PCB and a fixed element for holding the PCB. The PCB includes several first contacting fingers and second contacting fingers electrically connected to each other at different sides along a first direction. The first and second contacting fingers are respectively arranged along a second direction perpendicular to the first direction to be disposed in two rows. The second contacting fingers are connected to the cable. Wherein said PCB is longer than said fixed element so as to expose first contacting fingers at a front side of the fixed element along the first direction and form a mating port for a mating connector.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: August 18, 2015
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: Shih-Tung Chang
  • NAT TRAVERSAL METHOD, COMPUTER-READABLE MEDIUM, AND SYSTEM FOR MEDIATING CONNECTION
    Publication number: 20150156167
    Abstract: Disclosed herein is a network address translation (NAT) traversal method. A node sends a first, second, and third detection message from a local port to a first, second, and third response server, respectively, in order to receive from the response servers a first, second, and third response message, which respectively include a first, second, and third proximal external port number (EPN). The node then deduces a rule for proximal EPNs based on the received ones. Also disclosed is a system for mediating connection. The system assists a first node on a network in NAT traversal and includes at least three response servers, which receive detection messages from the first node and send back response messages that include EPNs.
    Type: Application
    Filed: October 8, 2014
    Publication date: June 4, 2015
    Inventors: Chia-Ming KUO, Wei-Tung CHANG
  • MEDIA STREAM PROVIDING DEVICE AND METHOD FOR CONNECTING THERETO, MEDIA STREAMING SYSTEM, AND COMPUTER-READABLE MEDIUM
    Publication number: 20150117264
    Abstract: Disclosed herein, among others, is a media streaming system, comprising a registrar server, a media stream providing device, and a media stream receiving device. The registrar server is configured to register a piece of connection information associated with the media stream providing device, the connection information comprising a local network location, a public network location, a broker location, and a proxy location. The media stream receiving device is configured to obtain the connection information from the registrar server, and to commence measuring simultaneously, based on the aforementioned locations, first, second, third, and fourth costs for connecting to the media stream providing device via a local path, a remote path, a peer-to-peer path, and a proxy-assisted path, respectively. The media stream receiving device then selects one of those paths based on the measured costs.
    Type: Application
    Filed: August 27, 2014
    Publication date: April 30, 2015
    Inventors: Chia-Ming KUO, Wei-Tung CHANG
  • Three-Dimensional Charge Trapping NAND Cell with Discrete Charge Trapping Film
    Publication number: 20150108562
    Abstract: A three-dimensional charge trap semiconductor device is constructed with alternating insulating and gate layers stacked over a substrate. During the manufacturing process, a channel hole is formed in the stack and the gate layers are recessed from the channel hole. Using the recessed topography of the gate layers, a charge trap layer can be deposited on the sidewalls of the channel hole and etched, leaving individual discrete charge trap layer sections in each recess. Filling the channel hole with channel material effectively provides a three-dimensional semiconductor device having individual charge trap layer sections for each memory cell.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: Spansion LLC
    Inventors: Chun CHEN, Kuo-Tung CHANG, Shenqing FANG
  • Integrated Circuits with Non-Volatile Memory and Methods for Manufacture
    Publication number: 20150031197
    Abstract: Semiconductor devices and the manufacture of such semiconductor devices are described. According to various aspects of the disclosure, a semiconductor device can include a memory region, a first logic region, and a second logic region. A select gate can be formed in the memory region of the device and a first logic gate formed in the logic region. A charge trapping dielectric can then be disposed and removed from a second logic region. A gate conductor layer can then be disposed on the device and etched to define a memory gate on the sidewall of the select gate and a second logic gate in the second logic region.
    Type: Application
    Filed: September 12, 2014
    Publication date: January 29, 2015
    Inventors: Kuo Tung Chang, Chun Chen, Shenqing Fang
  • DESTRUCTIVE AND VISUAL MEASUREMENT AUTOMATION SYSTEM FOR WEB THICKNESS OF MICRODRILLS AND METHOD THEREOF
    Publication number: 20150017879
    Abstract: An improved destructive and visual measurement automation system and a method for measuring a web thickness of a microdrill are provided. When a dual-axis motion platform module moves the microdrill to a first position, a reflection module reflects a first image in a first direction toward a second direction. A vision module receives the reflected first image in the second direction and outputs the received first image to a computer. According to the first image, the computer performs a positioning procedure and a grinding procedure to drive a drill grinding module to grind the microdrill to a sectional position to be measured of the microdrill. When the microdrill is moved to a second position, the vision module outputs a second image to the computer. According to the second image, the computer performs an image computing procedure to obtain the web thickness at the sectional position to be measured.
    Type: Application
    Filed: April 16, 2014
    Publication date: January 15, 2015
    Applicant: National Taiwan Ocean University
    Inventors: Wen-Tung CHANG, Yu-Yun LU
  • METHOD OF FORMING CONDUCTIVE LINE, AND DEVICE COMPRISING THE SAME
    Publication number: 20140345910
    Abstract: The present invention relates to a method for forming a conductive line, and a device comprising the conductive line. The method for forming a conductive line comprises: (A) providing a metal oxide composition which comprises a metal oxide, and a reducing agent; (B) applying the metal oxide composition on a substrate, and curing the metal oxide composition to form an metal oxide layer; and (C) irradiating the metal oxide layer by a light source to occur a chemical reduction reaction between the metal oxide and the reducing agent in the metal oxide layer to proceed to thereby form a conductive line.
    Type: Application
    Filed: May 1, 2014
    Publication date: November 27, 2014
    Applicant: InnoLux Corporation
    Inventors: Ya-Leng WANG, Hung-Sheng CHO, Tung-Chang TSAI
  • SYSTEM AND METHOD FOR MANUFACTURING SELF-ALIGNED STI WITH SINGLE POLY
    Publication number: 20140312409
    Abstract: A method for fabricating a memory device with a self-aligned trap layer and rounded active region corners is disclosed. In the present invention, an STI process is performed before any of the charge-trapping and top-level layers are formed. Immediately after the STI process, the sharp corners of the active regions are exposed. Because these sharp corners are exposed at this time, they are available to be rounded through any number of known rounding techniques. Rounding the corners improves the performance characteristics of the memory device. Subsequent to the rounding process, the charge-trapping structure and other layers can be formed by a self-aligned process.
    Type: Application
    Filed: January 29, 2014
    Publication date: October 23, 2014
    Applicant: SPANSION LLC
    Inventors: Tim Thurgate, Shenqing Fang, Kuo-Tung Chang, YouSeok Suh, Meng Ding, Hidehiko Shiraiwa, Amol Joshi, Hapreet Sachar, David Matsumoto, Lovejeet Singh, Chih-Yuh Yang
  • Adjusting Sizes of Connectors of Package Components
    Publication number: 20140308764
    Abstract: A device includes a plurality of connectors on a top surface of a package component. The plurality of connectors includes a first connector having a first lateral dimension, and a second connector having a second lateral dimension. The second lateral dimension is greater than the first lateral dimension. The first and the second lateral dimensions are measured in directions parallel to a major surface of the package component.
    Type: Application
    Filed: June 27, 2014
    Publication date: October 16, 2014
    Inventors: Chih-Wei Lai, Ming-Che Ho, Tzong-Hann Yang, Chien Rhone Wang, Chia-Tung Chang, Hung-Jui Kuo, Chung-Shi Liu
  • Refill holder for candle dispenser
    Patent number: D723676
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: March 3, 2015
    Assignee: S.C. Johnson & Son, Inc.
    Inventors: Brian T. Davis, Shih-Tung Chang, Jacob S. Childs, Michel D. Arney
  • Refill holder for candle dispenser
    Patent number: D729371
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: May 12, 2015
    Assignee: S.C. Johnson & Son, Inc.
    Inventors: Brian T. Davis, Shih-Tung Chang, Jacob S. Childs, Michel D. Arney
  • Holder for dispenser element and candle platform for holding a candle
    Patent number: D742040
    Type: Grant
    Filed: May 29, 2014
    Date of Patent: October 27, 2015
    Assignee: S.C. Johnson & Son, Inc.
    Inventors: Brian T. Davis, Shih-Tung Chang, Jacob S. Childs, Michel D. Arney