Patents by Inventor Tung Chen

Tung Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10336774
    Abstract: The present invention relates to compounds of formula I: in which p, q, Y1, Y2, R1, R2a, R2b, R3a, R3b, R4a, R4b, R5a, R5b, R7 and R8 are defined in the Summary of the Invention; capable of inhibiting the activity of SHP2. The invention further provides a process for the preparation of compounds of the invention, pharmaceutical preparations comprising such compounds and methods of using such compounds and compositions in the management of diseases or disorders associated with the aberrant activity of SHP2.
    Type: Grant
    Filed: February 20, 2018
    Date of Patent: July 2, 2019
    Assignee: Novartis AG
    Inventors: Christine Hiu-Tung Chen, Zhuoliang Chen, Michael Dore, Jorge Garcia Fortanet, John William Giraldes, Rajesh Karki, Mitsunori Kato, Matthew J. LaMarche, Lawrence Blas Perez, Martin Sendzik, Troy Douglas Smith, Bakary-Barry Toure, Sarah Williams
  • Publication number: 20190161841
    Abstract: A copper alloy wire and a manufacturing method thereof are provided. The copper alloy wire includes: by weight percentage of components, 0.3 to 0.45 of silver (Ag), 0.01 to 0.02 of titanium, and a remaining part that is formed by copper and unavoidable impurities. The method for manufacturing the copper alloy wire is performing two-phase vacuum melting: first performing vacuum electric arc melting into a copper-titanium mother alloy, and then performing vacuum induction melting with remaining components into a copper alloy wire material by means of continuous casting; then drawing the copper alloy wire material into a copper alloy fine wire by a non-slip wire drawing device in a material even-flow wire drawing manner, and finally performing thermal treatment on the copper alloy fine wire by using argon as a protection gas, so as to complete a process of the copper alloy wire.
    Type: Application
    Filed: January 30, 2019
    Publication date: May 30, 2019
    Inventors: Tung-Chen CHENG, Chen-Hsueh CHIANG, Chia-Hao HSU
  • Publication number: 20190158293
    Abstract: A key storage device comprises a one-way receiving interface, a key calculation unit, and a one-way outputting interface. The key calculation unit includes a signature unit. The one-way receiving interface receives a transaction message of an external electronic device in a single direction. The signature unit encrypts the transaction message by a private key to generate a signature message. And, the one-way outputting interface transmits the signature message to the external electronic device in a single direction.
    Type: Application
    Filed: December 14, 2017
    Publication date: May 23, 2019
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yao-Hsin CHEN, Jui-Ting WU, Hsuan-Tung CHEN
  • Publication number: 20190151394
    Abstract: A topical composition comprising an effective amount of a prebiotic capable of nourishing and encouraging skin microorganisms such as S. epidermidis to colonize the skin and supplant acne-causing bacteria such as P. acnes. Additional components can be used by S. epidermidis to create short chain fatty acids that inhibit growth of P. acnes. The preferred prebiotics are Camellia Sinensis Leaf Extract, Glycyrrhiza Glabra (Licorice) Root Extract, and Chamomilla Recutita (Matricaria) Flower Extract. PEG-12 is used by S. epidermidis to create short chain fatty acids that inhibit P. acnes. The composition is highly effective in a method of treating acne.
    Type: Application
    Filed: November 17, 2017
    Publication date: May 23, 2019
    Inventor: Ying Tung Chen
  • Patent number: 10269863
    Abstract: Methods for forming via last through-vias. A method includes providing an active device wafer having a front side including conductive interconnect material disposed in dielectric layers and having an opposing back side; providing a carrier wafer having through vias filled with an oxide extending from a first surface of the carrier wafer to a second surface of the carrier wafer; bonding the front side of the active device wafer to the second surface of the carrier wafer; etching the oxide in the through vias in the carrier wafer to form through oxide vias; and depositing conductor material into the through oxide vias to form conductors that extend to the active carrier wafer and make electrical contact to the conductive interconnect material. An apparatus includes a carrier wafer with through oxide vias extending through the carrier wafer to an active device wafer bonded to the carrier wafer.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Szu-Ying Chen, Pao-Tung Chen, Dun-Nian Yaung, Jen-Cheng Liu
  • Publication number: 20190109121
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Application
    Filed: December 11, 2018
    Publication date: April 11, 2019
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Publication number: 20190096747
    Abstract: A method includes depositing a mask layer over a dielectric layer, patterning the mask layer to form a trench, applying a patterned photo resist having a portion over the mask layer, and etching the dielectric layer using the patterned photo resist as an etching mask to form a via opening, which is in a top portion of the dielectric layer. The method further includes removing the patterned photo resist, and etching the dielectric layer to form a trench and a via opening underlying and connected to the trench. The dielectric layer is etched using the mask layer as an additional etching mask. A polymer formed in at least one of the trench and the via opening is removed using nitrogen and argon as a process gas. The trench and the via opening are filled to form a metal line and a via, respectively.
    Type: Application
    Filed: November 29, 2018
    Publication date: March 28, 2019
    Inventors: Hung-Hao Chen, Che-Cheng Chang, Wen-Tung Chen, Yu-Cheng Liu, Horng-Huei Tseng
  • Patent number: 10206448
    Abstract: A wearable step-counting shoe includes a shoe body and a pedometer. The shoe body includes a shoe sole having opposite inner and outer sides, and a groove surface defining amounting groove. The pedometer is removably disposed in the mounting groove and includes a pedometer body having opposite first and second faces and configured to detect and record the number of steps taken by a user, and a screen disposed on the second face and configured to display the detected number of steps. An engaging unit is provided to fix the pedometer on the shoe body, and includes a first engaging portion provided on the groove surface, and a second engaging portion provided on the pedometer and releasably engageable with the first engaging portion.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: February 19, 2019
    Assignee: HOMEWAY TECHNOLOGY CO., LTD.
    Inventors: Chin-Hsing Hsieh, Tsung-Hsien Hsieh, Ming-Chia Hsieh, Tung-Chen Hsieh
  • Publication number: 20190026904
    Abstract: The present disclosure provides a tracking system and method thereof. The tracking system comprises a trackable device with an appearance including a feature pattern and a tracking device. The tracking device comprises an optical sensor module configured to capture a first image which covers the trackable device. The tracking device further comprises a processor coupled to the optical sensor module. The processor is configured to retrieve a region of interest (ROI) of the first image based on the feature pattern, and locate a position of each of a plurality of feature blocks in the ROI, where each feature block contains a portion of the feature pattern. The processor further calculates a pose data of the trackable object according to the positions of the feature blocks.
    Type: Application
    Filed: July 24, 2018
    Publication date: January 24, 2019
    Inventors: Yuan-Tung CHEN, Tzu-Chieh YU
  • Publication number: 20190013345
    Abstract: A device includes an image sensor chip having formed therein an elevated photodiode, and a device chip underlying and bonded to the image sensor chip. The device chip has a read out circuit electrically connected to the elevated photodiode.
    Type: Application
    Filed: August 27, 2018
    Publication date: January 10, 2019
    Inventors: Meng-Hsun Wan, Yi-Shin Chu, Szu-Ying Chen, Pao-Tung Chen, Jen-Cheng Liu, Dun-Nian Yaung
  • Publication number: 20180362496
    Abstract: The present invention relates to compounds of formula I: in which m, Y1, Y2, Y3, R1, R2a, R2b, R3a, R3b, R4a, R4b, R5a and R5b are defined in the Summary of the Invention; capable of inhibiting the activity of SHP2. The invention further provides a process for the preparation of compounds of the invention, pharmaceutical preparations comprising such compounds and methods of using such compounds and compositions in the management of diseases or disorders associated with the aberrant activity of SHP2.
    Type: Application
    Filed: August 30, 2018
    Publication date: December 20, 2018
    Applicant: NOVARTIS AG
    Inventors: Christine Hiu-Tung Chen, Zhuoliang Chen, Jorge Garcia Fortanet, Denise Grunenfelder, Rajesh Karki, Mitsunori Kato, Matthew J. LaMarche, Lawrence Blas Perez, Travis Matthew Stams, Sarah Williams
  • Patent number: 10157895
    Abstract: A three-dimensional (3D) integrated circuit (IC) die is provided. In some embodiments, a first IC die comprises a first semiconductor substrate, a first interconnect structure over the first semiconductor substrate, and a first hybrid bond (HB) structure over the first interconnect structure. The first HB structure comprises a HB link layer and a HB contact layer extending from the HB link layer to the first interconnect structure. A second IC die is over the first IC die, and comprises a second semiconductor substrate, a second HB structure, and a second interconnect structure between the second semiconductor substrate and the second HB structure. The second HB structure contacts the first HB structure. A seal-ring structure is in the first and second IC dies. Further, the seal-ring structure extends from the first semiconductor substrate to the second semiconductor substrate, and is defined in part by the HB contact layer.
    Type: Grant
    Filed: April 17, 2018
    Date of Patent: December 18, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shin Chu, Kuan-Chieh Huang, Pao-Tung Chen, Shuang-Ji Tsai, Yi-Hao Chen, Feng-Kuei Chang
  • Patent number: 10134794
    Abstract: An image sensor chip having a sidewall interconnect structure to bond and/or electrically couple the image sensor chip to a package substrate is provided. The image sensor chip includes a substrate supporting an integrated circuit (IC) configured to sense incident light. The sidewall interconnect structure is arranged along a sidewall of the substrate and electrically coupled with the IC. A method for manufacturing the image sensor chip and an image sensor package including the image sensor chip are also provided.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: November 20, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuo-Chin Huang, Pao-Tung Chen, Wei-Chieh Chiang, Kazuaki Hashimoto, Jen-Cheng Liu
  • Publication number: 20180332240
    Abstract: A tracking system is provided. The tracking system comprises a trackable device which comprises a first illuminating module and the first illuminating module emits an infrared (IR) light and a tracking device which comprises an optical sensing module and a processor. The optical module is configured to sense an IR spectrum to capture a first image and sense a visible spectrum to capture a second image, and the IR light is in the IR spectrum. The processor is coupled to the optical sensing module. The processor is configured to search in the first image a first region corresponding to the IR light, locate in the second image a second region associated with the first region in the first image, and calculate a spatial status of the trackable device according to the second region in the second image.
    Type: Application
    Filed: May 14, 2018
    Publication date: November 15, 2018
    Inventors: Yuan-Tung CHEN, Hsu-Hong FENG, Tzu-Yin CHANG, Wei-Ta WANG, Tzu-Chieh YU
  • Patent number: 10129533
    Abstract: A three dimensional (3D) stereoscopic image rendering system uses a lenticular lens sheet with a light diffusing multi-layer, which may include an adhesive layer, formed on the external surface of its lower base. The microstructural constitution of the light diffusing multi-layer suppresses moiré patterns typically affecting the 3D images. When longitudinally directed stray light rays are internally reflected from the interior surfaces of each lenticular lens in the sheet and impinge on the light diffusing multi-layer contacting the lower base, the stray light rays are scattered diffusely into various directions, thereby significantly reducing the intensity of the moiré pattern and its effect on the image. In addition, certain related problems, such as crosstalk between left and right directed images are also reduced. As a result, the viewer perceives a high quality, moiré free, stereoscopic 3D image.
    Type: Grant
    Filed: September 9, 2015
    Date of Patent: November 13, 2018
    Assignee: Tint Mouse, Inc.
    Inventor: Ying-Tung Chen
  • Publication number: 20180315211
    Abstract: A tracking system and a method thereof are provided in this disclosure. The tracking method includes steps of: capturing first images of the physical environment by a first electronic device; extracting a plurality of first feature points from the first images; generating a plurality of map points according to the extracted first feature points; building a map of the physical environment according to the map points by the first electronic device; capturing a second image of the physical environment by a second electronic device; extracting second feature points of the second image and transmitting the second feature points to the first electronic device; and estimating a pose of the second electronic device according to the map and the received second feature points by the first electronic device.
    Type: Application
    Filed: April 30, 2018
    Publication date: November 1, 2018
    Inventors: Yuan-Tung CHEN, Shing-Chiao YEH, Po-I WU, Heng DING, Kun-Chun TSAI
  • Publication number: 20180307331
    Abstract: An operating method of a tracking system includes the following operations: obtaining a first relative movement vector of a client device by first movement detector; obtaining scale information related to distance; calculating a first actual movement vector of the client device according to the first relative movement vector and the scale information; and fusing, by a processor of a host device, the first relative movement vector, the scale information and the first actual movement vector to generate a 3D position of the client device.
    Type: Application
    Filed: April 17, 2018
    Publication date: October 25, 2018
    Inventors: Hsin-Yu LU, Li-Kang WENG, Kuang-Yu PAN, Yuan-Tung CHEN
  • Publication number: 20180300532
    Abstract: A tracking system includes a trackable device and a tracking device. The trackable device has a three-dimensional shape. The trackable device includes a first orientation sensor for sensing a first orientation of the trackable device. The tracking device is communicated with the trackable device. The tracking device includes a second orientation sensor, an image sensor and a processing circuit. The second orientation sensor is configured to sense a second orientation of the trackable device. The image sensor configured to capture an image. The processing circuit is coupled with the second orientation sensor and the image sensor. The processing circuit is operable to calculate a two-dimensional silhouette corresponding to the three-dimensional shape according to the first orientation and the second orientation, and utilize the two-dimensional silhouette to search the image captured by the image sensor for allocating coordinates of the trackable device within the image.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Inventors: Yuan-Tung CHEN, Chieh-Yu TSENG
  • Publication number: 20180301526
    Abstract: A method includes forming a capacitor, which includes depositing a bottom electrode layer, depositing a capacitor insulator layer over the bottom electrode layer, depositing a top electrode layer over the capacitor insulator layer, and depositing a dielectric layer over the top electrode layer. The dielectric layer is etched using a process gas until the top electrode layer is exposed. In the etching of the dielectric layer, the dielectric layer has a first etching rate, and the top electrode layer has a second etching rate, and a ratio of the first etching rate to the second etching rate is higher than about 5.0.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 18, 2018
    Inventors: Hung-Hao Chen, Che-Cheng Chang, Wen-Tung Chen, Yu-Cheng Liu, Horng-Huei Tseng
  • Patent number: D837223
    Type: Grant
    Filed: October 19, 2017
    Date of Patent: January 1, 2019
    Assignee: Dell Products L.P.
    Inventors: Tung Chen Wu, Toshiyuki Tanaka, Chun Long Goh, Khang Chian Yong