Patents by Inventor Tung

Tung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250173286
    Abstract: A cross-die interconnection monitor method includes providing a first die and a second die, embedding an intra-die detector into the first die for detecting a first feature of the first die, allocating a first inter-die detector from the first die to the second die for detecting a second feature between the first die and the second die, and comparing the first feature with the second feature for generating cross-die interconnect data from the first die to the second die by a neural network.
    Type: Application
    Filed: November 14, 2024
    Publication date: May 29, 2025
    Applicant: MEDIATEK INC.
    Inventors: Po-Chao Tsao, Tung-Hsing Lee
  • Publication number: 20250176275
    Abstract: An electrostatic discharge protection device is provided. The electrostatic discharge protection device includes a semiconductor substrate, first and second well regions, and first and second heavily doped regions. The first and second well regions have a first conductivity type and are located in the semiconductor substrate. The first heavily doped region on the first well region has a second conductivity type. A first bottom of the first well region and a second bottom of the second well region are connected to each other and have different profiles. The first and second well regions have different doping concentrations. The second heavily doped region on the second well region has the first conductivity type. The first and second heavily doped regions are arranged side-by-side and are spaced apart from each other. The first heavily doped region is electrically connected to an input/output terminal.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 29, 2025
    Inventors: Tzung-Lin LI, Yuan-Fu CHUNG, Tung-Hsing LEE
  • Publication number: 20250176240
    Abstract: A semiconductor device includes a first fin and a second fin in a first direction and aligned in the first direction over a substrate, an isolation insulating layer disposed around lower portions of the first and second fins, a first gate electrode extending in a second direction crossing the first direction and a spacer dummy gate layer, and a source/drain epitaxial layer in a source/drain space in the first fin. The source/drain epitaxial layer is adjacent to the first gate electrode and the spacer dummy gate layer with gate sidewall spacers disposed therebetween, and the spacer dummy gate layer includes one selected from the group consisting of silicon nitride, silicon oxynitride, silicon carbon nitride, and silicon carbon oxynitride.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 29, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Tai CHANG, Tung-Ying LEE, Wei-Sheng YUN, Tzu-Chung WANG, Chia-Cheng HO, Ming-Shiang LIN, Tzu-Chiang CHEN
  • Publication number: 20250175382
    Abstract: An artificial intelligence-based electronic product unboxing setup guidance system, method, and smart mobile terminal, wherein the guidance system includes a smart mobile terminal and a model server. The model server is equipped with a generative artificial intelligence large language model, while the smart mobile terminal hosts a client program with multiple demonstration pages. The smart mobile terminal plays these demonstration pages to guide the user in unboxing and setting up the electronic product. During this process, it collects interaction information between the user and the client program and transmits text generated from this interaction to the model server. The model server analyzes the text using the generative artificial intelligence large language model and returns the analysis results to the smart mobile terminal.
    Type: Application
    Filed: January 26, 2025
    Publication date: May 29, 2025
    Inventors: Chi Sum Yu, King Hong Chung, Chun Tung Chow, Kenneth Fan, Wai Kuen Cheung
  • Patent number: 12317565
    Abstract: A semiconductor device includes a III-V compound semiconductor layer and a source/drain structure. The source/drain structure is disposed on the III-V compound semiconductor layer. The source/drain structure includes a metal layer and metal silicide patterns. The metal layer is disposed on the metal silicide patterns, and a portion of the metal layer is disposed between the metal silicide patterns adjacent to each other.
    Type: Grant
    Filed: June 28, 2024
    Date of Patent: May 27, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Chih-Tung Yeh
  • Patent number: 12317438
    Abstract: A dust-proof telecommunication system and a method for assembling a dust-proof mechanism are disclosed. The system includes a chassis including an opening on a top side thereof; a PCB located within the chassis; a memory module removably installed on the PCB; and a cover removably coupled to the top side of the chassis. The opening is positioned and shaped such that the memory module is accessible via the opening for easy replacement. The method includes inserting a strip into the opening such that a space is formed between a wall of the opening and the strip; and inserting the memory module into the space formed between the wall of the opening and the strip such that another strip located at a first side of the memory module contacts the wall and the strip contacts a second side of the memory module. The memory module is replaceably coupled to the PCB.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: May 27, 2025
    Assignee: QUANTA COMPUTER INC.
    Inventors: Yaw-Tzorng Tsorng, Tung-Hsien Wu, Yu-Ying Tseng, Hsiang-Pu Ni
  • Patent number: 12315434
    Abstract: A display includes a first light emitting device. The first light emitting device includes a first switch and a second switch. The first switch is configured to adjust a first node according to a first clock signal. The second switch is configured to generate a first light emitting signal according to a first voltage signal. A control end of the second switch is coupled to the first node. The first clock signal switches between a first voltage level and a second voltage level. The first voltage signal has a third voltage level. The third voltage level is more than one of the first voltage level and the second voltage level and is less than the other one of the first voltage level and the second voltage level.
    Type: Grant
    Filed: December 27, 2023
    Date of Patent: May 27, 2025
    Assignee: AUO CORPORATION
    Inventors: Che-Wei Tung, Wei-Li Lin, Chin-Hao Chang, Wei-Kai Huang
  • Patent number: 12317529
    Abstract: A device includes a plurality of semiconductor fins extending from a substrate. A plurality of first source/drain regions are epitaxially grown from first regions of the semiconductor fins. Adjacent two of the plurality of first source/drain regions grown from adjacent two of the plurality of semiconductor fins are spaced apart by an isolation dielectric. A gate structure laterally surrounds second regions of the plurality of semiconductor fins above the first regions of the plurality of semiconductor fins. A plurality of second source/drain regions are over third regions of the plurality of semiconductor fins above the second regions of the plurality of semiconductor fins.
    Type: Grant
    Filed: April 3, 2023
    Date of Patent: May 27, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Sheng Yun, Shao-Ming Yu, Tung-Ying Lee, Chih-Chieh Yeh
  • Patent number: 12311321
    Abstract: The present invention relates to an anti-fouling, semi-permeable membrane comprising a porous support layer, a thin film composite (TFC) layer formed on a surface of the support layer, and a cross-linked polyvinyl alcohol (PVA) layer formed on top of the TFC layer, wherein the cross-linked PVA layer is the reaction product of PVA and a cross-linking agent, said cross-linking agent being a polybasic acid comprising three or more acid groups or precursors thereof. The obtained membrane shows a high water flux and a low roughness suitable for an effective membrane notable for feed solution having a tendency of fouling the membrane.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: May 27, 2025
    Assignees: Aquaporin A/S, Aquaporin Asia Pte Ltd
    Inventors: Nur Amalyna Binte Azman, Yang Zhao, Ye Wee Siew, Dongyu Liu, Brett Holmberg, Guofei Sun, Weng Hong Ho, Xuan Tung Nguyen
  • Patent number: 12317410
    Abstract: This document describes an access point device and associated systems and methods. The techniques and systems include an access point device that includes a housing with an antenna carrier, a circuit board assembly, a heat sink, and a heat shield positioned within the housing. The housing includes a top housing member connected to a bottom housing member. The top housing member includes a concave-down top-end portion connected to a generally cylindrical vertical wall via rounded corners. The antenna carrier supports multiple antennas positioned proximate to an inner surface of the vertical wall. The heat sink is positioned between the antenna carrier and the circuit board assembly. The circuit board assembly is positioned between the heat shield and the heat sink, and the heat shield is positioned between the circuit board assembly and the bottom housing member.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: May 27, 2025
    Assignee: Google LLC
    Inventors: Yau-Shing Lee, Rolando Willcox Esparza, George Liu, Wing Tung Wong, Frédéric Heckmann, Vivian W. Tang
  • Patent number: 12317515
    Abstract: A memory device and a semiconductor die are provided. The memory device includes single-level-cells (SLCs) and multi-level-cells (MLCs). Each of the SLCs and the MLCs includes: a phase change layer; and a first electrode, in contact with the phase change layer, and configured to provide joule heat to the phase change layer during a programming operation. The first electrode in each of the MLCs is greater in footprint area as compared to the first electrode in each of the SLCs.
    Type: Grant
    Filed: August 4, 2022
    Date of Patent: May 27, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Ying Lee, Shao-Ming Yu, Win-San Khwa, Yu-Chao Lin, Chien-Hsing Lee
  • Patent number: 12312234
    Abstract: Disclosed is a coil module, comprising: a vibrating membrane suspended on an air chamber defined and supported by a first substrate, at least one planar coil, embedded in the vibrating membrane, and at least a soft magnet, embedded in the vibrating membrane and disposed surrounding at least a portion of a contour of the planar coil; wherein a substantial portion of the planar coil locates at substantially the same plane where a portion of the soft magnet is arranged. A microspeaker and a method for preparing the same are also disclosed.
    Type: Grant
    Filed: February 23, 2024
    Date of Patent: May 27, 2025
    Assignee: Otowahr Technology Inc.
    Inventors: Yu Min Fu, Tung Yu Wu, Tse Chih Tang
  • Patent number: 12315751
    Abstract: An automatic cleaning unit for AMHS includes a plurality of sensors disposed on OHT rails. The sensors are configured to define a cleaning zone and to detect a location of an OHT vehicle. The automatic cleaning unit further includes a vacuum generator and a top cleaning part installed over the OHT rails in the cleaning zone. The top cleaning part is coupled to the vacuum generator. The vacuum generator is turned on to perform a vacuum cleaning operation when the sensors detect the OHT vehicle entering the cleaning zone.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: May 27, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Fu-Hsien Li, Chi-Feng Tung, Hsiang Yin Shen
  • Patent number: 12314259
    Abstract: An accelerator is disclosed. The accelerator may include an on-chip memory to store a data from a database. The on-chip memory may include a first memory bank and a second memory bank. The first memory bank may store the data, which may include a first value and a second value. A computational engine may execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory. The on-chip memory may be configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: May 27, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Andrew Zhenwen Chang, Vincent Tung Pham, Jaemin Jung
  • Patent number: 12311908
    Abstract: Systems and methods for brake pad control based on surface roughness are provided. A system can determine a value of roughness associated with traversal of a surface by a vehicle. The system can generate, based on the value of roughness, an instruction to actuate a brake of a wheel of the vehicle to reduce an amount of separation between a rotor of the brake and a pad of the brake. The system can facilitate, based on the instruction, actuation of the brake of the wheel.
    Type: Grant
    Filed: December 30, 2022
    Date of Patent: May 27, 2025
    Assignee: Rivian IP Holdings, LLC
    Inventors: Kevin Jared Sallee, Werner Roland Naegeli, William Jang, Somphone Khamly, Michael Fei-Kit Tung, Thomas Frederick Abdallah
  • Patent number: 12317761
    Abstract: A phase-change memory device and a method for fabricating the same are provided. The phase-change memory device comprises a first electrode, a stack and a multi-layered spacer. The first electrode is disposed on and electrically connected to an interconnect wiring of the interconnect structure. The stack is disposed on the first electrode and comprises a phase-change layer disposed on the first electrode and a second electrode disposed on the phase-change layer. The multi-layered spacer covers the stack. A first portion of the multi-layered spacer covers a top surface of the stack, and a second portion of the multi-layered spacer covers a sidewall of the stack.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: May 27, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shao-Ming Yu, Yu-Chao Lin, Tung-Ying Lee
  • Publication number: 20250162089
    Abstract: Apparatus, systems, and methods for controlling circulation of fluid to, and evacuation of the fluid from, an external fluid circuit for heat transfer. The apparatus includes a supply passageway for delivery of a liquid coolant to the external fluid circuit coupled to an external device, a bypass passageway having a venturi region that creates a suction force when liquid coolant passes therethrough, and fluid control means for selectively directing the circulation of coolant from the supply passageway to the external fluid circuit while stopping coolant to the bypass passageway, or diverting coolant to the bypass passageway while stopping circulation to the supply passageway and the external fluid circuit. A return passageway receives the circulation of coolant after passing through the external fluid circuit, and a suction passageway couples the suction force created by the venturi region to the return passageway, for evacuating fluid from the external fluid circuit.
    Type: Application
    Filed: January 21, 2025
    Publication date: May 22, 2025
    Inventors: Mark R. Nicewonger, Huy Anh Nguyen, Tiem Quang Nguyen, Hiep Ba Doan, Tung The Vu
  • Publication number: 20250165691
    Abstract: A method includes: generating first specification data of a semiconductor device; performing, to the first specification data, a first evaluation operation corresponding to a first physical feature to the first specification data, to generate first parameters; performing, to the first specification data, a second evaluation operation corresponding to a second physical feature different from the first physical feature, to generate second parameters; comparing the first parameters and the second parameters with preset parameters; and when the first parameters and the second parameters meet the preset parameters, manufacturing the semiconductor device according to the first specification data.
    Type: Application
    Filed: November 21, 2023
    Publication date: May 22, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yong ZHONG, Han-Hsuan CHENG, Man-Yun CHUNG, Ritvik RATHORE, Ya Tung HAN, Yu-Hao LIU, King-Ho TAM
  • Publication number: 20250164689
    Abstract: An embodiment photonic device may include a first photonic interconnect formed over a first horizontal plane, a second photonic interconnect formed over a second horizontal plane that is vertically displaced relative to the first horizontal plane, and a photonic coupler connected to the first photonic interconnect and the second photonic interconnect. The photonic coupler may be configured such that first photonic signals that are incident on the photonic coupler from the first photonic interconnect are directed by the photonic coupler into the second photonic interconnect, and second photonic signals that are incident on the photonic coupler from the second photonic interconnect are directed by the photonic coupler into the first photonic interconnect.
    Type: Application
    Filed: November 17, 2023
    Publication date: May 22, 2025
    Inventors: Chen-Hua Yu, Tung-Liang Shao
  • Patent number: D1076865
    Type: Grant
    Filed: October 30, 2023
    Date of Patent: May 27, 2025
    Assignee: GP Acoustics International Limited
    Inventors: Hamidreza Bekhradi, Eddy Rinna, Ka Lok Ng, Hiu Tung Chau, Michael Young