Abstract: A transformer arrangement and a method for producing a transformer arrangement is disclosed.

Abstract: High voltage semiconductor devices and methods of fabrication thereof are described. In one embodiment, a method of forming a semiconductor device includes forming first trenches in an insulating material. A trap region is formed in the insulating material by introducing an impurity into the first trenches. The first trenches are filled with a conductive material.

Abstract: A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.

Abstract: A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.

Abstract: A semiconductor component includes a body with a drift zone, a source zone, a body zone, and a drain zone. A gate forms a MOS structure with the drift zone, with the source zone and with the body zone. An edge termination between the lateral edge and the MOS structure includes a plurality of field rings which enclose the MOS structure. The lateral edge is at the same potential as the drift zone, and the edge termination reduces voltage between the lateral edge and the source zone. A horizontally extending edge plate is disposed at the front side between the lateral edge and the edge termination. The edge plate is at the same potential as the drift zone and forms a plate capacitor structure including a field plate lying above the edge plate.

Abstract: A lateral power semiconductor component has a front side, a rear side and a lateral edge. The component further includes a drift zone of a first conductivity type, a source zone of the first conductivity type, a body zone of a second conductivity type opposite the first conductivity type, and a drain zone of the first conductivity type. A gate forms a MOS structure with the drift zone, the source zone and the body zone. A horizontally extending field plate above each semiconductor region of the power semiconductor component forms a plate capacitor structure with an edge plate lying under the field plate. The edge plate includes a highly doped semiconductor material and is electrically connected to one of a source potential and a drain potential of the power semiconductor component.

Abstract: The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g.

Abstract: A power semiconductor component (1) contains a weakly doped drift zone (9), a drain zone (10) and a MOS structure (12) situated at the front side (2) of the power semiconductor component (1). An edge plate (6) of the first conductivity type is provided at its edge (8) above the drift zone (9). The edge plate (6) is doped more highly than the drift zone (9). Situated above the edge plate (6) is an insulation layer (24) with an overlying field plate (7) made of polysilicon. The field plate (7) forms together with the edge plate (6) a plate capacitor structure which increases the drain-source output capacitance of the power semiconductor component (1), so that fewer radiofrequency interference disturbances are caused by the power semiconductor component (1) during switching.

Abstract: A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconductor substrate. This MISFET has, on the top side of the semiconductor body, a drain, a source, and a gate electrode with gate insulator. A semiconductor zone of the first conduction type is embedded in the epitaxial layer in a manner adjoining the gate insulator, a drift zone of the second conduction type being arranged between the semiconductor zone and the drain electrode in the epitaxial layer. The drift zone has pillar-type regions which are arranged in rows and columns and whose boundary layers have a metal layer which in each case forms a Schottky contact with the material of the drift zone.

Abstract: An integrated circuit including a semiconductor assembly in thin-film SOI technology is disclosed. One embodiment provides a semiconductor assembly in thin-film SOI technology including a first semiconductor substrate structure of a second conductivity type inverse to a first conductivity type in a semiconductor substrate below a first semiconductor layer, a second semiconductor substrate structure of a second conductivity type in a semiconductor substrate below a second semiconductor layer structure, and a third semiconductor substrate structure of the first conductivity type below the first semiconductor layer structure in the semiconductor substrate and otherwise surrounded by the first semiconductor substrate structure.

Abstract: A semiconductor component is described. In one embodiment, the semiconductor component includes a semiconductor body with a first side and a second side. A drift zone is provided, which is arranged in the semiconductor body below the first side and extends in a first lateral direction of the semiconductor body between a first and a second doped terminal zone. At least one field electrode is provided, which is arranged in the drift zone, extends into the drift zone proceeding from the first side and is configured in a manner electrically insulated from the semiconductor body.

Abstract: A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler.

Abstract: This invention relates to silicone-containing compositions, method of making said silicone-containing compositions, and to personal care and other products based on such compositions.

Abstract: Semiconductor component comprising at least two semiconductor regions are disclosed. In one embodiment the semiconductor regions of the semiconductor component are electrically isolated from one another by an insulator, and a deposited, patterned, metallic layer extends over the semiconductor regions and over the insulator.

Abstract: A semiconductor configuration having an integrated coupler is provided. The semiconductor configuration includes a coupler which is integrated in the substrate and which includes a first port and a second port. The coupler defines, in a plan view onto the substrate, an inner region of the substrate surrounded at least in sections by the coupler, and an outer region of the substrate arranged outside to the coupler. The coupler is at least a magnetic coupler, a capacitive coupler, or a combination of both. At least a circuit element is integrated in the inner region of the substrate and includes a port which is electrically connected to the second port of the coupler.

Abstract: An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further component zone which is configured in such a way that a space charge zone is formed in the drift zone when a reverse voltage is applied to the junction, and a terminal zone adjacent to the drift zone. A first terminal electrode is connected to the further component zone, and a second terminal electrode is connected to the terminal zone. In the semiconductor substrate a first semiconductor zone is doped complementarily with respect to a basic doping of the semiconductor substrate, and the first terminal electrode is connected to the first semiconductor zone. A rectifier element is connected between the first terminal electrode and the first semiconductor zone.

Abstract: An integrated circuit including a semiconductor assembly in thin-film SOI technology is disclosed. One embodiment provides a semiconductor assembly in thin-film SOI technology including a first semiconductor substrate structure of a second conductivity type inverse to a first conductivity type in a semiconductor substrate below a first semiconductor layer, a second semiconductor substrate structure of a second conductivity type in a semiconductor substrate below a second semiconductor layer structure, and a third semiconductor substrate structure of the first conductivity type below the first semiconductor layer structure in the semiconductor substrate and otherwise surrounded by the first semiconductor substrate structure.

Abstract: The invention relates to a semiconductor power device with charge compensation structure and monolithic integrated circuit, and method for fabricating it. In the case of this semiconductor power device, zones (6) in charge compensation cells (27) that are arranged vertically and doped complimentarily to the semiconductor chip volume (5) are arranged in the entire chip volume, the complimentarily doped zones (6) extending right into surface regions (11) of the semiconductor power elements (7) and not projecting into surface regions (12) of semiconductor surface elements (1).

Abstract: An SOI semiconductor component comprises a semiconductor substrate having a basic doping, a dielectric layer arranged on the semiconductor substrate, and a semiconductor layer arranged on the dielectric layer. The semiconductor layer includes a drift zone of a first conduction type, a junction between the drift zone and a further component zone which is configured in such a way that a space charge zone is formed in the drift zone when a reverse voltage is applied to the junction, and a terminal zone adjacent to the drift zone. A first terminal electrode is connected to the further component zone, and a second terminal electrode is connected to the terminal zone. In the semiconductor substrate a first semiconductor zone is doped complementarily with respect to a basic doping of the semiconductor substrate, and the first terminal electrode is connected to the first semiconductor zone. A rectifier element is connected between the first terminal electrode and the first semiconductor zone.

Abstract: A power semiconductor component (1) contains a weakly doped drift zone (9), a drain zone (10) and a MOS structure (12) situated at the front side (2) of the power semiconductor component (1). An edge plate (6) of the first conductivity type is provided at its edge (8) above the drift zone (9). The edge plate (6) is doped more highly than the drift zone (9). Situated above the edge plate (6) is an insulation layer (24) with an overlying field plate (7) made of polysilicon. The field plate (7) forms together with the edge plate (6) a plate capacitor structure which increases the drain-source output capacitance of the power semiconductor component (1), so that fewer radiofrequency interference disturbances are caused by the power semiconductor component (1) during switching.