Abstract: A lateral MISFET having a semiconductor body has a doped semiconductor substrate of a first conduction type and an epitaxial layer of a second conduction type, which is complementary to the first conduction type, the epitaxial layer being provided on the semiconductor substrate. This MISFET has, on the top side of the semiconductor body, a drain, a source, and a gate electrode with gate insulator. A semiconductor zone of the first conduction type is embedded in the epitaxial layer in a manner adjoining the gate insulator, a drift zone of the second conduction type being arranged between the semiconductor zone and the drain electrode in the epitaxial layer. The drift zone has pillar-type regions which are arranged in rows and columns and whose boundary layers have a metal layer which in each case forms a Schottky contact with the material of the drift zone.

Abstract: A compensation component and a process for production thereof includes a semiconductor body having first and second electrodes, a drift zone disposed therebetween, and areas of a first conductivity type and a second conductivity type opposite the first conductivity type disposed in the drift zone. Higher doped zones of the first type are inlaid in a weaker doped environment of the second type closer to the first electrode and higher doped zones of the second type are inlaid in a weaker doped environment of the first type closer to the second electrode. The drift zone is complementary so that, in a direction between the electrodes, a more highly doped zone of the first type adjoins a more weakly doped environment of the first type, and a more weakly doped environment of the second type adjoins a more highly doped zone of the second type.

Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.

Abstract: In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.

Abstract: A semiconductor component is described. In one embodiment, the semiconductor component includes a semiconductor body with a first side and a second side. A drift zone is provided, which is arranged in the semiconductor body below the first side and extends in a first lateral direction of the semiconductor body between a first and a second doped terminal zone. At least one field electrode is provided, which is arranged in the drift zone, extends into the drift zone proceeding from the first side and is configured in a manner electrically insulated from the semiconductor body.

Abstract: A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected by a first terminal electrode. A drift zone of the first conductivity type is adjoined by a second terminal zone of the second conductivity type. A channel zone of a second conductivity type is formed between the at least one first terminal zone and the drift zone. A control electrode is insulated from the semiconductor body and adjacent to the channel zone. A first channel is formed by the channel zone in a region adjacent to the control electrode, the first channel conducts only upon application of a control voltage that is not equal to zero between the control electrode and the first terminal zone. The first terminal electrode is connected to the drift zone via at least one second channel of the first conductivity type, which already conducts in the event of a control voltage equal to zero.

Abstract: The invention relates to a semiconductor power device with charge compensation structure and monolithic integrated circuit, and method for fabricating it. In the case of this semiconductor power device, zones (6) in charge compensation cells (27) that are arranged vertically and doped complementarily to the semiconductor chip volume (5) are arranged in the entire chip volume, the complementarily doped zones (6) extending right into surface regions (11) of the semiconductor power elements (7) and not projecting into surface regions (12) of semiconductor surface elements (1).

Abstract: A semiconductor component has at least one first terminal zone of a first conductivity type in a semiconductor body. The first terminal zone is contact-connected by a first terminal electrode. A drift zone of the first conductivity type is adjoined by a second terminal zone of the second conductivity type. A channel zone of a second conductivity type is formed between the at least one first terminal zone and the drift zone. A control electrode is insulated from the semiconductor body and adjacent to the channel zone. A first channel is formed by the channel zone in a region adjacent to the control electrode, the first channel conducts only upon application of a control voltage that is not equal to zero between the control electrode and the first terminal zone. The first terminal electrode is connected to the drift zone via at least one second channel of the first conductivity type, which already conducts in the event of a control voltage equal to zero.

Abstract: In a method for forming a channel zone in field-effect transistors, a polysilicon layer is patterned above the channel zone to be formed. The polysilicon layer serves as a mask substrate for the subsequent doping of the channel zone. The expedient patterning of the polysilicon layer with holes in a gate region and pillars in a source region enables the channel zone to be doped more lightly. In another embodiment, the novel method is used for a channel width shading of a PMOS transistor cell.

Abstract: A power MOS element includes a drift region with a doping of a first doping type, a channel region with a doping of a second doping type which is complementary to said first doping type and which borders on said channel region and said drift region, and a source region with a doping of said first doping type, said source region bordering on said channel region. Furthermore, said power MOS element includes a plurality of basically parallel gate trenches which extend to said drift region and which comprise an electrically conductive material which is insulated from the transistor region by an insulator. The individual gate trenches are connected by a connecting gate trench, a gate contact only being connected in an electrically conductive way to the active gate trenches via contact holes in said connecting gate trench.

Abstract: A compensation component and a process for production thereof includes a semiconductor body having first and second electrodes, a drift zone disposed therebetween, and areas of a first conductivity type and a second conductivity type opposite the first conductivity type disposed in the drift zone. Higher doped zones of the first type are inlaid in a weaker doped environment of the second type closer to the first electrode and higher doped zones of the second type are inlaid in a weaker doped environment of the first type closer to the second electrode. The drift zone is complementary so that, in a direction between the electrodes, a more highly doped zone of the first type adjoins a more weakly doped environment of the first type, and a more weakly doped environment of the second type adjoins a more highly doped zone of the second type.

Abstract: A power MOS element includes a drift region with a doping of a first doping type, a channel region with a doping of a second doping type which is complementary to said first doping type and which borders on said channel region and said drift region, and a source region with a doping of said first doping type, said source region bordering on said channel region. Furthermore, said power MOS element includes a plurality of basically parallel gate trenches which extend to said drift region and which comprise an electrically conductive material which is insulated from the transistor region by an insulator. The individual gate trenches are connected by a connecting gate trench, a gate contact only being connected in an electrically conductive way to the active gate trenches via contact holes in said connecting gate trench.

Abstract: A power MOS element includes a drift region with a doping of a first doping type, a channel region with a doping of a second doping type which is complementary to the first doping type and which borders on the channel region and the drift region, and a source region with a doping of the first doping type, the source region bordering on the channel region. Furthermore, the power MOS element includes a plurality of basically parallel gate trenches which extend to the drift region and which comprise an electrically conductive material which is insulated from the transistor region by an insulator. The individual gate trenches are connected by a connecting gate trench, a gate contact only being connected in an electrically conductive way to the active gate trenches via contact holes in the connecting gate trench.