Abstract: The illustrative embodiments of this invention are directed to a method, a medium and a system for realizing resettable hierarchically scoped variables in a graphical modeling environment on a computing device. The method includes creating at least one resettable variable in a model within the graphical modeling environment, wherein the resettable variable is hierarchically scoped. The resettable variable is reset to a preset value before or during a subsequent invocation of a part of the model that contains the resettable variable. The graphical modeling environment may be a state diagramming environment or the graphical modeling environment may be a time-based graphical modeling environment.

Abstract: Systems and methods are provided for a scheme and mechanism for performing static analysis of a sample time aware state diagram model to compute and propagate multiple samples rates associated with the state diagram model. A graphical intermediate representation of the state diagram model, such as a directed graph or control flow graph, is used to determine how the multiple sample rates are propagated via elements of the state diagram model. The graph provides a static representation of the control of flow, including alternative and/or conditional flow paths, of the state diagram model. The present invention determines the propagation of sample rates via analysis and traversal of the intermediate representation. By using the techniques of the present invention, a state diagram model may provide multiple sample rate outputs, such as by function calls and output signals to a graphical model, such as a model representing a dynamic system.

Abstract: Flash memory devices and systems are provided. One flash memory device includes an n-channel metal oxide semiconductor field-effect transistor (nMOSFET), a silicon-oxide-nitride-oxide silicon (SONOS) transistor coupled to the nMOSFET, and an isolated p-well coupled to the nMOSFET and the SONOS transistor. A flash memory system includes an array of memory devices divided into a plurality of paired sectors, a global bit line (GBL) configured to provide high voltage to each respective sector during erase and program operations coupled to each of the plurality of sectors, and a plurality of sense amplifiers coupled between a respective pair of sectors. Methods for operating a flash memory are also provided. One method includes providing high voltage, via the GBL, to the paired sectors during erase and program operations and providing low voltage, via a local bit line, to each memory device during read operations.

Abstract: The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.

Abstract: Systems and methods are provided for a scheme and mechanism for performing static analysis of a sample time aware state diagram model to compute and propagate multiple samples rates associated with the state diagram model. A graphical intermediate representation of the state diagram model, such as a directed graph or control flow graph, is used to determine how the multiple sample rates are propagated via elements of the state diagram model. The graph provides a static representation of the control of flow, including alternative and/or conditional flow paths, of the state diagram model. The present invention determines the propagation of sample rates via analysis and traversal of the intermediate representation. By using the techniques of the present invention, a state diagram model may provide multiple sample rate outputs, such as by function calls and output signals to a graphical model, such as a model representing a dynamic system.

Abstract: A method of providing multi-instantiable state templates to a statechart environment is discussed. The method includes the step of providing a graphical definition of an independent state machine object belonging to a statechart. The method further includes the step of instantiating a first instance and a second instance of the independent state machine object in the statechart. The method additionally includes the steps of starting execution of the first instance of the independent state machine object and then stopping execution of the first instance of the state machine object. Additionally, the method includes the step of starting the execution of the second instance of the independent state machine object in the state diagram.

Abstract: A programming element is provided that defines model attributes in response to mode change events in a graphical modeling environment. Such definition may involve any signal attribute such as dimensions, data types, complexity and sample times. Events that trigger definition of model attributes may be explicit signaling events generated by other elements, elements within the block diagram programming environment, and elements external from the environment. Implicit events may also trigger definition of model attributes, such as a change of attribute in an input signal.

Abstract: A method, apparatus and system for accessing data that exists within a first environment, such as a time driven environment, from within a second environment such as a state driven environment. Access to this data is accomplished using an interface element in communication with both environments. To allow access to data in the first environment, the second environment is parsed to locate references to any data to be shared located outside of the second environment. Once these data references are located, resolution of these references outside of the second environment is accomplished such that the data to be shared is shared between the first and second environments.

Abstract: A method, system and computer program product to define and utilize functions graphically is provided which may be used in the simulation of finite state machines. The functions may combine mathematical, logical, non-linear and comparative operations. The graphical elements of the function may be hidden for ease of display of various portions of a model.

Abstract: The present invention provides a graphical model in a computing environment that enables a non-graphical entity to be a caller entity that executes a sequence of commands to call to a graphical or non-graphical entity that is a callee. The present invention also enables a graphical entity to be a caller to call a non-graphical entity as a callee. The present invention further allows graphical entities to have a variable number of input ports and output ports and provides the ability to use function overloading that is similar to function overloading provided in textual programming languages, such as C and C++. Further, the present invention allows the use of hyperlink between navigate between the caller and callee entities.

Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.

Abstract: An electronic device and method are provided to enable the management of shared code. Code may be shared if the environmental configuration is suitable for execution of the code and the functionality of the code matches. An identifier is provided to correspond to the functionality for a unit of code. Examples of identifiers can include file names, function names, macro names and class names. A checksum may also be used to identify the functionality of the unit of code. An organizational structure is configured to have constituents corresponding to environmental configurations suitable to execute the unit of code. Examples of the organizational structure include a directory structure or a class structure. The various units of code may be stored in the organizational structure and located by the constituent in which they are located and their functionality determined by the identifier to enable sharing.

Abstract: An electronic device with a graphical language environment that includes a method which examines a graphical model to identify textual items having intrinsic executable computational meaning within the graphical model is discussed. The method identifies at least one textual item with intrinsic executable computational meaning. The method further provides an indicator for the at least one identified textual item with intrinsic executable computational meaning in a display of the graphical model. The indicator may be based upon a characteristic of the identified textual item.

Abstract: The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.

Abstract: A method of providing multi-instantiable state templates to a statechart environment is discussed. The method includes the step of providing a graphical definition of an independent state machine object belonging to a statechart. The method further includes the step of instantiating a first instance and a second instance of the independent state machine object in the statechart. The method additionally includes the steps of starting execution of the first instance of the independent state machine object and then stopping execution of the first instance of the state machine object. Additionally, the method includes the step of starting the execution of the second instance of the independent state machine object in the state diagram.

Abstract: This invention is directed to a method for use in a state diagramming environment on a computing device. The method includes obtaining a state diagram via the environment and processing a first event for the state diagram via the environment. The method also includes triggering a second event, wherein the triggering is based on the first event. The method further includes broadcasting the second event in a non-blocking fashion that allows the first event to continue being processed.

Abstract: An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit.

Abstract: The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.

Abstract: The present invention provides a state diagramming environment in a computing device that enables the conversion of a state diagram into a hardware description language. To achieve this conversion, the present invention generates an intermediate representation of the state diagram. The intermediate representation is checked against a set of predefined restrictions for compliance. The state diagramming environment converts the intermediate representation of the state diagram into a hardware description language, such as VHDL or Verilog.

Abstract: The present invention provides a graphical model in a computing environment, where the graphical model includes at least a caller entity. A call command associated with the caller entity is executed, where the call command includes at least a partial name of the callee entity. The at least one callee entity may be identified based on the partial name of the at least one callee entity provided in the call command. The at least one callee entity may then be called.