Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.

Abstract: A system and method may generate executable block diagrams in which at least some of the blocks run in accordance with message-based execution semantics. A message may include an input data payload that does not change over time, and the message may persist for only a determined time interval during execution of block diagram. A message-based execution engine may control execution of message-based blocks in which a source block may generate a message at a particular point in time, the message may be sent to one or more destination blocks triggering execution of those blocks, and the message may be destroyed on or after a determined time interval. Other execution domains, such as a time-based or state-based execution domain, may be provided, and the system may implement a hybrid execution model. A verification engine may provide one or more tools for evaluating and verifying operation of message-based blocks.

Abstract: Various embodiments provide a system, method, and computer program product for sorting and/or selectively retrieving a plurality of documents in response to a user query. More particularly, embodiments are provided that convert each document into a corresponding document language model and convert the user query into a corresponding query language model. The language models are used to define a vector space having dimensions corresponding to terms in the documents and in the user query. The language models are mapped in the vector space. Each of the documents is then ranked, wherein the ranking is based at least in part on a position of the mapped language models in the vector space, so as to determine a relative relevance of each of the plurality of documents to the user query.

Abstract: A control flow graph may be generated from a model. The control flow graph may be restructured by converting at least one unstructured region of a control flow graph into a structured region. The restructuring may include locating at least one block between two merge nodes in the control flow graph, moving the located block to a different section of the control flow graph, and creating the structured region by surrounding the moved code block with a test of a guard variable.

Abstract: An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit.

Abstract: The present invention provides a method and system for stage evaluation of a state machine model. Two types of transitions are used: first-stage transitions and second-stage transitions for a two-stage evaluation. In one embodiment, top-down processing and bottom-up processing may be combined using a two-stage evaluation. First-stage transitions are used with top-down processing while second-stage transitions are used with bottom-up processing. Certain conditions are used to determine if a switch from one type of stage processing to another type of stage processing is needed.

Abstract: The illustrative embodiments of this invention are directed to a method, a medium and a system for realizing resettable hierarchically scoped variables in a graphical modeling environment on a computing device. The method includes creating at least one resettable variable in a model within the graphical modeling environment, wherein the resettable variable is hierarchically scoped. The resettable variable is reset to a preset value before or during a subsequent invocation of a part of the model that contains the resettable variable. The graphical modeling environment may be a state diagramming environment or the graphical modeling environment may be a time-based graphical modeling environment.

Abstract: According to an embodiment of the invention, a method is performed in which a print configuration for an electronic device is saved. Therefore, a virtual print driver is installed (or activated) on the electronic device. The virtual print driver operates so that, when a digital coupon image is selected for printing, the digital coupon image is captured and re-transmitted over a network for remote storage in lieu of the digital coupon image being printed locally.

Abstract: According to one embodiment of the invention, an electronic device is adapted to receive and upload digital credits for later application as part of payment for purchases at particular retailer. The electronic device comprises a memory to store an incoming credit email message, and a processor that, in response to receipt of the credit email message and selection of a link contained on the credit email message, establishes communication with a storage area remote from the electronic device in order to upload a digital credit into an account of a registered user using the electronic device. The storage area is accessible by a plurality of retailers to allow the retailers, when the registered user of the electronic device is present at the retailer, to fetch and apply the digital credit to purchases at the retailer.

Abstract: Exemplary embodiments provide techniques for replacing a portion of a state diagram with a generalized, canonical version of the portion. The canonicalized version mimics the structure or semantics (or both) of the portion of the state diagram, although the canonicalized version need not be a perfect match for the structure or semantics of the portion. Exemplary embodiments further provide techniques for identifying a portion of a state diagram for reuse, and generating a canonicalized version of the portion.

Abstract: The present invention provides a method a system for facilitating enhanced processing of state diagrams in a state diagram environment. The method may include top-down processing a current state in a state diagram environment; determining whether processing of the current state results in an exception event; and passing the exception event to a superstate that includes the current state when it is determined that the current state results in an exception event. The superstate may be made the current state and it may be determined whether the current state can handle the exception event. When it is determined that the current state cannot handle the exception event, it may be determined whether the current state has a second superstate that includes the current state. An error event may be output from the state diagram environment when it is determined that the current state does not have a second superstate.

Abstract: A system, method, distribution system, and computer readable medium for locating an element of a computing environment are described. The invention feature selecting a label within a state diagram associated with a graphical model and processing the selected label to generate a location identifier. The invention also features analyzing the location identifier to determine which element of a graphical model is associated with the location identifier and positioning the graphical model to display the element associated with the location identifier to a user viewing the graphical model.

Abstract: A method, system and computer program product to define and utilize functions graphically is provided which may be used in the simulation of finite state machines. The functions may combine mathematical, logical, non-linear and comparative operations. The graphical elements of the function may be hidden for ease of display of various portions of a model.

Abstract: An electronic device with a graphical language environment that includes a method which examines a graphical model to identify textual items having intrinsic executable computational meaning within the graphical model is discussed. The method identifies at least one textual item with intrinsic executable computational meaning. The method further provides an indicator for the at least one identified textual item with intrinsic executable computational meaning in a display of the graphical model. The indicator may be based upon a characteristic of the identified textual item.

Abstract: The present invention provides a user of a state diagramming environment with the ability to specify if the user wants to develop a Moore machine or a Mealy machine. To achieve this, a set of predefined requirements is provided that restricts the state diagram semantics to either semantics of a Moore or Mealy machine. When a user provides a state diagram that does not conform to the set of requirements, the state diagram is identified as non-conforming and the user is notified of the non-conformance. The user is given information describing what aspects of the state diagram do not conform, thereby, allowing the user to quickly identify any errors that have been made. As a result of the present invention, the burden placed on the user is reduced and the time spent debugging is minimized.

Abstract: Systems and methods of flyback capacitor level shifter feedback regulation for negative pumps. In accordance with a first embodiment of the present invention, a feedback regulator for a negative output charge pump comprises a flyback capacitor for inverting an output of the negative output charge pump to a positive voltage. The feedback regulator further comprises a voltage comparator for comparing the positive voltage to a reference voltage. The voltage comparator is also for producing an enable signal for control of pump driving signals to the negative output charge pump. The feedback regulator further comprises a first plurality of switches for selectively coupling a first terminal of the flyback capacitor between a low voltage and the output and a second plurality of switches for selectively coupling a second terminal of the flyback capacitor between a low voltage and the voltage comparator. Further, the feedback regulator comprises switch control logic for controlling the plurality of switches.

Abstract: In embodiments described herein, a memory architecture has an array of non-volatile memory cells and a pair of independently controlled voltage pumps. The pair of voltage pumps is coupled for supplying both positive and negative voltage biases to the memory array during program and erase operations, such that a sum of the magnitudes of the positive and negative voltage biases is applied across a storage node of an accessed memory cell.

Abstract: A data processing apparatus comprises a plurality of processors and message processing logic operable for establishing one of the processors as a master processor and all other processors as slave processors; receiving an application message from a particular message source among a plurality of message sources coupled to one or more network interfaces and the processors, wherein the application message comprises one or more data frames, packets and segments; granting exclusive control of the particular message source to a selected one of the slave processors; assigning an ordered sequence number to the application message; granting exclusive control, for a particular message destination among a plurality of message destinations coupled to the network interfaces and the processors, to the selected one of the slave processors; and providing the application message to the particular message destination.

Abstract: A system generates a state diagram model in a graphical modeling system, where the state diagram model includes at least one state. A condition statement is associated with the at least one state, and defines a condition upon which one or more actions associated with the at least one state are executed.

Abstract: An apparatus and a method for maintaining an output voltage of a charge pump circuit near a target voltage is disclosed. A regulated supply voltage is generated based on the output voltage of the charge pump. The regulated supply voltage is applied to a voltage input to the charge pump circuit and to a voltage input of a clock driver that provides a regulated clock signal to the charge pump circuit.