Patents by Inventor Vikram Joshi

Vikram Joshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9405476
    Abstract: A multi-level cache comprises a plurality of cache levels, each configured to cache I/O request data pertaining to I/O requests of a different respective type and/or granularity. The multi-level cache may comprise a file-level cache that is configured to cache I/O request data at a file-level of granularity. A file-level cache policy may comprise file selection criteria to distinguish cacheable files from non-cacheable files. The file-level cache may monitor I/O requests within a storage stage, and may service I/O requests from a cache device.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: August 2, 2016
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Hrishikesh A. Vidwans
  • Patent number: 9336953
    Abstract: The present invention generally relates to methods for increasing the lifetime of MEMS devices by reducing the number of movements of a switching element in the MEMS device. Rather than returning to a ground state between cycles, the switching element can remain in the same state if both cycles necessitate the same capacitance. For example, if in both a first and second cycle, the switching element of the MEMS device is in a state of high capacitance the switching element can remain in place between the first and second cycle rather than move to the ground state. Even if the polarity of the capacitance is different in successive cycles, the switching element can remain in place and the polarity can be switched. Because the switching element remains in place between cycles, the switching element, while having the same finite number of movements, should have a longer lifetime.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: May 10, 2016
    Assignee: CAVENDISH KINETICS INC.
    Inventors: Cong Quoc Khieu, Vikram Joshi, Richard L. Knipe
  • Publication number: 20160072408
    Abstract: The present invention generally relates to a method of operating a MEMS DVC while minimizing impact of the MEMS device on contact surfaces. By reducing the drive voltage upon the pull-in movement of the MEMS device, the acceleration of the MEMS device towards the contact surface is reduced and thus, the impact velocity is reduced and less damage of the MEMS DVC device occurs.
    Type: Application
    Filed: May 16, 2014
    Publication date: March 10, 2016
    Inventors: Cong Quoc KHIEU, James Douglas HUFFMAN, Richard L. KNIPE, Vikram JOSHI, Robertus Petrus VAN KAMPEN
  • Publication number: 20160062787
    Abstract: Systems and methods for managing data input/output operations are described that include virtual machines operating with a shared storage within a host. In such a system, a computer-implemented method is provided for dynamically provisioning cache storage while operating system applications continue to operate, including stalling the virtual machine's local cache storage operations, changing the provision of cache storage size; and resuming the operations of the virtual machine.
    Type: Application
    Filed: November 5, 2015
    Publication date: March 3, 2016
    Inventors: Vikram Joshi, Yang Luan, Manish R. Apte, Hrishikesh A. Vidwans, Michael F. Brown
  • Publication number: 20160055191
    Abstract: Techniques are described herein for performing database operations against location and access transparent metadata units called fat pointers organized into globally distributed data structures. The fat pointers are created by extracting values corresponding to a particular key and paring each value with a reference to the local location and server that has the native format record containing the value. The fat pointers may be transferred to any server in the cluster, even if the server is different from the server that has the native format record. In general, most operations are performed against fat pointers rather than the native format records. This allows the cluster to perform work against arbitrary types of data efficiently and in a constant amount of time despite the variable sizes and structures of records.
    Type: Application
    Filed: May 22, 2015
    Publication date: February 25, 2016
    Inventors: Vikram Joshi, Jerene Yang, Brent Lim Tze Hao, Michael Brown
  • Publication number: 20160055220
    Abstract: Techniques are described herein for creating an algorithm for batch mode processing against big data. The techniques involve receiving one or more user commands from a set number of commands that correspond one-to-one with a set number of low-level database operations. In a preferred embodiment, the set of database operations includes only FILTERS, SORTS, AGREGGATES, and JOINS. In the algorithm formation process, database operations are performed on a sample population of records. The user drills down to a set of useful records by performing database operations against the results of the previous database operations. While the database cluster is receiving operations, the system is tracking the operations in a dependency graph. The chains selected within the dependency graph indicate which operations are used to create the algorithm. To generate the algorithm, the database cluster reverse engineers the logic for performing those operations against big data.
    Type: Application
    Filed: May 22, 2015
    Publication date: February 25, 2016
    Inventors: Vikram Joshi, Jerene Yang, Brent Lim Tze Hao, Michael Brown
  • Publication number: 20150363324
    Abstract: A de-duplication is configured to cache data for access by a plurality of different storage clients, such as virtual machines. A virtual machine may comprise a virtual machine de-duplication module configured to identify data for admission into the de-duplication cache. Data admitted into the de-duplication cache may be accessible by two or more storage clients. Metadata pertaining to the contents of the de-duplication cache may be persisted and/or transferred with respective storage clients such that the storage clients may access the contents of the de-duplication cache after rebooting, being power cycled, and/or being transferred between hosts.
    Type: Application
    Filed: August 24, 2015
    Publication date: December 17, 2015
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Bhavesh Mehta, Prashanth Radhakrishnan
  • Patent number: 9201677
    Abstract: Systems and methods for managing data input/output operations are described that include virtual machines operating with a shared storage within a host. In such a system, a computer-implemented method is provided for dynamically provisioning cache storage while operating system applications continue to operate, including stalling the virtual machine's local cache storage operations, changing the provision of cache storage size; and resuming the operations of the virtual machine.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: December 1, 2015
    Assignee: Intelligent Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Manish R. Apte, Hrishikesh A. Vidwans, Michael F. Brown
  • Patent number: 9116812
    Abstract: A de-duplication is configured to cache data for access by a plurality of different storage clients, such as virtual machines. A virtual machine may comprise a virtual machine de-duplication module configured to identify data for admission into the de-duplication cache. Data admitted into the de-duplication cache may be accessible by two or more storage clients. Metadata pertaining to the contents of the de-duplication cache may be persisted and/or transferred with respective storage clients such that the storage clients may access the contents of the de-duplication cache after rebooting, being power cycled, and/or being transferred between hosts.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: August 25, 2015
    Assignee: Intelligent Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Bhavesh Mehta, Prashanth Radhakrishnan
  • Publication number: 20150205535
    Abstract: A multi-level cache comprises a plurality of cache levels, each configured to cache I/O request data pertaining to I/O requests of a different respective type and/or granularity. The multi-level cache may comprise a file-level cache that is configured to cache I/O request data at a file-level of granularity. A file-level cache policy may comprise file selection criteria to distinguish cacheable files from non-cacheable files. The file-level cache may monitor I/O requests within a storage stage, and may service I/O requests from a cache device.
    Type: Application
    Filed: March 31, 2015
    Publication date: July 23, 2015
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Hrishikesh A. Vidwans
  • Patent number: 9058123
    Abstract: A storage module may be configured to service I/O requests according to different persistence levels. The persistence level of an I/O request may relate to the storage resource(s) used to service the I/O request, the configuration of the storage resource(s), the storage mode of the resources, and so on. In some embodiments, a persistence level may relate to a cache mode of an I/O request. I/O requests pertaining to temporary or disposable data may be serviced using an ephemeral cache mode. An ephemeral cache mode may comprise storing I/O request data in cache storage without writing the data through (or back) to primary storage. Ephemeral cache data may be transferred between hosts in response to virtual machine migration.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: June 16, 2015
    Assignee: Intelligent Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, David Flynn, Brent Lim Tze Hao, Jerene Zhe Yang, Prashanth Radhakrishnan
  • Patent number: 9003104
    Abstract: A multi-level cache comprises a plurality of cache levels, each configured to cache I/O request data pertaining to I/O requests of a different respective type and/or granularity. The multi-level cache may comprise a file-level cache that is configured to cache I/O request data at a file-level of granularity. A file-level cache policy may comprise file selection criteria to distinguish cacheable files from non-cacheable files. The file-level cache may monitor I/O requests within a storage stage, and may service I/O requests from a cache device.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: April 7, 2015
    Assignee: Intelligent Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Hrishikesh A. Vidwans
  • Patent number: 8996807
    Abstract: A multi-level cache comprises a plurality of cache levels, each configured to cache I/O request data pertaining to I/O requests of a different respective type and/or granularity. A cache device manager may allocate cache storage space to each of the cache levels. Each cache level maintains respective cache metadata that associates I/O request data with respective cache address. The cache levels monitor I/O requests within a storage stack, apply selection criteria to identify cacheable I/O requests, and service cacheable I/O requests using the cache storage device.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 31, 2015
    Assignee: Intelligent Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Michael F. Brown, Hrishikesh A. Vidwans
  • Patent number: 8988079
    Abstract: Certain embodiments of the present application describe a carbon-based electrode with graphene platelets. The addition of graphene platelets is intended to improve properties of the electrode. These properties include, but are not limited to, physical, electrical, and biochemical properties of the electrode. Enhanced reproducibility of these properties can also result from the addition of the graphene platelets.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: March 24, 2015
    Assignee: Proxim Diagnostics
    Inventors: Mikhail Briman, Vikram Joshi
  • Publication number: 20150012692
    Abstract: Systems and methods for managing data input/output operations are described. In one aspect, a device driver identifies a data read operation generated by a virtual machine in a virtual environment. The device driver is located in the virtual machine and the data read operation identifies a physical cache address associated with the data requested in the data read operation. A determination is made regarding whether data associated with the data read operation is available in a cache associated with the virtual machine.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 8, 2015
    Applicant: INTELLECTUAL PROPERTY HOLDINGS 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Manish R. Apte, Hrishikesh A. Vidwans, Michael F. Brown
  • Patent number: 8921953
    Abstract: The present invention generally relates to methods for producing MEMS or NEMS devices and the devices themselves. A thin layer of a material having a lower recombination coefficient as compared to the cantilever structure may be deposited over the cantilever structure, the RF electrode and the pull-off electrode. The thin layer permits the etching gas introduced to the cavity to decrease the overall etchant recombination rate within the cavity and thus, increase the etching rate of the sacrificial material within the cavity. The etchant itself may be introduced through an opening in the encapsulating layer that is linearly aligned with the anchor portion of the cantilever structure so that the topmost layer of sacrificial material is etched first. Thereafter, sealing material may seal the cavity and extend into the cavity all the way to the anchor portion to provide additional strength to the anchor portion.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: December 30, 2014
    Assignee: Cavendish Kinetics, Inc.
    Inventors: Mickael Renault, Joseph Damian Gordon Lacey, Vikram Joshi, Thomas L. Maguire
  • Publication number: 20140340814
    Abstract: In a MEMS device, the manner in which the membrane lands over the RF electrode can affect device performance. Bumps or stoppers placed over the RF electrode can be used to control the landing of the membrane and thus, the capacitance of the MEMS device. The shape and location of the bumps or stoppers can be tailored to ensure proper landing of the membrane, even when over-voltage is applied. Additionally, bumps or stoppers may be applied on the membrane itself to control the landing of the membrane on the roof or top electrode of the MEMS device.
    Type: Application
    Filed: September 4, 2012
    Publication date: November 20, 2014
    Applicant: CAVENDISH KINETICS, INC.
    Inventors: Robertus Petrus Van Kampen, Anartz Unamuno, Richard L. Knipe, Vikram Joshi, Roberto Gaddi, Toshiyuki Nagata
  • Patent number: 8874823
    Abstract: Systems and methods for managing data input/output operations are described. In one aspect, a device driver identifies a data read operation generated by a virtual machine in a virtual environment. The device driver is located in the virtual machine and the data read operation identifies a physical cache address associated with the data requested in the data read operation. A determination is made regarding whether data associated with the data read operation is available in a cache associated with the virtual machine.
    Type: Grant
    Filed: February 15, 2011
    Date of Patent: October 28, 2014
    Assignee: Intellectual Property Holdings 2 LLC
    Inventors: Vikram Joshi, Yang Luan, Manish R. Apte, Hrishikesh A. Vidwans, Michael F. Brown
  • Patent number: 8861218
    Abstract: Embodiments disclosed herein generally include using a large number of small MEMS devices to replace the function of an individual larger MEMS device or digital variable capacitor. The large number of smaller MEMS devices perform the same function as the larger device, but because of the smaller size, they can be encapsulated in a cavity using complementary metal oxide semiconductor (CMOS) compatible processes. Signal averaging over a large number of the smaller devices allows the accuracy of the array of smaller devices to be equivalent to the larger device. The process is exemplified by considering the use of a MEMS based accelerometer switch array with an integrated analog to digital conversion of the inertial response. The process is also exemplified by considering the use of a MEMS based device structure where the MEMS devices operate in parallel as a digital variable capacitor.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: October 14, 2014
    Assignee: Cavendish Kinetics Inc.
    Inventors: Charles Gordon Smith, Richard L. Knipe, Vikram Joshi, Roberto Gaddi, Anartz Unamuno, Robertus Petrus Van Kampen
  • Publication number: 20140300249
    Abstract: Embodiments of the present invention generally relate to a MEMS device that is anchored using the layer that is deposited to form the cavity sealing layer and/or with the layer that is deposited to form the pull-off electrode. The switching element of the MEMS device will have a flexible or movable portion and will also have a fixed or anchor portion that is electrically coupled to ground. The layer that is used to seal the cavity in which the switching element is disposed can also be coupled to the fixed or anchor portion of the switching element to anchor the fixed or anchor portion within the cavity. Additionally, the layer that is used to form one of the electrodes may be used to provide additional leverage for anchoring the fixed or anchor portion within the cavity. In either situation, the movement of the flexible or movable portion is not hindered.
    Type: Application
    Filed: August 31, 2012
    Publication date: October 9, 2014
    Applicant: CAVENDISH KINETICS, INC.
    Inventors: Robertus Petrus Van Kampen, Mickael Renault, Vikram Joshi, Richard L. Knipe, Anartz Unamuno