Abstract: A three-dimensional (“3-D”) memory capacitor comprises a bottom electrode, a ferroelectric thin film, and a top electrode that conform to a 3-D surface of an insulator layer. The capacitance area is greater than the horizontal footprint area of the capacitor. Preferably, the footprint of the capacitor is less than 0.2 nm2, and the corresponding capacitance area is typically in a range of from 0.4 nm2 to 1.0 nm2 The ferroelectric thin film preferably has a thickness not exceeding 60 nm. A capacitor laminate including the bottom electrode, ferroelectric thin film, and the top electrode preferably has a thickness not exceeding 200 nm. A low-thermal-budget MOCVD method for depositing a ferroelectric thin film having a thickness in a range of from 30 nm to 90 nm includes an RTP treatment before depositing the top electrode and an RTP treatment after depositing the top electrode and etching the ferroelectric layer.

Abstract: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of a metal oxide, such as a ferroelectric layered superlattice material, in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following chemical compounds: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide. The hydrogen barrier layer is amorphous and is made by a MOCVD process at a temperature of 450° C. or less. A supplemental hydrogen barrier layer comprising a material selected from the group consisting of silicon nitride and a crystalline form of one of said hydrogen barrier layer materials is formed adjacent to said hydrogen diffusion barrier.

Abstract: An improved method, mechanism, and system for implementing, generating, and maintaining records, such as redo records and redo logs in a database system, are disclosed. Multiple sets of records may be created and combined into a partially ordered (or non-ordered) group of records, which are later collectively ordered or sorted as needed to create an fully ordered set of records. With respect to a database system, redo generation bottleneck is minimized by providing multiple in-memory redo buffers that are available to hold redo records generated by multiple threads of execution. When the in-memory redo buffers are written to a persistent storage medium, no specific ordering needs to be specified with respect to the redo records from the different in-memory redo buffers. While the collective group of records may not be ordered, the written-out redo records may be partially ordered based upon the ordered redo records from within individual in-memory redo buffers.

Abstract: A portable sensor device incorporates a low-power, nanostructure sensor coupled to a wireless transmitter. The sensor uses a nanostructure conducting channel, such as a nanotube network, that is functionalized to respond to a selected analyte. A measurement circuit connected to the sensor determines a change in the electrical characteristic of the sensor, from which information concerning the present or absence of the analyte may be determined. The portable sensor device may include a portable power source, such as a battery. It may further include a transmitter for wirelessly transmitting data to a base station.

Abstract: In the manufacture of an integrated circuit, a first electrode (48) is formed on a substrate (28). In a first embodiment, a strontium bismuth tantalate layer (50) and a second electrode (52) are formed on top of the first electrode (48). Prior to the final crystallization anneal, the first electrode (48), the strontium bismuth tantalate layer (50) and the second electrode (52) are patterned. The final crystallization anneal is then performed on the substrate (28). In a second embodiment, a second layer (132) of strontium bismuth tantalate is deposited on top of the strontium bismuth tantalate layer (50) prior to the forming of the second electrode (52) on top of the first and second layers (50), (132). In a third embodiment, a carefully controlled UV baking process is performed on the strontium bismuth tantalate layer (50).

Abstract: A method and mechanism is disclosed for implementing transaction logging in a database system. In-memory undo records are maintained to log undo information for the database system. Redo records are batch processed, with multiple redo records for a transaction stored on disk at commit time.

Abstract: A capnometer adaptor includes a nanostructure sensor configured to selectively respond to a gaseous constituent of exhaled breath, such as to carbon dioxide. The sensor may be provided as a compact and solid-state device, and may be adapted for a variety of respiratory monitoring applications.

Abstract: A ferroelectric memory 636 includes a group of memory cells (645, 12, 201, 301, 401, 501), each cell having a ferroelectric memory element (44, 218, etc.), a drive line (122, 322, 422, 522 etc.) on which a voltage for writing information to the group of memory cells is placed, a bit line (25, 49, 125, 325, 425, 525, etc.) on which information to be read out of the group of memory cells is placed, a preamplifier (20, 42, 120, 320, 420, etc.) between the memory cells and the bit line, a set switch (14, 114, 314, 414, 514, etc.) connected between the drive line and the memory cells, and a reset switch (16, 116, 316, 416, 516, etc.) connected to the memory cells in parallel with the preamplifier. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.

Abstract: A nanoelectronic device includes a nanostructure, such as a nanotube or network of nanotubes, disposed on a substrate. Nanoparticles are disposed on or adjacent to the nanostructure so as to operatively effect the electrical properties of the nanostructure. The nanoparticles may be composed of metals, metal oxides, or salts, and nanoparticles composed of different materials may be present. The amount of nanoparticles may be controlled to preserve semiconductive properties of the nanostructure, and the substrate immediately adjacent to the nanostructure may remain substantially free of nanoparticles. A method for fabricating the device includes electrodeposition of the nanoparticles using one or more solutions of dissolved ions while providing an electric current to the nanostructures but not to the surrounding substrate.

Abstract: In the manufacture of an integrated circuit memory cell, a strontium bismuth tantalate or strontium bismuth tantalum niobate thin film layer (50) is deposited on a substrate (28, 49) and a carefully controlled UV baking process is performed on the strontium bismuth tantalate layer (50) prior to the deposition of an ultra-thin bismuth tantalate layer (51). A second electrode (52) is formed on top of the ultra-thin bismuth tantalate layer (51).

Abstract: A ferroelectric memory includes a group of memory cells, each cell having a ferroelectric memory element, a drive line on which a voltage for writing information to the group of memory cells is placed, and a bit line on which information to be read out of the group of memory cells is placed. The memory is read by placing a voltage less than the coercive voltage of the ferroelectric memory element across a memory element. A preamplifier is connected between the memory cells and the bit line. A set switch is connected between the drive line and the memory cells, and a reset switch is connected to the memory cells in parallel with the preamplifier. Prior to reading, noise from the group of cells is discharged by grounding both electrodes of the ferroelectric memory element.

Abstract: A high dielectric constant insulator including a thin film of a metal oxide selected from the group consisting of tungsten-bronze-type oxides, pyrochlore-type oxides, and combinations of Bi2O3 with an oxide selected from the group consisting of perovskites and pyrochlore-type oxides. An embodiment contains metal oxides represented by the general stoichiometric formulas AB2O6, A2B2O7 and A2Bi2B2O10, wherein A represents A-site atoms selected from the group of metals consisting of Ba, Bi, Sr, Pb, Ca, K, Na and La; and B represents B-site atoms selected from the group of metals consisting of Ti, Zr, Ta, Hf, Mo, W and Nb. Preferably, the metal oxides are (BaxSr1?x)(TayNb1?y)2O6, where 0?y?1.0 and 0?y?1.0; (BaxSr1?x)2(TayNb1?y)2O7, where 0?x?1.0 and 0?y?1.0; and (BaxSr1?x)2Bi2(TayNb1?y)2O10, where 0?x?1.0 and 0?y?1.0. Thin films according to the invention have a relative dielectric constant ?40, and preferably about 100. The value of Vcc in the metal oxides of the invention is close to zero.

Abstract: A method and apparatus for debugging a software program is provided that is non-intrusive and allows multiple persons to debug concurrently in view private sessions. In one example, a method includes preserving a memory state of a portion of a software program, such as a database system. A second software program is compiled and dynamically linked, and which when executed, would normally cause modification to targeted data in the preserved portion of the software program. The second software program is executed by making a copy of the targeted data in the preserved portion of the software program. The copy is modified to generate a modified copy of the targeted data without modifying the data that is in the preserved portion of the software program. In subsequent accesses, the user that issued that executed the second software program accesses the modified copy whenever the user would have otherwise accessed the corresponding preserved portion.

Abstract: A ferroelectric memory (436) includes a plurality of memory cells (73, 82, 100) each containing a ferroelectric thin film (15) including a microscopically composite material having a ferroelectric component (18) and a dielectric component (19), the dielectric component being a different chemical compound than the ferroelectric component. The dielectric component is preferably a fluxor, i.e., a material having a higher crystallization velocity than the ferroelectric component. The addition of the fluxor permits a ferroelectric thin film to be crystallized at a temperature of between 400° C. and 550° C.

Abstract: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of a metal oxide, such as a ferroelectric layered superlattice material, in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following chemical compounds: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide. The hydrogen barrier layer is amorphous and is made by a MOCVD process at a temperature of 450° C. or less. A supplemental hydrogen barrier layer comprising a material selected from the group consisting of silicon nitride and a crystalline form of one of said hydrogen barrier layer materials is formed adjacent to said hydrogen diffusion barrier.

Abstract: A precursor for forming a thin film of layered superlattice material is applied to an integrated circuit substrate. The precursor coating is heated using rapid thermal processing (RTP) with a ramping rate of 100° C./second at a hold temperature in a range of from 500° C. to 900° C. for a cumulative heating time not exceeding 30 minutes, and preferably less than 5 minutes. In fabricating a ferroelectric memory cell, the coating is heated in oxygen using RTP, then a top electrode layer is formed, and then the substrate including the coating is heated using RTP in oxygen or in nonreactive gas after forming the top electrode layer. The thin film of layered superlattice material preferably comprises strontium bismuth tantalate or strontium bismuth tantalum niobate, and preferably has a thickness in a range of from 25 nm to 120 nm. The process of fabricating a thin film of layered superlattice material typically has a thermal budget value not exceeding 960,000° C.

Abstract: An improved method, mechanism, and system for implementing, generating, and maintaining records, such as redo records and redo logs in a database system, are disclosed. Multiple sets of records may be created and combined into a partially ordered (or non-ordered) group of records, which are later collectively ordered or sorted as needed to create an fully ordered set of records. With respect to a database system, redo generation bottleneck is minimized by providing multiple in-memory redo buffers that are available to hold redo records generated by multiple threads of execution. When the in-memory redo buffers are written to a persistent storage medium, no specific ordering needs to be specified with respect to the redo records from the different in-memory redo buffers. While the collective group of records may not be ordered, the written-out redo records may be partially ordered based upon the ordered redo records from within individual in-memory redo buffers.

Abstract: A hydrogen diffusion barrier in an integrated circuit is located to inhibit diffusion of hydrogen to a thin film of a metal oxide, such as a ferroelectric layered superlattice material, in an integrated circuit. The hydrogen diffusion barrier comprises at least one of the following chemical compounds: strontium tantalate, bismuth tantalate, tantalum oxide, titanium oxide, zirconium oxide and aluminum oxide. The hydrogen barrier layer is amorphous and is made by a MOCVD process at a temperature of 450° C. or less. A supplemental hydrogen barrier layer comprising a material selected from the group consisting of silicon nitride and a crystalline form of one of said hydrogen barrier layer materials is formed adjacent to said hydrogen diffusion barrier.

Abstract: A three-dimensional (“3-D”) memory capacitor comprises a bottom electrode, a ferroelectric thin film, and a top electrode that conform to a 3-D surface of an insulator layer. The capacitance area is greater than the horizontal footprint area of the capacitor. Preferably, the footprint of the capacitor is less than 0.2 nm2, and the corresponding capacitance area is typically in a range of from 0.4 nm2 to 1.0 nm2 The ferroelectric thin film preferably has a thickness not exceeding 60 nm. A capacitor laminate including the bottom electrode, ferroelectric thin film, and the top electrode preferably has a thickness not exceeding 200 nm. A low-thermal-budget MOCVD method for depositing a ferroelectric thin film having a thickness in a range of from 30 nm to 90 nm includes an RTP treatment before depositing the top electrode and an RTP treatment after depositing the top electrode and etching the ferroelectric layer.

Abstract: A ferroelectric memory (436) includes a plurality of memory cells (73, 82, 100) each containing a ferroelectric thin film (15) including a microscopically composite material having a ferroelectric component (18) and a dielectric component (19), the dielectric component being a different chemical compound than the ferroelectric component. The dielectric component is preferably a fluxor, i.e., a material having a higher crystallization velocity than the ferroelectric component. The addition of the fluxor permits a ferroelectric thin film to be crystallized at a temperature of between 400° C. and 550° C.