Abstract: A method and apparatus for ray tracing may include using texture pipeline hardware of a GPU to perform ray intersection testing for a first ray and a first shape. Using the texture pipeline hardware to perform ray intersection testing may include calculating a plurality of dot products with the texture pipeline hardware, and determining whether the first ray intersects the first shape based on the plurality of dot products.

Abstract: A distributed computing system includes a primary device and one or more backend devices. The primary device provides a management interface for the distributed computing system. A plurality of applications may be installed on the backend devices for execution. The primary device generates registration data that associates the applications with management interface commands or configuration parameters in response to messages received from the applications. Subsequently, when the primary device receives a particular command at the management interface, the primary device identifies, based on the registration data, a particular application from among the plurality of applications. In response to identifying the application, the primary device may send to the application an outgoing message.

Abstract: Techniques are described for stereoscopic view generation. A graphics processing unit (GPU) may combine attribute information for two or more corresponding vertices of corresponding primitives in different views. The GPU may process the combined attributed information to generate graphics data for the stereoscopic view.

Abstract: A graphics processing unit (GPU) comprises a memory, and at least one processor configured to: receive a primitive type buffer comprising a plurality of primitive type entries, wherein each of a plurality of vertices of a vertex buffer of the GPU are associated with one or more of the plurality of primitive type entries, determine primitives based on the plurality of vertices and the associated one or more primitive type entries, and rendering, by the GPU, the primitives based on the plurality of vertices and the associated one or more primitive type entries of the primitive type buffer.

Abstract: Aspects of this disclosure generally relate to a process for rendering graphics that includes performing, with a hardware shading unit of a graphics processing unit (GPU) designated for vertex shading, vertex shading operations to shade input vertices so as to output vertex shaded vertices, wherein the hardware unit is configured to receive a single vertex as an input and generate a single vertex as an output. The process also includes performing, with the hardware shading unit of the GPU, a geometry shading operation to generate one or more new vertices based on one or more of the vertex shaded vertices, wherein the geometry shading operation operates on at least one of the one or more vertex shaded vertices to output the one or more new vertices.

Abstract: Embodiments include an apparatus, a computer readable medium and a method for distributing tessellations within an accelerated processing device (APD) including at least two compute units. Embodiments include processing a plurality of patches in a first compute unit using a hull shader to generate hull shader output data. Once generated, hull shader output data is stored to an off-chip memory when tessellation factors associated with the shader program are greater than a configured threshold. Once stored in the off-chip memory, at least a portion of the hull shader output data is dynamically processed using a second compute unit.

Abstract: This disclosure describes techniques for performing filtering in a graphics processing unit (GPU), The GPU may include a texture engine and a texture memory configured to store pixels and filter coefficients and at least one processor. The at least one processor may be configured to: store filter coefficients as a texture memory object (TMO) in the texture memory accessible to the texture engine in response to a first instruction, retrieve the filter coefficients from the texture memory in response to a second instruction, store pixels from the texture memory in a texture cache of the texture engine in response to the second instruction, and filter the pixels using the retrieved filter coefficients.

Abstract: The present disclosure provides for path rendering including receiving, with a graphics processing unit (GPU), data indicative of a path segment of a path to be rendered. The systems and methods render the path segment by performing a fill of the path segment, which includes tessellating the path segment into a first plurality of primitives including a triangle per primitive, storing a first plurality of primitives in a stencil buffer, and drawing a bounding box of the path segment and rendering the bounding box with a stencil test enabled. The systems and methods also stroke the path segment, including tessellating the path into a second plurality of primitives, re-tessellating the second plurality of primitives, cutting the second plurality of primitives according to a dash pattern, creating a cap at a location of a cut, and creating a triangulation of a stroke and rasterizing the stroke based on the triangulation.

Abstract: This disclosure describes a method for performing conservative rasterization in a processor comprising determining vertices of a primitive, defining edges of the primitive by determining a set of edge equations based on the determined vertices, wherein the edge equations are based on an edge shifting parameter plus an offset, determining pixels that touch the edges of the primitive using the determined edge equations, and rasterizing the primitive using the determined pixels.

Abstract: A method and apparatus for ray tracing may include using texture pipeline hardware of a GPU to perform ray intersection testing for a first ray and a first shape. Using the texture pipeline hardware to perform ray intersection testing may include calculating a plurality of dot products with the texture pipeline hardware, and determining whether the first ray intersects the first shape based on the plurality of dot products.

Abstract: Systems and methods for a tessellation are described. These systems and methods may divide the domain into a plurality of portions, including a first portion. The systems and methods may also determine coordinates for vertices for a first set of shapes that reside within the first portion, wherein each shape of the first set of shapes includes at least one vertex on a first edge of the first portion. After determining coordinates for the vertices for the first set of shapes, the systems and methods may determine coordinates for vertices for a second set of shapes that reside within the first portion. Each shape of the second set of shapes shares at least one vertex with at least one shape of the first set of shapes and none of the shapes of the second set of shapes includes a vertex on the first edge of the first portion.

Abstract: In an example rendering graphics data includes determining a stencil parameter that indicates a sampling rate for determining a coverage value for each antialiased pixel of a path of an image, determining, separately from the stencil parameter, a render target parameter that indicates a memory allocation for each antialiased pixel of the path, and rendering the path using the stencil parameter and the render target parameter.

Abstract: A graphics processing unit (GPU) includes an indexed streamout buffer. The indexed streamout buffer is configured to: receive vertex data of a primitive, and determine if any entries in a reuse table of the indexed streamout buffer reference the vertex data. Responsive to determining that an entry of in the reuse table references the vertex data, the buffer is further configured to: generate an index that references the vertex data, store the index in the buffer, and store a reference to the index in the reuse table. Responsive to determining that an entry does not reference the vertex data, the indexed streamout buffer is configured to: store the vertex data in the buffer, generate an index that references the vertex data, store the index in the buffer, and store a reference to the index in the reuse table.

Abstract: A tessellation unit of a graphics processing unit (GPU) determines domain coordinates for vertices of a received primitive. The tessellation unit outputs the determined domain coordinates for the vertices. The tessellation unit further determines that a domain type for the received primitive is not one of tri, isoline, or quad domain, and outputs information indicative of a graphical feature associated with one or more of the determined domain coordinates when the domain type is not one of the tri, isoline, or quad domain.

Abstract: This disclosure describes techniques for executing shader programs in a graphics processing unit (GPU). In some examples, the techniques for executing shader programs may include executing, with a shader unit of a graphics processor, a shader program that performs vertex shader processing and that generates multiple output vertices for each input vertex that is received by the shader program. In further examples, the techniques for executing shader programs may include executing a merged vertex/geometry shader program using a non-replicated mode of execution. The non-replicated mode of execution may involve assigning each of a plurality of primitives to one merged vertex/geometry shader program instance per primitive and causing each of the instances to output a plurality of vertices. In additional examples, the techniques for executing shader programs may include techniques for selecting one of a non-replicated mode and a replicated mode for executing a merged vertex/geometry shader program.

Abstract: The techniques are generally related to management of buffers with a management unit that resides within an integrated circuit that includes a graphics processing unit (GPU). The management unit may ensure proper access to the buffers by the programmable compute units of the GPU to allow the GPU to execute kernels on the programmable compute units in a pipeline fashion.

Abstract: A system and method are presented by which data on a graphics processing unit (GPU) can be output to one or more buffers with independent output frequencies. In one embodiment, a GPU includes a shader processor configured to respectively emit a plurality of data sets into a plurality of streams in parallel. Each data is emitted into at least a portion of its respective stream. Also included is a first number of counters configured to respectively track the emitted data sets.

Abstract: A texture pipe of a graphics processing unit (GPU) may receive a texture data. The texture pipe may perform a block-based operation on the texture data, wherein the texture data comprises one or more blocks of texels. Shader processors of the GPU may process graphics data concurrently with the texture pipe performing the block-based operation. The texture pipe may output a result of performing the block-based operation on the one or more texture data.

Abstract: A system, method, and computer program product are provided for tessellation using shaders. New graphics pipeline stages implemented by shaders are introduced, including an inner ring shader, an outer edge shader, and topologic shader, which work together with a domain shader and geometry shader to provide tessellated points and primitives. A hull shader is modified to compute values used by the new shaders to perform tessellation algorithms. This approach provides parallelism and customizability to the presently static tessellation engine implementation.

Abstract: This disclosure describes techniques for rendering a plurality of primitives that includes at least two different types of primitives during the execution of a single draw call command. This disclosure also describes techniques for rendering a plurality of primitives using tessellation domains of different tessellation domain types during the execution of a single draw call command. The techniques of this disclosure may, in some examples, reduce the complexity and processing overhead for user applications, reduce the number of times that the rendering state of the graphics rendering pipeline needs to be switched during the drawing of a graphics scene, and/or reduce the number of times that shader programs need to be reloaded into different processing stages of a graphics pipeline during the rendering of a graphics scene.