Patents by Inventor Vladimir Odnoblyudov

Vladimir Odnoblyudov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10355120
    Abstract: A method for making a multilayered device on an engineered substrate having a substrate coefficient of thermal expansion includes growing a buffer layer on the engineered substrate, and growing a first epitaxial layer on the buffer layer. The first epitaxial layer is characterized by an epitaxial coefficient of thermal expansion substantially equal to the substrate coefficient of thermal expansion.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: July 16, 2019
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Steve Lester, Ozgur Aktas
  • Patent number: 10347609
    Abstract: Solid state transducer (“SST”) assemblies with remote converter material and improved light extraction efficiency and associated systems and methods are disclosed herein. In one embodiment, an SST assembly has a front side from which emissions exit the SST assembly and a back side opposite the front side. The SST assembly can include a support substrate having a forward-facing surface directed generally toward the front side of the SST assembly and an SST structure carried by the support substrate. The SST structure can be configured to generate SST emissions. The SST assembly can further include a converter material spaced apart from the SST structure. The forward-facing surface and the converter material can be configured such that at least a portion of the SST emissions that exit the SST assembly at the front side do not pass completely through the converter material.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: July 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Patent number: 10347614
    Abstract: Solid state transducers with state detection, and associated systems and methods are disclosed. A solid state transducer system in accordance with a particular embodiment includes a support substrate and a solid state emitter carried by the support substrate. The solid state emitter can include a first semiconductor component, a second semiconductor component, and an active region between the first and second semiconductor components. The system can further include a state device carried by the support substrate and positioned to detect a state of the solid state emitter and/or an electrical path of which the solid state emitter forms a part. The state device can be formed from at least one state-sensing component having a composition different than that of the first semiconductor component, the second semiconductor component, and the active region. The state device and the solid state emitter can be stacked along a common axis.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: July 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov
  • Publication number: 20190198311
    Abstract: A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.
    Type: Application
    Filed: February 27, 2019
    Publication date: June 27, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 10333039
    Abstract: Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: June 25, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert
  • Publication number: 20190189597
    Abstract: Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.
    Type: Application
    Filed: February 12, 2019
    Publication date: June 20, 2019
    Inventors: Scott D. Schellhammer, Vladimir Odnoblyudov, Jeremy S. Frei
  • Patent number: 10326043
    Abstract: Semiconductor device assemblies having solid-state transducer (SST) devices and associated semiconductor devices, systems, and are disclosed herein. In one embodiment, a method of forming a semiconductor device assembly includes forming a support substrate, a transfer structure, and a plurality semiconductor structures between the support substrate and the transfer structure. The method further includes removing the support substrate to expose an active surface of the individual semiconductor structures and a trench between the individual semiconductor structures. The semiconductor structures can be attached to a carrier substrate that is optically transmissive such that the active surface can emit and/or receive the light through the carrier substrate. The individual semiconductor structures can then be processed on the carrier substrate with the support substrate removed.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: June 18, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Martin F. Schubert, Vladimir Odnoblyudov, Scott D. Schellhammer
  • Publication number: 20190181318
    Abstract: A wafer-level process for manufacturing solid state lighting (“SSL”) devices using large-diameter preformed metal substrates is disclosed. A light emitting structure is formed on a growth substrate, and a preformed metal substrate is bonded to the light emitting structure opposite the growth substrate. The preformed metal substrate can be bonded to the light emitting structure via a metal-metal bond, such as a copper-copper bond, or with an inter-metallic compound bond.
    Type: Application
    Filed: February 6, 2019
    Publication date: June 13, 2019
    Inventor: Vladimir Odnoblyudov
  • Publication number: 20190181121
    Abstract: An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 13, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Publication number: 20190172709
    Abstract: A method of forming a plurality of devices on an engineered substrate structure includes forming an engineered substrate by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core with a first adhesion shell, encapsulating the first adhesion shell with a barrier layer, forming a bonding layer on the barrier layer, and forming a substantially single crystal layer coupled to the bonding layer. The method further comprises forming a buffer layer coupled to the substantially single crystal layer, forming one or more epitaxial III-V layers on the buffer layer according to requirements associated with the plurality of devices, and forming the plurality of devices on the substrate by removing a portion of the one or more epitaxial III-V layers disposed between the plurality of devices and removing a portion of the buffer layer disposed between the plurality of devices.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Dilip Risbud, Ozgur Aktas, Cem Basceri
  • Patent number: 10312378
    Abstract: A lateral junction field-effect transistor includes a substrate of a first conductivity type having a dopant concentration; a first semiconductor layer of the first conductivity type having a first dopant concentration lower than the dopant concentration and disposed on the substrate; a second semiconductor layer of a second conductivity type having a second dopant concentration, the second conductivity type being different from the first conductivity type, the second semiconductor layer disposed on the first semiconductor layer; a third semiconductor layer of the first conductivity type having a third dopant concentration, the third semiconductor layer disposed on the second semiconductor layer; a fourth semiconductor layer of the first conductivity type having a fourth dopant concentration lower than the dopant concentration, the fourth semiconductor layer disposed on the third semiconductor layer; a source region and a drain region disposed in the second semiconductor layer and on opposite sides of the thi
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: June 4, 2019
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Ozgur Aktas
  • Patent number: 10297445
    Abstract: A substrate includes a support structure comprising: a polycrystalline ceramic core; a first adhesion layer coupled to the polycrystalline ceramic core; a conductive layer coupled to the first adhesion layer; a second adhesion layer coupled to the conductive layer; and a barrier layer coupled to the second adhesion layer. The substrate also includes a silicon oxide layer coupled to the support structure, a substantially single crystalline silicon layer coupled to the silicon oxide layer, and an epitaxial III-V layer coupled to the substantially single crystalline silicon layer.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: May 21, 2019
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 10297731
    Abstract: Light emitting diode (LED) constructions comprise an LED having a pair of electrical contacts along a bottom surface. A lens is disposed over the LED and covers a portion of the LED bottom surface. A pair of electrical terminals is connected with respective LED contacts, are sized larger than the contacts, and connect with the lens material along the LED bottom surface. A wavelength converting material may be interposed between the LED and the lens. LED constructions may comprise a number of LEDs, where the light emitted by each LED differs from one another by about 2.5 nm or less. LED constructions are made by attaching 2 or more LEDs to a common wafer by adhesive layer, forming a lens on a wafer level over each LED to provide a rigid structure, removing the common wafer, forming the electrical contacts on a wafer level, and then separating the LEDs.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: May 21, 2019
    Assignee: Bridgelux, Inc.
    Inventors: Vladimir A. Odnoblyudov, R. Scott West
  • Patent number: 10290674
    Abstract: A gallium nitride based integrated circuit architecture includes a first electronic device including a first set of III-N epitaxial layers and a second electronic device including a second set of III-N epitaxial layers. The gallium nitride based integrated circuit architecture also includes one or more interconnects between the first electronic device and the second electronic device. The first electronic device and the second electronic device are disposed in a chip scale package.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: May 14, 2019
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Dilip Risbud, Cem Basceri
  • Publication number: 20190139859
    Abstract: An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.
    Type: Application
    Filed: November 2, 2018
    Publication date: May 9, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens, Ozgur Aktas
  • Patent number: 10281091
    Abstract: In various embodiments, lighting systems include a carrier having a plurality of conductive elements disposed thereon and a light-emitting array. The light-emitting array is disposed over the carrier and includes a plurality of light-emitting diodes (LEDs), each of which has at least two electrical contacts electrically connected to conductive elements.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: May 7, 2019
    Assignee: COOLEDGE LIGHTING INC.
    Inventors: Michael A. Tischler, Vladimir Odnoblyudov, David Keogh
  • Publication number: 20190122916
    Abstract: A semiconductor diode includes an engineered substrate including a substantially single crystal layer, a buffer layer coupled to the substantially single crystal layer, and a semi-insulating layer coupled to the buffer layer. The semiconductor diode also includes a first N-type gallium nitride layer coupled to the semi-insulating layer and a second N-type gallium nitride layer coupled to the first N-type gallium nitride layer. The first N-type gallium nitride layer has a first doping concentration and the second N-type gallium nitride layer has a second doping concentration less than the first doping concentration. The semiconductor diode further includes a P-type gallium nitride layer coupled to the second N-type gallium nitride layer, an anode contact coupled to the P-type gallium nitride layer, and a cathode contact coupled to a portion of the first N-type gallium nitride layer.
    Type: Application
    Filed: December 7, 2018
    Publication date: April 25, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Dilip Risbud, Ozgur Aktas, Cem Basceri
  • Publication number: 20190123241
    Abstract: Solid state lighting (“SSL”) devices with improved current spreading and light extraction and associated methods are disclosed herein. In one embodiment, an SSL device includes a solid state emitter (“SSE”) that has a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The SSL device can further include a first contact on the first semiconductor material and a second contact on the second semiconductor material and opposite the first contact. The second contact can include one or more interconnected fingers. Additionally, the SSL device can include an insulative feature extending from the first contact at least partially into the first semiconductor material. The insulative feature can be substantially aligned with the second contact.
    Type: Application
    Filed: December 21, 2018
    Publication date: April 25, 2019
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert
  • Publication number: 20190115208
    Abstract: A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.
    Type: Application
    Filed: October 16, 2018
    Publication date: April 18, 2019
    Applicant: QROMIS, Inc.
    Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
  • Patent number: 10256367
    Abstract: Various embodiments of SST dies and solid state lighting (“SSL”) devices with SST dies, assemblies, and methods of manufacturing are described herein. In one embodiment, a SST die includes a substrate material, a first semiconductor material and a second semiconductor material on the substrate material, an active region between the first semiconductor material and the second semiconductor material, and a support structure defined by the substrate material. In some embodiments, the support structure has an opening that is vertically aligned with the active region.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: April 9, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Vladimir Odnoblyudov, Martin F. Schubert