Patents by Inventor Wei-An HSIEH

Wei-An HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10211311
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a metal gate on a substrate and a spacer around the metal gate, in which the metal gate comprises a high-k dielectric layer, a work function metal layer, and a low-resistance metal layer. Next, part of the high-k dielectric layer is removed to form an air gap between the work function metal layer and the spacer.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: February 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hao-Ming Lee, Sheng-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 10208093
    Abstract: The present invention provides a plasmid, method and kit for producing heat labile enterotoxin B-subunit based on a Bacillus subtilis expression system. By comparing with the conventional method in the art, the present invention has the advantages of high safety, good yield, and simplified process and is therefore favorable for the commercialization object of heat labile enterotoxin B-subunit in the application of vaccine adjuvant.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: February 19, 2019
    Assignee: AGRICULTURAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jiunn-Horng Lin, Jyh-Perng Wang, Chien-Yu Fang, Zeng-Weng Chen, Ming-Wei Hsieh, Hao-Zhen Zeng, Jian-Fong Lai, Weng-Zeng Huang, Tzu-Ting Peng
  • Publication number: 20190043858
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Application
    Filed: August 30, 2017
    Publication date: February 7, 2019
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20190043964
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; removing the second gate structure and part of the fin-shaped structure to forma first trench; forming a dielectric layer into the first trench; and planarizing part of the dielectric layer to form a single diffusion break (SDB) structure. Preferably, the top surfaces of the SDB structure and the first gate structure are coplanar.
    Type: Application
    Filed: August 29, 2017
    Publication date: February 7, 2019
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Publication number: 20180374533
    Abstract: A refresh control method for a memory controller of a memory system is provided. The memory controller is connected with a memory. The memory includes plural memory banks. The refresh control method includes the following steps. Firstly, a refresh state of the memory device is read, and thus a refresh window is realized. Then, a refresh command is issued to the memory device according to the refresh state. The refresh command contains a memory bank number field and a memory bank count field. The memory bank count field indicates a first count. The first count of memory banks are selected from the plural memory banks of the memory device according to the memory bank number field and the first count. Moreover, a refresh operation is performed on the first count of memory banks.
    Type: Application
    Filed: June 19, 2018
    Publication date: December 27, 2018
    Inventors: Der-Ping Liu, Bo-Wei Hsieh
  • Patent number: 10163485
    Abstract: A memory module includes a memory interface circuit and a training signal generator. The memory interface circuit includes a plurality of terminals for communicating with a memory controller, and the terminals comprise at least a plurality of data terminals. The training signal generator is coupled to the memory interface circuit, and is arranged for generating a training signal to the memory controller through only a portion of the data terminals or a specific terminal instead of the data terminals when the memory module receives a training request from the memory controller.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: December 25, 2018
    Assignee: MEDIATEK INC.
    Inventors: Shang-Pin Chen, Bo-Wei Hsieh
  • Publication number: 20180365511
    Abstract: A method of speeding up image detection, adapted to increase a speed of detecting a target image and enhance efficiency of image detection, comprises the steps of capturing an image; retrieving a plurality of characteristic points of the image; creating a region of interest (ROI) centered at the characteristic points each; creating a plurality of search point scan windows corresponding to the ROIs, respectively; calculating target hit scores of the characteristic points and the search point scan windows; comparing the target hit scores of the characteristic points and the search point scan windows to obtain an ROI most likely to have a target image; calculating centroid coordinates of the ROI by a centroid shift weight equation; and narrowing a scope of ROI search according to a location of the centroid coordinates and reducing a displacement between the search points.
    Type: Application
    Filed: June 20, 2017
    Publication date: December 20, 2018
    Inventors: CHUN-WEI HSIEH, SHIH-CHE CHIEN, FENG-CHIA CHANG, CHIEN-HAO HSIAO
  • Publication number: 20180356734
    Abstract: A method to improve a lithographic process of imaging a portion of a design layout onto a substrate using a lithographic apparatus, the method including: computing a multi-variable cost function, the multi-variable cost function being a function a plurality of design variables that represent characteristics of the lithographic process; and reconfiguring one or more of the characteristics of the lithographic process by adjusting one or more of the design variables until a certain termination condition is satisfied; wherein a bandwidth of a radiation source of the lithographic apparatus is allowed to change during the reconfiguration.
    Type: Application
    Filed: November 30, 2016
    Publication date: December 13, 2018
    Applicants: CYMER, LLC, ASML NETHERLANDS B.V.
    Inventors: Willard Earl CONLEY, Wei-An HSIEH, Tsann-Bim CHIOU, Jason SHIEN
  • Publication number: 20180358266
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Chun-Tsen Lu, Shou-Wei Hsieh
  • Patent number: 10153210
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region; forming a shallow trench isolation (STI) around the first fin-shaped structure; forming a first oxide layer on the first fin-shaped structure; and then forming a second oxide layer on the first oxide layer and the STI.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: December 11, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Chun-Tsen Lu, Shou-Wei Hsieh
  • Publication number: 20180350938
    Abstract: A method for fabricating semiconductor device includes the steps of first forming a metal gate on a substrate and a spacer around the metal gate, in which the metal gate comprises a high-k dielectric layer, a work function metal layer, and a low-resistance metal layer. Next, part of the high-k dielectric layer is removed to form an air gap between the work function metal layer and the spacer.
    Type: Application
    Filed: May 21, 2018
    Publication date: December 6, 2018
    Inventors: Hao-Ming Lee, Sheng-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 10141228
    Abstract: A semiconductor device includes: a fin-shaped structure on a substrate; a single diffusion break (SDB) structure in the fin-shaped structure to divide the fin-shaped structure into a first portion and a second portion; a gate structure on the first portion; and a contact etch stop layer (CESL) adjacent to the gate structure and extending to cover the SDB structure.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: November 27, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Patent number: 10141044
    Abstract: A memory interface circuit includes a plurality of receivers and a signal detector. The plurality of receivers are arranged for receiving at least a clock signal and a plurality of command signals from a memory controller, respectively. The signal detector is arranged for detecting whether the memory interface circuit receives the clock signal or not to generate a detection result to enable or disable the plurality of receivers.
    Type: Grant
    Filed: August 25, 2016
    Date of Patent: November 27, 2018
    Assignee: MEDIATEK INC.
    Inventors: Shang-Pin Chen, Chia-Yu Chan, Bo-Wei Hsieh
  • Patent number: 10126841
    Abstract: An interactive system includes a handheld member and a display module. The handheld member has a first near field communication tag and a second near field communication tag. The first near field communication tag generates a first near field signal, and the second near field communication tag generates a second near field signal. The display module includes a near field sensing unit and a control unit. The near field sensing unit is for sensing the first near field signal or the second near field signal. The control unit is coupled to the near field sensing unit and selectively performs a first function when the near field sensing unit senses the first near field signal or performs a second function when the near field sensing unit senses the second near field signal.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: November 13, 2018
    Assignee: BenQ Corporation
    Inventor: Chia-Wei Hsieh
  • Patent number: 10128500
    Abstract: A preparation method of a lithium nickel manganese oxide cathode material of a battery includes steps of providing a nickel compound, a manganese compound, a first quantity of lithium compound, a second quantity of lithium compound and a compound containing metallic ions, mixing the nickel compound, the first quantity of lithium compound, dispersant and deionized water to produce first product solution, adding the manganese compound into the first product solution and mixing to produce second product solution, performing a first grinding to produce first precursor solution, mixing the second quantity of lithium compound, the compound containing the metallic ions and the first precursor solution, then performing a second grinding to produce second precursor solution, and calcining the second precursor solution to produce the lithium nickel manganese oxide cathode material of the battery, the formula of which is written by Li1.0+xNi0.5Mn1.5MyO4. Therefore, the activation energy of reaction can be reduced.
    Type: Grant
    Filed: July 23, 2015
    Date of Patent: November 13, 2018
    Assignee: ADVANCED LITHIUM ELECTROCHEMISTRY CO., LTD.
    Inventors: Chun-Ming Huang, Han-Wei Hsieh, Hsiang-Pin Lin
  • Patent number: 10109341
    Abstract: A memory controller is connected with a memory. The memory controller includes a clock signal pin and plural command pins. The clock signal pin is connected with the memory for transmitting a clock signal to the memory. The plural command pins are connected with the memory for transmitting a command signal to the memory. The command signal contains an entering self-refresh command and an entering power down command. The memory enters a self-refresh state when the entering self-refresh command is executed. The memory enters a power down state when the entering power down command is executed.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 23, 2018
    Assignee: MEDIATEK INC.
    Inventors: Bo-Wei Hsieh, Shang-Pin Chen
  • Publication number: 20180293026
    Abstract: A memory system includes a memory controller, a first memory device and a second memory device. The memory controller issues a first clock signal and a second clock signal. The memory controller transmits or receives a data signal. The first memory device receives the first clock signal and the second clock signal. The second memory device receives the first dock signal and the second clock signal. If a first mode register of the first memory device is in a first single-ended mode and a second mode register of the second memory device is in a second single-ended mode, the first memory device transmits or receives the data signal according to the first dock signal, and the second memory device transmits or receives the data signal according to the second clock signal.
    Type: Application
    Filed: March 26, 2018
    Publication date: October 11, 2018
    Inventors: Bo-Wei HSIEH, Chia-Yu CHAN, Shang-Pin CHEN
  • Patent number: 10096832
    Abstract: A preparation method of a battery composite material includes steps of providing phosphoric acid, a first metal source, a second metal source and water, processing a reaction of the first metal source, the second metal source, the phosphoric acid and the water to produce a first product, calcining the first product to produce a first precursor or a second precursor, among which each of the first precursor and the second precursor is a solid-solution containing first metal and second metal, and processing a reaction of the first precursor or the second precursor, and a first reactant to obtain a reaction mixture, and then calcining the reaction mixture to produce the battery composite material. As a result, the battery product has two stable charging and discharging platforms, such that the present invention achieves the advantages of enhancing the stability and the electric performance.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: October 9, 2018
    Assignee: ADVANCED LITHIUM ELECTROCHEMISTRY CO., LTD.
    Inventors: Han-Wei Hsieh, Hsiang-Pin Lin, Chen-Tsung Hung
  • Patent number: 10083728
    Abstract: A memory module, comprising: a first pin, arranged to receive a first signal; a second pin, arranged to receive a second signal; a first conducting path, having a first end coupled to the first pin; at least one memory chip, coupled to the first conducting path for receiving the first signal; a predetermined resistor, having a first terminal coupled to a second end of the first conducting path; and a second conducting path, having a first end coupled to second pin for conducting the second to a second terminal of the predetermined resistor; wherein the first signal and the second are synchronous and configured to be a differential signal, for enabling a selected memory chip from the at least one memory chip to be accessed.
    Type: Grant
    Filed: July 6, 2014
    Date of Patent: September 25, 2018
    Assignee: MediaTek Inc.
    Inventors: Yan-Bin Luo, Sheng-Ming Chang, Bo-Wei Hsieh, Ming-Shi Liou, Chih-Chien Hung, Shang-Pin Chen
  • Patent number: 10059749
    Abstract: The present invention provides proteins that are suitable to be used as the active ingredient in subunit vaccine against Mycoplasma spp. The present invention also provides a subunit vaccine made therefrom. Said proteins have been experimentally proved to have the capability of inducing sufficient immune response to avoid pigs from Mycoplasma spp. infection. Said vaccine may have one of said proteins as active ingredient; or may have two or more of said proteins and is formulated as a cocktail vaccine. The present vaccine not only is safer than the conventional vaccines but also has equal or even better immune efficiency than the conventional ones. Furthermore, fusion partners suitable for producing said proteins of high solubility are also proved, which can significantly reduce production cost.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: August 28, 2018
    Assignee: AGRICULTURAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jiunn-Horng Lin, Jyh-Perng Wang, Zeng-Weng Chen, Chien-Yu Fang, Ming-Wei Hsieh, Ping-Cheng Yang