Patents by Inventor Wei-An HSIEH

Wei-An HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method for fabricating the same
    Patent number: 10943993
    Abstract: A method for fabricating semiconductor device includes: forming a fin-shaped structure on a substrate, wherein the fin-shaped structure is extending along a first direction; forming a gate layer on the fin-shaped structure; removing part of the gate layer and part of the fin-shaped structure to form a first trench for dividing the fin-shaped structure into a first portion and a second portion, wherein the first trench is extending along a second direction; forming a patterned mask on the gate layer and into the first trench; removing part of the gate layer and part of the fin-shaped structure to form a second trench, wherein the second trench is extending along the first direction; and filling a dielectric layer in the first trench and the second trench.
    Type: Grant
    Filed: April 29, 2019
    Date of Patent: March 9, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Refresh control method for memory system to perform refresh action on all memory banks of the memory system within refresh window
    Patent number: 10878879
    Abstract: A refresh control method for a memory controller of a memory system is provided. The memory controller is connected with a memory. The memory includes plural memory banks. The refresh control method includes the following steps. Firstly, a refresh state of the memory device is read, and thus a refresh window is realized. Then, a refresh command is issued to the memory device according to the refresh state. The refresh command contains a memory bank number field and a memory bank count field. The memory bank count field indicates a first count. The first count of memory banks are selected from the plural memory banks of the memory device according to the memory bank number field and the first count. Moreover, a refresh operation is performed on the first count of memory banks.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: December 29, 2020
    Assignee: MediaTek Inc.
    Inventors: Der-Ping Liu, Bo-Wei Hsieh
  • CATALYST FOR USE IN ESTERIFICATION REACTION AND METHOD FOR CATALYZING ESTERIFICATION REACTION
    Publication number: 20200398260
    Abstract: A catalyst for use in esterification reaction is provided. The catalyst is formed by reacting a mixture including at least one first compound and at least one second compound. The at least one first compound is a metal alkoxide, an inorganic metal salt, a metal carboxylate salt, an inorganic metal compound, or a combination thereof, and each foregoing compound has titanium, aluminum, zirconium, hafnium, zinc, or bismuth. The at least one second compound is an alpha hydroxyl acid, an alkyl ester formed by an alpha hydroxyl acid and an alcohol, an alkyl amide formed by an alpha hydroxyl acid and an amine, an amino acid, an alkyl ester formed by an amino acid and an alcohol, an alkyl amide formed by an amino acid and an amine, or a combination thereof.
    Type: Application
    Filed: May 11, 2020
    Publication date: December 24, 2020
    Inventors: Chia-Wei HSIEH, Yun-Hsuan CHUANG, Chun-Han SHIH, Fu-Ming TSUO
  • Memory device, memory controller and associated memory system operated according to selected clock signals
    Patent number: 10846018
    Abstract: A memory system includes a memory controller, a first memory device and a second memory device. The memory controller issues a first clock signal and a second clock signal. The memory controller transmits or receives a data signal. The first memory device receives the first clock signal and the second clock signal. The second memory device receives the first dock signal and the second clock signal. If a first mode register of the first memory device is in a first single-ended mode and a second mode register of the second memory device is in a second single-ended mode, the first memory device transmits or receives the data signal according to the first dock signal, and the second memory device transmits or receives the data signal according to the second clock signal.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: November 24, 2020
    Assignee: MEDIATEK INC.
    Inventors: Bo-Wei Hsieh, Chia-Yu Chan, Shang-Pin Chen
  • Method of parity training for a DRAM supporting a link error checking and correcting functionality
    Patent number: 10810078
    Abstract: A method of parity training for a dynamic random access memory, DRAM, is disclosed. The method comprises enabling a link error checking and correcting, ECC, functionality in a write operation of the DRAM, and remapping a parity function of a write parity pin to an data inversion function, a data replacing function, or a logical function, whereby data transferred to the DRAM through the write parity pin is used for indicating an inversion operation, a logical operation, or a substitution operation for data of a data pin.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: October 20, 2020
    Assignee: MEDIATEK INC.
    Inventors: Bo-Wei Hsieh, Chia-Yu Chan, Ching-Yeh Hsuan, Jou-Ling Chen
  • SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
    Publication number: 20200312984
    Abstract: A method for fabricating semiconductor device includes: forming a fin-shaped structure on a substrate, wherein the fin-shaped structure is extending along a first direction; forming a gate layer on the fin-shaped structure; removing part of the gate layer and part of the fin-shaped structure to form a first trench for dividing the fin-shaped structure into a first portion and a second portion, wherein the first trench is extending along a second direction; forming a patterned mask on the gate layer and into the first trench; removing part of the gate layer and part of the fin-shaped structure to form a second trench, wherein the second trench is extending along the first direction; and filling a dielectric layer in the first trench and the second trench.
    Type: Application
    Filed: April 29, 2019
    Publication date: October 1, 2020
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Composition for preventing and treating infection, and method for producing said composition
    Patent number: 10758603
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: September 1, 2020
    Assignee: Agricultural Technology Research Institute
    Inventors: Jiunn-Horng Lin, Zeng-Weng Chen, Jyh-Perng Wang, Chiung-Wen Hsu, Weng-Zeng Huang, Ming-Wei Hsieh, Tzu-Ting Peng, Shih-Ling Hsuan
  • Contact structure
    Patent number: 10763116
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: September 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hong-Ying Lin, Cheng-Yi Wu, Alan Tu, Chung-Liang Cheng, Li-Hsuan Chu, Ethan Hsiao, Hui-Lin Sung, Sz-Yuan Hung, Sheng-Yung Lo, C. W. Chiu, Chih-Wei Hsieh, Chin-Szu Lee
  • SEMICONDUCTOR DEVICE
    Publication number: 20200203523
    Abstract: A semiconductor device includes: a fin-shaped structure on the substrate; a shallow trench isolation (STI) around the fin-shaped structure; a single diffusion break (SDB) structure in the fin-shaped structure for dividing the fin-shaped structure into a first portion and a second portion; a first gate structure on the fin-shaped structure; a second gate structure on the STI; and a third gate structure on the SDB structure, wherein a width of the third gate structure is greater than a width of the second gate structure.
    Type: Application
    Filed: January 21, 2019
    Publication date: June 25, 2020
    Inventors: Cheng-Han Wu, Hsin-Yu Chen, Chun-Hao Lin, Shou-Wei Hsieh, Chih-Ming Su, Yi-Ren Chen, Yuan-Ting Chuang
  • Method for protecting epitaxial layer by forming a buffer layer on NMOS region
    Patent number: 10692780
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first gate structure on the first region and a second gate structure on the second region; forming a first spacer around the first gate structure; forming a first epitaxial layer adjacent to two sides of the first spacer; forming a buffer layer on the first gate structure; and forming a contact etch stop layer (CESL) on the buffer layer on the first region and the second gate structure on the second region.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: June 23, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • METHOD FOR ENLARGING TIP PORTION OF A FIN-SHAPED STRUCTURE
    Publication number: 20200144256
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Application
    Filed: December 23, 2019
    Publication date: May 7, 2020
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • ANGLE SENSING DEVICE
    Publication number: 20200132433
    Abstract: An angle sensing device including a first object, a second object, a magnetic field source, and a first magnetic sensor is provided. The second object is adapted to be rotated with respect to the first object, so that an inclined angle of the second object with respect to the first object is changed. The magnetic field source is connected to the second object. The first magnetic sensor is connected to the first object, and configured to sense a magnetic field generated by the magnetic field source. When the second object is rotated with respect to the first object, the magnetic field sensed by the first magnetic sensor changes, so that an output signal of the first magnetic sensor corresponding to the magnetic field changes.
    Type: Application
    Filed: October 2, 2019
    Publication date: April 30, 2020
    Applicant: iSentek Inc.
    Inventors: Wei-An Hsieh, Fu-Te Yuan, Yen-Chi Lee
  • DELAY TRACKING METHOD AND MEMORY SYSTEM
    Publication number: 20200058335
    Abstract: A delay tracking method and a memory system are provided. The delay tracking method is applied to a memory system supporting a low-frequency-mode (LFM) and a high-frequency-mode (HFM) of an operating clock. The delay tracking method includes the steps of selecting a LFM oscillator for obtaining a LFM delay value when the operating clock is in the HFM; and selecting a HFM oscillator for obtaining a HFM delay value when the operating clock is in the LFM.
    Type: Application
    Filed: August 14, 2019
    Publication date: February 20, 2020
    Inventors: Bo-Wei HSIEH, Chia-Yu CHAN, Jou-Ling CHEN
  • Method for enlarging tip portion of a fin-shaped structure
    Patent number: 10566327
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a patterned mask on the second region; and performing a process to enlarge the first fin-shaped structure so that the top surfaces of the first fin-shaped structure and the second fin-shaped structure are different.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: February 18, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • NOVEL CONTACT STRUCTURE
    Publication number: 20200043739
    Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Hong-Ying LIN, Cheng-Yi WU, Alan TU, Chung-Liang CHENG, Li-Hsuan CHU, Ethan HSIAO, Hui-Lin SUNG, Sz-Yuan HUNG, Sheng-Yung LO, C.W. CHIU, Chih-Wei Hsieh, Chin-Szu LEE
  • COMPOSITION FOR PREVENTING AND TREATING MYCOPLASMA HYORHINIS INFECTION, AND METHOD FOR PRODUCING SAID COMPOSITION
    Publication number: 20200023048
    Abstract: Disclosed is a composition for preventing and treating a Mycoplasma hyorhinis infection in swine. The composition uses XylF, DnaK, P72, or a combination thereof as an active pharmaceutical ingredient. Further disclosed are an expression vector and a method for producing the active pharmaceutical ingredient of the composition using a prokaryotic expression system.
    Type: Application
    Filed: August 9, 2016
    Publication date: January 23, 2020
    Inventors: Jiunn-Horng LIN, Zeng-Weng CHEN, Jyh-Perng WANG, Chiung-Wen HSU, Weng-Zeng HUANG, Ming-Wei HSIEH, Tzu-Ting PENG, Shih-Ling HSUAN
  • Method of Parity Training for a DRAM Supporting a Link Error Checking and Correcting Functionality
    Publication number: 20200012558
    Abstract: A method of parity training for a dynamic random access memory, DRAM, is disclosed. The method comprises enabling a link error checking and correcting, ECC, functionality in a write operation of the DRAM, and remapping a parity function of a write parity pin to an data inversion function, a data replacing function, or a logical function, whereby data transferred to the DRAM through the write parity pin is used for indicating an inversion operation, a logical operation, or a substitution operation for data of a data pin.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 9, 2020
    Inventors: Bo-Wei Hsieh, Chia-Yu Chan, Ching-Yeh Hsuan, Jou-Ling Chen
  • Method for fabricating semiconductor device
    Patent number: 10522660
    Abstract: A method for fabricating semiconductor device includes the steps of: forming a fin-shaped structure on a substrate; forming a first gate structure and a second gate structure on the fin-shaped structure; forming an interlayer dielectric (ILD) layer around the first gate structure and the second gate structure; removing the second gate structure and part of the fin-shaped structure to forma first trench; forming a dielectric layer into the first trench; and planarizing part of the dielectric layer to form a single diffusion break (SDB) structure. Preferably, the top surfaces of the SDB structure and the first gate structure are coplanar.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: December 31, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • Method for fabricating semiconductor device
    Patent number: 10483395
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region; forming a first fin-shaped structure on the first region and a second fin-shaped structure on the second region; forming a first buffer layer on the first fin-shaped structure and the second fin-shaped structure; removing the first buffer layer on the first region; and performing a curing process so that a width of the first fin-shaped structure is different from a width of the second fin-shaped structure.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: November 19, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hao Lin, Hsin-Yu Chen, Shou-Wei Hsieh
  • LIFT ASSIST DEVICE
    Publication number: 20190321251
    Abstract: A lift assist device includes a base, a lifting mechanism and a fixing unit. The base stands on the ground. The lifting mechanism is disposed at the base and moves reciprocally along a lifting direction. The fixing unit is connected with and actuated by the lifting mechanism, and the fixing unit is configured to be fixed to the body of a user. The extension line of the lifting direction is not perpendicular to the ground.
    Type: Application
    Filed: August 28, 2018
    Publication date: October 24, 2019
    Inventors: YUN-PIN CHEN, YUN-WEI HSIEH, KUAN-CHUN CHEN