Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.

Abstract: A semiconductor package structure includes a semiconductor die and at least one pillar structure. The semiconductor die has an upper surface and includes at least one conductive pad disposed adjacent to the upper surface. The pillar structure is electrically connected to the conductive pad of the semiconductor die, and defines a recess portion recessed from a side surface of the pillar structure. A conductivity of the pillar structure is greater than a conductivity of the conductive pad.

Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.

Abstract: The present disclosure provides a semiconductor a semiconductor device package includes a substrate, an electronic component disposed on the substrate, a package body disposed on the substrate and encapsulating the electronic component, and a capacitor disposed above the electronic component. The capacitor is exposed from the package body.

Abstract: A delay tracking method and a memory system are provided. The delay tracking method is applied to a memory system supporting a low-frequency-mode (LFM) and a high-frequency-mode (HFM) of an operating clock. The delay tracking method includes the steps of selecting a LFM oscillator for obtaining a LFM delay value when the operating clock is in the HFM; and selecting a HFM oscillator for obtaining a HFM delay value when the operating clock is in the LFM.

Abstract: The present disclosure provides an antenna module. The antenna module includes an antenna layer, a ground layer, and an electronic component. The ground layer is disposed over the antenna layer. The electronic component is disposed between the antenna layer and the ground layer.

Abstract: A flyback power converter converts an input power on a primary side into an output power on a secondary side. On the secondary side, the output power is monitored to provide a representative signal representing a characteristic of the output power. A count is kept unchanged when a clock ticks if the representative signal is within a first range defined in accordance with a target value, that the representative signal is going to be regulated at. The count is changed in response to the clock if the representative signal is within a second range different from the first range. In response to the count, a driving current is generated to control a coupler, which generates a compensation signal on the primary side that controls power transmitted from the primary side to the secondary side.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes a device package and a shielding layer. The device package includes an electronic device unit and has a first surface, a second surface opposite to the first surface, and a third surface connecting the first surface to the second surface. The shielding layer is disposed on the first surface and the second surface of the device package. A common edge of the second surface and the third surface includes a first portion exposed from the shielding layer by a first length, and a common edge of the first surface and the third surface includes a second portion exposed from the shielding layer by a second length that is different from the first length.

Abstract: The present disclosure provides a semiconductor a semiconductor device package includes a substrate, an electronic component disposed on the substrate, a package body disposed on the substrate and encapsulating the electronic component, and a capacitor disposed above the electronic component. The capacitor is exposed from the package body.

Abstract: A semiconductor package structure and a method for manufacturing a semiconductor package structure are provided. The semiconductor package structure includes an electronic component, a conductive contact, and a first shielding layer. The electronic component has a first surface, a lateral surface angled with the first surface, and a second surface opposite to the first surface. The conductive contact is connected to the first surface of the electronic component. The first shielding layer is disposed on the lateral surface of the electronic component and a portion of the first surface of the electronic component. The first shielding layer contacts the conductive contact.

Abstract: A semiconductor device package includes an electronic component, an electrical contact and a reinforcement layer. The electronic component has a first conductive layer on a first surface of the electronic component. The electronic component has a through-silicon-via (TSV) penetrating the electronic component and electrically connected to the first conductive layer. The electrical contact is disposed on the first surface of the electronic component and electrically connected to the first conductive layer. The reinforcement layer is disposed on the first surface of the electronic component.

Abstract: A semiconductor package structure and method for manufacturing the same are provided. The semiconductor package structure includes a first electronic component, a conductive pillar, a second electronic component, and a conductive through via. The conductive pillar is disposed on the first electronic component and has a first surface facing away from the first electronic component. The second electronic component is disposed on the first electronic component. The conductive through via extends through the second electronic component and has a first surface facing away from the first electronic component. The first surface of the conductive through via and the first surface of the conductive pillar are substantially coplanar.

Abstract: The present disclosure provides an antenna module. The antenna module includes a first layer, a second layer, a first antenna, and a second antenna. The first layer has a first dielectric constant. The second layer is adjacent to the first layer. The second layer has a second Dk lower than the first Dk. The first antenna is disposed on the first layer and is configured for operating at a first frequency. The second antenna is disposed on the second layer and is configured for operating at a second frequency higher than the first frequency.

Abstract: A connector controller controls a connector with a power pin, a communication pin, and a ground pin. The connector detects the voltage at the communication pin at least twice to generate first and second voltages respectively. A bus power is supplied at the power pin. The first voltage is detected when a bus current to/from the bus power is about zero. The connector controller controls the bus power in response to a difference between the first and second voltage.

Abstract: A semiconductor device package includes an emitting device and a first building-up circuit. The emitting device defines a cavity in the emitting device. The first building-up circuit is disposed on the emitting device.

Abstract: A semiconductor device package includes a carrier, an emitting device, a first building-up circuit and a first package body. The carrier has a first surface, a second surface opposite to the first surface and a lateral surface extending from the first surface to the second surface. The emitting element is disposed on the first surface of carrier. The first building-up circuit is disposed on the second surface of the carrier. The first package body encapsulates the lateral surface of the carrier.

Abstract: A semiconductor device package includes a first circuit layer, a first emitting device and a second emitting device. The first circuit layer has a first surface and a second surface opposite to the first surface. The first emitting device is disposed on the second surface of the first circuit layer. The first emitting device has a first surface facing the first circuit layer and a second surface opposite to the first surface. The first emitting device has a first conductive pattern disposed on the first surface of the first emitting device. The second emitting device is disposed on the second surface of the first emitting device. The second emitting device has a first surface facing the second surface of the first emitting device and a second surface opposite to the first surface. The second emitting device has a second conductive pattern disposed on the second surface of the emitting device.

Abstract: A biological feature identification device includes a display device and a sensing device. The display device includes multiple pixels arranged along a first direction. The pixels each has a sub-pixel having a display element and a switch element. The sensing device includes multiple sensing units arranged along a second direction. The sensing units each has a sensing element. When the spatial frequency relation is |4*(RE/100)?(1/SU)|>A, the first and second directions are the same, and the biological feature identification device satisfy the criteria: A<|4*(RE/100)?(1/SU)|<B. When the spatial frequency relation is |4*(RE/100)?(1/SU)|?A, the first and second directions form an angle, and the biological feature identification device satisfy the criteria: A<|4*(RE/100)?{1/[SU*Cos(?)]}|<C. RE is the resolution of the display device, SU is the sensing unit size, ? is the angle, 0°<?<90°, B and C>A, and A is not equal to zero.

Abstract: A semiconductor device package includes a first circuit layer, a first emitting device and a second emitting device. The first circuit layer has a first surface and a second surface opposite to the first surface. The first emitting device is disposed on the second surface of the first circuit layer. The first emitting device has a first surface facing the first circuit layer and a second surface opposite to the first surface. The first emitting device has a first conductive pattern disposed on the first surface of the first emitting device. The second emitting device is disposed on the second surface of the first emitting device. The second emitting device has a first surface facing the second surface of the first emitting device and a second surface opposite to the first surface. The second emitting device has a second conductive pattern disposed on the second surface of the emitting device.

Abstract: A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.