Patents by Inventor Wei Chen

Wei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250143465
    Abstract: A height-adjustable folding chair comprises a first support, a second support, and a seat plate. A middle section of the first support is connected to a middle section of the second support through a hinge shaft, a lower section of the first support and a lower section of the second support each have a bending angle, and two ends of the seat plate are pivotally secured with a first support upper cross rod and a second support upper cross rod respectively. The seat plate has a side A and a side B. When the first support and the second support are unfolded in an X shape, a bent section of the first support and a bent section of the second support are bent facing each other or are bent facing away from each other.
    Type: Application
    Filed: January 10, 2025
    Publication date: May 8, 2025
    Applicant: GUANGZHOU GISILI BABY PRODUCTS CO., LTD
    Inventor: Wei CHEN
  • Publication number: 20250149392
    Abstract: A package substrate includes a core layer, at least one functional component, at least one spacer, a filler, a first and a second build-up structures. The core layer has at least one opening and multiple conductive through vias. The functional component is disposed in the openings. The spacer is disposed on the functional component. The filler is filled in the opening, covering the functional component and spacer, and completely filling the gap between the opening, the functional component and the spacer. The first build-up structure is disposed on a first surface of the core layer and a third surface of the filler, and electrically connected to the functional component and the conductive through vias. The second build-up structure is disposed on a second surface of the core layer and a fourth surface of the filler, contacts the spacer and electrically connected to the conductive through vias.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 8, 2025
    Applicant: Unimicron Technology Corp.
    Inventors: Chia Ching Wang, Chien-Chou Chen, Hsuan Ming Hsu, Ho-Shing Lee, Yunn-Tzu Yu, Yao Yu Chiang, Po-Wei Chen, Wei-Ti Lin, Wen Chi Chang
  • Publication number: 20250149509
    Abstract: In some embodiments, the present disclosure relates to a 3D integrated circuit (IC) stack that includes a first IC die bonded to a second IC die. The first IC die includes a first semiconductor substrate, a first interconnect structure arranged on a frontside of the first semiconductor substrate, and a first bonding structure arranged over the first interconnect structure. The second IC die includes a second semiconductor substrate, a second interconnect structure arranged on a frontside of the second semiconductor substrate, and a second bonding structure arranged on a backside of the second semiconductor substrate. The first bonding structure faces the second bonding structure. Further, the 3D IC stack includes a first backside contact that extends from the second bonding structure to the backside of the second semiconductor substrate and is thermally coupled to at least one of the first or second interconnect structures.
    Type: Application
    Filed: January 3, 2025
    Publication date: May 8, 2025
    Inventors: Min-Feng Kao, Dun-Nian Yaung, Hsing-Chih Lin, Jen-Cheng Liu, Yi-Shin Chu, Ping-Tzu Chen, Che-Wei Chen
  • Publication number: 20250149437
    Abstract: An interconnection structure includes a semiconductor substrate that is formed with a first metal trench and a second metal trench, a first metal via, a second metal via, a third metal trench and a fourth metal trench. The first metal via is disposed over and connected to the first metal trench. The second metal via is disposed over and connected to the second metal trench. The third metal trench is disposed over and connected to the first metal via. The fourth metal trench that is disposed over and connected to the second metal via. A thickness of the third metal trench is different from a thickness of the fourth metal trench.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Chen CHU, Chia-Chen LEE, Chia-Tien WU
  • Publication number: 20250149500
    Abstract: A method includes placing a first package component. The first package component includes a first alignment mark and a first dummy alignment mark. A second package component is aligned to the first package component. The second package component includes a second alignment mark and a second dummy alignment mark. The aligning is performed using the first alignment mark for positioning the first package component, and using the second alignment mark for position the second package component. The second package component is bonded to the first package component to form a package, with the first alignment mark being bonded to the second dummy alignment mark.
    Type: Application
    Filed: January 6, 2025
    Publication date: May 8, 2025
    Inventors: Hsien-Wei Chen, Ying-Ju Chen, Ming-Fa Chen
  • Publication number: 20250151100
    Abstract: A wireless local area network (WLAN) system includes a first Wi-Fi device and at least one second Wi-Fi device. When the first Wi-Fi device and the at least one second Wi-Fi device receive an interference signal that occupies a current operation channel of the first Wi-Fi device and a current operation channel of the at least one second Wi-Fi device, the first Wi-Fi device performs channel switching upon the current operation channel of the first Wi-Fi device, and the at least one second Wi-Fi device performs channel switching upon the current operation channel of the at least one second Wi-Fi device.
    Type: Application
    Filed: November 4, 2024
    Publication date: May 8, 2025
    Applicant: MEDIATEK INC.
    Inventors: Kuo-Wei Chen, Pochun Fang, Kai Ying Lu
  • Publication number: 20250149844
    Abstract: Some implementations described herein provide a laser device. The laser device includes a first portion of the laser device, at a proximal end of the laser device, that includes one or more optical devices, where the first portion is configured to emit first electromagnetic waves having a first wavelength. The laser device includes a second portion of the laser device, at a distal end of the laser device, that includes an optical crystal configured to receive the first electromagnetic waves and to emit second electromagnetic waves having a second wavelength based on reception of the first electromagnetic waves, where the optical crystal includes a thin film coating disposed on an end of the optical crystal, the thin film coating configured to: support emission of the second electromagnetic waves from the optical crystal, and support internal reflection of the first electromagnetic waves within the optical crystal.
    Type: Application
    Filed: December 27, 2024
    Publication date: May 8, 2025
    Inventors: Yu-Hua HSIEH, Ying-Yen TSENG, Wen-Yu KU, Kei-Wei CHEN
  • Patent number: 12294734
    Abstract: An electronic apparatus performs a method of coding video data. The method includes receiving, from a bitstream of the video data, a first syntax that indicates an affine motion model enabled for a current coding block, estimating parameters of the affine motion model using gradients of motion vectors of multiple spatial neighboring blocks of the current coding block, and constructing motion vectors of the affine motion model for the current coding block by using the estimated parameters. In some embodiments, constructing motion vectors further includes converting the estimated parameters into control point motion vectors (CPMVs), and adding the CPMVs into a current affine merge candidate list. In some embodiments, constructing motion vectors further includes deriving a motion vector predictor for an affine mode.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: May 6, 2025
    Assignee: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Wei Chen, Xiaoyu Xiu, Yi-Wen Chen, Tsung-Chuan Ma, Hong-Jheng Jhu, Xianglin Wang, Bing Yu
  • Patent number: 12293917
    Abstract: A chemical mechanical planarization system includes a chemical mechanical planarization pad that rotates during a chemical mechanical planarization process. A chemical mechanical planarization head places a semiconductor wafer in contact with the chemical mechanical planarization pad during the process. A slurry supply system supplies a slurry onto the pad during the process. A pad conditioner conditions the pad during the process. An impurity removal system removes debris and impurities from the slurry.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: May 6, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chien Hou, Po-Chin Nien, Chih Hung Chen, Ying-Tsung Chen, Kei-Wei Chen
  • Patent number: 12294030
    Abstract: A semiconductor structure includes a first pair of source/drain features (S/D), a first stack of channel layers connected to the first pair of S/D, a second pair of S/D, and a second stack of channel layers connected to the second pair of S/D. The first pair of S/D each include a first epitaxial layer having a first dopant, a second epitaxial layer having a second dopant and disposed over the first epitaxial layer and connected to the first stack of channel layers, and a third epitaxial layer having a third dopant and disposed over the second epitaxial layer. The second pair of S/D each include a fourth epitaxial layer having a fourth dopant and connected to the second stack of channel layers, and a fifth epitaxial layer having a fifth dopant and disposed over the fourth epitaxial layer. The first dopant through the fourth dopant are of different species.
    Type: Grant
    Filed: May 24, 2024
    Date of Patent: May 6, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Shih-Hao Lin, Chih-Hsuan Chen, Chia-Hao Pao, Chih-Chuan Yang, Chih-Yu Hsu, Hsin-Wen Su, Chia-Wei Chen
  • Patent number: 12291795
    Abstract: A susceptor assembly for supporting a crucible during a crystal growth process includes a susceptor base, a tubular sidewall connected to the susceptor base, and a removable sacrifice ring interposed between the susceptor base and the sidewall. Each of the susceptor base and the sidewall is formed of a carbon-containing material. The susceptor base has an annular wall and a shoulder extending radially outward from an outer surface of the annular wall. The sidewall has a first end that receives the annular wall to connect the sidewall to the susceptor base. The sacrifice ring has a first surface that faces the outer surface of the annular wall, a second surface that faces an interior surface of the sidewall, and a ledge extending outward from the second surface that engages the first end of the sidewall.
    Type: Grant
    Filed: September 7, 2022
    Date of Patent: May 6, 2025
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Hong-Huei Huang, Benjamin Michael Meyer, Chun-Sheng Wu, Wei-Chen Chou, Chen-Yi Lin, Feng-Chien Tsai
  • Patent number: 12290170
    Abstract: A slide rail assembly including a first rail, a second rail, a third rail, a first supporting device, and at least one supporting member is provided. The first rail includes a first end portion and a second end portion that are opposite to each other. The second rail is longitudinally movable relative to the first rail. The third rail is longitudinally movable relative to the second rail. The first supporting device exceeds the first end portion of the first rail for a predetermined longitudinal distance. The at least one supporting member is arranged on one of the second rail and the first supporting device.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: May 6, 2025
    Assignees: KING SLIDE WORKS CO., LTD., KING SLIDE TECHNOLOGY CO., LTD.
    Inventors: Ken-Ching Chen, Shun-Ho Yang, Wei-Chen Chang, Chun-Chiang Wang
  • Patent number: 12294156
    Abstract: An antenna device includes a substrate and four antenna units. The four antenna units are disposed on the substrate. Each of the four antenna units includes an L-shaped radiation portion, a hook-shaped coupling portion and a ground portion. The hook-shaped coupling portion is adjacent to the L-shaped radiation portion. The ground portion is disposed around the L-shaped radiation portion and the hook-shaped coupling portion. One end of the hook-shaped coupling portion is connected to the ground portion.
    Type: Grant
    Filed: June 5, 2023
    Date of Patent: May 6, 2025
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventors: Hsin-Hung Lin, Yu Shu Tai, Wei-Chen Cheng
  • Patent number: 12293922
    Abstract: The present application provides a reworking method of a failed hard mask layer on a via opening in a dielectric layer, including removing the failed hard mask layer; forming an underfill layer to fill the via opening; forming a top hard mask layer on the underfill layer; and forming a mask layer on the top hard mask layer.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: May 6, 2025
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Wei-Chen Pan
  • Publication number: 20250136716
    Abstract: Provided is a pharmaceutical formulation with reduced particle formation, comprising an anti-coagulation factor IXa/X antibody (bispecific monoclonal antibody) that substitutes for coagulation factor VIII, or an anti-IL-6 receptor antibody that inhibits binding to the interleukin 6 receptor. Provided is a pharmaceutical formulation comprising an aqueous solution comprising a polyoxyethylene polyoxypropylene glycol (poloxamer), wherein the poloxamer is represented by formula I: HO(C2H4O)a(C3H6O)b(C2H4O)cH??(I) wherein a and c are independently an integer selected from 75 to 85; b is an integer selected from 22 to 33; and a, b and c are average values over the entire poloxamer, and, the poloxamer comprises poloxamer molecules comprising 34 or more (C3H6O) in the molecule at a ratio of 3% (w/w) or more of the total poloxamer.
    Type: Application
    Filed: December 1, 2022
    Publication date: May 1, 2025
    Applicants: Chugai Seiyaku Kabushiki Kaisha, Hoffmann-La Roche Inc.
    Inventors: Kohei SOEDA, Masakazu FUKUDA, Masaya TAKAHASHI, Hirotaka IMAI, Satoshi SAITOH, Jeremy DUBOEUF, Kishore RAVURI, Robert KOPF, Wei CHEN, Nuria Sancho OLTRA
  • Publication number: 20250142100
    Abstract: An electronic apparatus performs a method of video coding. The method comprises: obtaining a video picture that includes a first component and a second component; determining a plurality of offsets associated with the second component; utilizing a sample value of the first component to obtain a class index associated with the second component; selecting an offset from the plurality of offsets for the second component according to the class index; and obtaining a sample value of the second component based on the selected offset, wherein the sample value of the first component is derived from one or more of collocated or neighboring samples of the first component relative to a sample of the second component, and wherein the sample value of the first component is derived differently for different chroma formats.
    Type: Application
    Filed: December 20, 2024
    Publication date: May 1, 2025
    Inventors: Che-Wei KUO, Xiaoyu XIU, Wei CHEN, Xianglin WANG, Yi-Wen CHEN, Tsung-Chuan MA, Hong-Jheng JHU, Bing YU
  • Publication number: 20250140608
    Abstract: An integrated circuit structure includes a plurality of transistors, an interconnect layer, and a memory stack. The interconnect layer includes an interlayer dielectric (ILD) and a conductive structure embedded in the ILD. The conductive structure includes a barrier layer and a conductive filling material surrounded by the barrier layer in a cross-sectional view. The memory stack is over the interconnect layer. The memory stack includes a bottom electrode extending across the conductive structure in the cross-sectional view, a resistance switching layer over the bottom electrode, and a top electrode over the resistance switching layer. In the cross-sectional view, an interface formed by the bottom electrode and the barrier layer has a topmost point higher than a topmost point of an interface formed by the bottom electrode and the conductive filling material.
    Type: Application
    Filed: December 26, 2024
    Publication date: May 1, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsia-Wei CHEN, Fu-Ting SUNG, Yu-Wen LIAO, Wen-Ting CHU, Fa-Shen JIANG, Tzu-Hsuan YEH
  • Publication number: 20250142063
    Abstract: Methods for video decoding and encoding, apparatuses and non-transitory computer-readable storage media thereof are provided. In one method for video decoding, a decoder may obtain a motion compensated chroma sample and a plurality of motion compensated luma samples for a current inter coding block. Furthermore, the decoder may obtain an adaptive cross-component filter and obtain a filtered motion compensated chroma sample based on the adaptive cross-component filter, the motion compensated chroma sample, and the plurality of motion compensated luma samples.
    Type: Application
    Filed: December 27, 2024
    Publication date: May 1, 2025
    Applicant: BEIJING DAJIA INTERNET INFORMATION TECHNOLOGY CO., LTD.
    Inventors: Xiaoyu XIU, Ning YAN, Che-Wei KUO, Hong-Jheng JHU, Wei CHEN, Xianglin WANG, Bing YU
  • Publication number: 20250140721
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an integrated circuit (IC) component, an insulating layer laterally encapsulating the IC component, a redistribution structure disposed on the insulating layer and the IC component, and a warpage control portion coupling to a back side of the IC component opposite to the redistribution structure. The redistribution structure is electrically connected to the IC component. The warpage control portion includes a substrate, a patterned dielectric layer disposed between the substrate and the IC component, and a metal pattern embedded in the patterned dielectric layer and electrically isolated from the IC component.
    Type: Application
    Filed: December 24, 2024
    Publication date: May 1, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Hsien-Wei Chen, Jie Chen
  • Publication number: 20250142881
    Abstract: A semiconductor structure includes: a first fin portion and a second fin portion; a first device and a second device which are respectively disposed on front surfaces of the first and second fin portions, each of the first and second devices including a source/drain portion; an isolation portion disposed to separate the first fin portion from the second fin portion and to separate the first device from the second device; and a hard mask portion disposed beneath a back surface of the isolation portion, and including a main region and two sidewall regions that are respectively located at two opposite sides of the main region so as to separate the main region from the first and second fin portions. The sidewall regions are made of a material different from that of the isolation portion. The main region is made of a material different from the material of the sidewall regions.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 1, 2025
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Ho CHIANG, Wei-Chen CHANG, Jiun-Jie CHAO, Jyh-Huei CHEN, Jye-Yen CHENG