Abstract: A computer-implemented method for ordinal prediction is provided. The method includes encoding time series data with a temporal encoder to obtain latent space representations. The method includes optimizing the temporal encoder using semi-supervised learning to distinguish different classes in the labeled space using labeled data, and augment the latent space representations using unlabeled training data, to obtain semi-supervised representations. The method further includes discarding a linear layer after the temporal encoder and fixing the temporal encoder. The method also includes training k?1 binary classifiers on top of the semi-supervised representations to obtain k?1 binary predictions. The method additionally includes identifying and correcting inconsistent ones of the k?1 binary predictions by matching the inconsistent ones to consistent ones of the k?1 binary predictions. The method further includes aggregating the k?1 binary predictions to obtain an ordinal prediction.

Abstract: A switchable backlight module is disclosed. The switchable backlight module includes two light source modules arranged parallelly with respect to a plane. Each of the light source modules includes a turning film and a LGP. The LGP is of an edge-lit type arranged parallelly under the turning film. A light ray enters the LGP from a light incident side of the LGP, exits the LGP from a light emergent surface of the LGP, enters the turning film, and exits the turning film from a surface of the turning film away from the LGP. The light incident side of the LGP of one of the light source modules is perpendicular to the light incident side of the LGP of the other light source module. The switchable backlight module is in an anti-peeping mode having a narrow viewing angle when only an upper one of the light source modules emits light.

Abstract: The present disclosure relates to a beam measuring device, a sample processor including the beam measuring device, and a method of measuring a beam using the beam measuring device. The beam measuring device includes a detection unit and a light impediment unit. The light impediment unit is located between the detection unit and a light source, and is configured to generate a shadow area on the detection unit by blocking transmission of part of a beam coming from the light source. The detection unit is configured to measure the shadow area, and to determine whether the beam is divergent or inclined with respect to a predetermined optical axis based on the measurement of the shadow area. The beam measuring device may shorten the optical detection channel and ensure the detection accuracy, thereby having a compact structure. In addition, the beam measuring device may measure divergence angle and directionality, respectively.

Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.

Abstract: A media creative attribution method includes determining a response profile within an attribution time window, the response profile being a portion of a unique visitor (UV) curve associated with a website. In some cases, a shadow baseline analysis is run on every media creative that aired within an extended time window to determine whether to adjust the response profile. A total lift within the attribution time window is determined utilizing a baseline of the UV curve. A weight for each media creative that aired within the attribution time window is determined. Utilizing the weight, the total lift is allocated to individual media creatives that aired within the attribution time window. The allocated attribution can be utilized to generate performance metrics relating to the individual media creatives that aired within the attribution time window. The performance metrics such as cost per visitor can be visualized through a user interface or dashboard.

Abstract: An artificial shuttlecock includes a ball head, a plurality of feathers, and a plurality of stems. Each of the feathers includes a notch. The notch is disposed on an outer edge of the feather. A ball head end of the stem is connected to the ball head, and a feather end is connected to the feather. The stem includes a body, which tapers from the end close to the ball end to the feather end. The end of the body close to the ball end has a first width, and the body has a second width at the feather. The first width is between 2.1 mm and 2.4 mm, and the second width is between 0.4 mm and 0.6 mm.

Abstract: An electrode assembly and a lithium ion electric roll having the same are provided. The electrode assembly includes: a first electrode unit; a first anti-puncture cushion; in which the first electrode unit includes a first electrode sheet, an second electrode sheet, and a separator, the second electrode sheet comprises a second top edge and a second bottom edge along the length direction of the first electrode unit; an edge of the first anti-puncture cushion exceeds the second electrode sheet from the second top edge or the second bottom edge along the length direction of the first electrode unit.

Abstract: A light source module and a display device are provided. The light source module includes a light source, a light guide plate, and an optical film set including multiple first optical microstructures having a first surface, multiple second optical microstructures having a second surface, and multiple third optical microstructures having a third surface. Each of the multiple first optical microstructures has a first vertex angle, each of the multiple second optical microstructures has a second vertex angle, and each of the multiple third optical microstructures has a third vertex angle. The third vertex angle is less than the first vertex angle, and the first vertex angle is less than or equal to the second vertex angle. By configuring the aforementioned optical microstructures, the light source module of the disclosure may greatly improve the collimation of light and has favorable luminance.

Abstract: An out-of-order buffer includes an out-of-order queue and a controlling circuit. The out-of-order queue includes a request sequence table and a request storage device. The controlling circuit receives and temporarily stores the plural requests into the out-of-order queue. After the plural requests are transmitted to plural corresponding target devices, the controlling circuit retires the plural requests. The request sequence table contains m×n indicating units. The request sequence table contains m entry indicating rows. Each of the m entry indicating rows contains n indicating units. The request storage device includes m storage units corresponding to the m entry indicating rows in the request sequence table. The state of indicating whether one request is stored in the corresponding storage unit of the m storage units is recoded in the request sequence table. The storage sequence of the plural requests is recoded in the request sequence table.

Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.

Abstract: A display may include an array of pixels that receive control signals from a chain of gate drivers. The pixels can be formed using semiconducting oxide transistors, whereas the gate drivers can be formed using silicon transistor. Each gate driver may include a shift register subcircuit and an output buffer subcircuit. The shift register subcircuit may include a first set of transistors at least partially controlled by one or more shift register clock signals. The output buffer subcircuit may include a second set of transistors at least partially controlled by one or more output buffer clock signals. The output buffer clock signals can toggle independently from the shift register clock signals. Operated in this way, the shift register clock signals can have pulse widths optimized for stability while the output buffer clock signals can have pulse widths optimized for speed.

Abstract: A method for decoding a video block in GPM includes: partitioning the video block into two geometric partitions; constructing a uni-directional motion victor (MV) candidate list by adding regular merge candidates; in response to determining that the candidate list is not full, constructing a first updated candidate list by adding additional uni-directional MVs derived from bi-prediction MVs of a regular merge candidate list to the candidate list; in response to determining that the first updated candidate list is not full, constructing a second updated candidate list by adding pairwise average candidates to the first updated candidate list; in response to determining that the second updated candidate list is not full, periodically adding zero uni-directional MVs to the second updated candidate list until a maximum length is reached; and respectively generating a uni-directional MV for each geometric partition.

Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.

Abstract: Implementations of the disclosure provide systems and methods for motion refinement in a video. The method may include determining an initial motion vector for a video block of a video frame from the video. The method may include determining a matching target based on a weighted combination of a first reference block from a first reference frame in the video and a second reference block from a second reference frame in the video. The method may include performing a bilateral matching based motion refinement process at a block level to iteratively update the initial motion vector based on the matching target until a refined motion vector is obtained. The method may include refining a motion vector for each sub-block in the video block using the refined motion vector of the video block. Refining the motion vector at a sub-block level applies an affine motion model of the video block.

Abstract: A battery pack, comprising a first cell and a second cell connected in series, the first cell having a current cut-off device and having a first failure voltage, the current cut-off device being configured to be able to break a circuit in response to a voltage value of the first cell reaching or exceeding the first failure voltage, and the second cell having no current cut-off device. The battery pack may use a soft pack battery as the second cell, having advantages such as high energy density, low impedance, high discharge power, a low rate of temperature rise during high-rate discharge, and flexibility in dimensions.

Abstract: A test apparatus for testing electrical parameters of a target chip includes: a function generator; a switch matrix module; a plurality of source measurement units (SMUs); at least one of the SMUs is configured to provide power supply for the target chip; at least one of the SMUs is coupled to the switch matrix module; and at least two of said SMUs are test SMUs coupled to ports of the target chip and the function generator.

Abstract: The present disclosure relates to an apparatus and a method for wafer cleaning. The apparatus can include a wafer holder configured to hold a wafer; a cleaning nozzle configured to dispense a cleaning fluid onto a first surface (e.g., front surface) of the wafer; and a cleaning brush configured to clean a second surface (e.g., back surface) of the wafer. Using the cleaning fluid, the cleaning brush can clean the second surface of the wafer with a scrubbing motion and ultrasonic vibration.

Abstract: Various embodiments of the present disclosure are directed towards a memory device. The memory device has a first transistor having a first source/drain and a second source/drain, where the first source/drain and the second source/drain are disposed in a semiconductor substrate. A dielectric structure is disposed over the semiconductor substrate. A first memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the first memory cell has a first electrode and a second electrode, where the first electrode of the first memory cell is electrically coupled to the first source/drain of the first transistor. A second memory cell is disposed in the dielectric structure and over the semiconductor substrate, where the second memory cell has a first electrode and a second electrode, where the first electrode of the second memory cell is electrically coupled to the second source/drain of the first transistor.

Abstract: A device includes a redistribution line, and a polymer region molded over the redistribution line. The polymer region includes a first flat top surface. A conductive region is disposed in the polymer region and electrically coupled to the redistribution line. The conductive region includes a second flat top surface not higher than the first flat top surface.

Abstract: A magnetic seat adjustment system includes a frame structure, a movable adjustment mechanism, and a control system. The frame structure includes a first magnetic portion fixedly coupled to the frame structure and including first magnetic members that independently generate a magnetic field. The movable adjustment mechanism includes a movable base and a second magnetic portion. The second magnetic portion is fixedly coupled to the movable base and includes second magnetic members that independently generate a magnetic field. The control system controls a change in the magnetic field of the second magnetic members and/or the first magnetic members. When the magnetic field of the second magnetic members interacts with the magnetic field of the first magnetic members, the seat is in a magnetic levitation state, so that movement of the movable base drives movement of the seat.