Patents by Inventor Wei Hwang

Wei Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11962060
    Abstract: A power dividing and combining device comprising a resonance body, a plurality of circuit boards, an upper cover and a lower cover is provided. The resonance body comprises a solid conductive body, a plurality of first dividing elements, a plurality of second dividing elements, a signal-receiving end and a signal-transmitting end. The solid conductive body has a first surface, a second surface opposite to the first surface, and a plurality of side surfaces connecting the first surface and the second surface. The first dividing elements are disposed on the first surface and separate a plurality of first resonance channels on the first surface. The first resonance channels intersect at a first common region on the first surface. The second dividing elements are disposed on the second surface and separate a plurality of second resonance channels on the second surface. The second resonance channels intersect at a second common region on the second surface.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: April 16, 2024
    Assignee: AMPAK TECHNOLOGY INC.
    Inventors: Fure-Tzahn Tsai, Ruey Bing Hwang, Tso Hua Lin, Chih Wei Wang, Tzong-Yow Ho
  • Patent number: 11963464
    Abstract: A memristor may include an exchange-coupled composite (ECC) portion to provide three or more nonvolatile magneto-resistive states. The ECC portion may include a continuous layer and a granular layer magnetically exchange coupled to the continuous layer. A plurality of memristors may be used in a system to, for example, define a neural network.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: April 16, 2024
    Assignee: Seagate Technology LLC
    Inventors: Cheng Wang, Pin-Wei Huang, Ganping Ju, Kuo-Hsing Hwang
  • Patent number: 11954847
    Abstract: An image identification method is provided, including: storing at least one normal state image of at least one test object; an automatic codec receiving the at least one normal state image to become a trained automatic codec; at least one camera device capturing at least one state image of the at least one test object; a computer device receiving the at least one state image, and the trained automatic codec performing feature extraction and reconstruction on the at least one state image to generate at least one reconstructed state image; and the computer device comparing the at least one state image and the at least one reconstructed state image, and determining whether the at least one state image is a normal state image. The present invention also provides an image identification system.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: April 9, 2024
    Assignee: TUL CORPORATION
    Inventors: Wen Jyi Hwang, Chien Hua Chen, Chien Wei Chen
  • Publication number: 20240086719
    Abstract: A computing system including a plurality of processing devices configured to execute a Mixture-of-Experts (MoE) layer. The processing devices are configured to execute the MoE layer at least in part by receiving an input tensor including input tokens. Executing the MoE layer further includes computing a gating function output vector based on the input tensor and computing a sparse encoding of the input tensor and the gating function output vector. The sparse encoding indicates one or more destination expert sub-models. Executing the MoE layer further includes dispatching the input tensor for processing at the one or more destination expert sub-models, and further includes computing an expert output tensor. Executing the MoE layer further includes computing an MoE layer output at least in part by computing a sparse decoding of the expert output tensor. Executing the MoE layer further includes conveying the MoE layer output to an additional computing process.
    Type: Application
    Filed: May 16, 2023
    Publication date: March 14, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Yifan XIONG, Changho HWANG, Wei CUI, Ziyue YANG, Ze LIU, Han HU, Zilong WANG, Rafael Omar SALAS, Jithin JOSE, Prabhat RAM, Ho-Yuen CHAU, Peng CHENG, Fan YANG, Mao YANG, Yongqiang XIONG
  • Publication number: 20240080117
    Abstract: The present invention provides a wireless communication method of an electronic device, wherein the electronic device includes a first radio and a second radio, a maximum bandwidth or a maximum. NSS supported by the first radio is different from a maximum bandwidth or a maximum NSS supported by the second radio. The wireless communication method includes the step of: using the first radio to communicate with another electronic device; determining if parameters of the electronic device satisfy a condition; and in response to the parameters of the electronic device satisfying the condition, enabling the second radio and using the second radio to communicate with the another electronic device, and disabling the first radio.
    Type: Application
    Filed: August 9, 2023
    Publication date: March 7, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ying-You Lin, Jun-Wei Lin, Ren-Fang Gan, Ding-Yuh Hwang, Po-Ting Kao, Chia-Ning Chang, Ssu-Ying Hung
  • Patent number: 11457850
    Abstract: A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: October 4, 2022
    Assignee: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Hung-Pin Lu, Po-Tsang Huang, Wei Hwang
  • Publication number: 20220262685
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Application
    Filed: May 2, 2022
    Publication date: August 18, 2022
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 11322411
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: May 3, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 11302582
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: April 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 11075275
    Abstract: Certain embodiments of a semiconductor device and a method of forming a semiconductor device comprise forming a high-k gate dielectric layer over a short channel semiconductor fin. A work function metal layer is formed over the high-k gate dielectric layer. A seamless metal fill layer is conformally formed over the work function metal layer.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: July 27, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Hang Chiu, Chung-Chiang Wu, Ching-Hwanq Su, Da-Yuan Lee, Ji-Cheng Chen, Kuan-Ting Liu, Tai-Wei Hwang, Chung-Yi Su
  • Patent number: 10987501
    Abstract: Certain embodiments according to the present invention provide sleeve devices suitable for a wide range of therapeutic uses. In accordance with certain embodiments, the therapeutic sleeve device includes a nanofiber fabric assembly, which defines a plurality of pores, and at least one layer of cells embedded in the nanofiber fabric assembly.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: April 27, 2021
    Assignee: The Johns Hopkins University
    Inventors: Chao-Wei Hwang, Zhiyong Xia, Virginia E. Bogdan, Jeffrey A. Brinker, Gary Gerstenblith, Peter V. Johnston, Steven P. Schulman, Gordon Tomaselli, Robert G. Weiss
  • Publication number: 20200297474
    Abstract: The present invention provides an implantable bioreactor comprising cells enclosed within an enclosure, said cells being capable of producing paracrine factors, wherein the enclosure is collapsible or expandable or both or neither, wherein the enclosure is semipermeable such that it provides containment of the cells preventing the egress of the cells while further providing a barrier that shields the cells from immunological attack, and wherein the enclosure is permeable to the entire secretome of the cell including exosomes, nucleic acids and proteins. The implantable bioreactor can have various configurations and can house internally a cell culture matrix than can include hydrogels, microbeads, and nanofiber matrices along with other active agents.
    Type: Application
    Filed: October 5, 2018
    Publication date: September 24, 2020
    Inventors: Chao-Wei Hwang, Peter Johnston, Gary Gerstenblith, Robert G. Weiss, Gordon Tomaselli, Steven Schulman
  • Patent number: 10772716
    Abstract: A method for promoting healing of tissue by delivering a bioreactor into a subject is provided. The bioreactor is an enclosed housing with paracrine factor producing cells enclosed within the housing. The housing is impermeable to the paracrine factor producing cells, impermeable to immunological cells outside of the housing, and permeable to paracrine factors produced by the paracrine factor producing cells. The paracrine factors produced by the paracrine factor producing cells are released out of the housing to promote healing of the tissue.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: September 15, 2020
    Assignee: The Johns Hopkins University
    Inventors: Gary Gerstenblith, Jason Benkoski, George Coles, Chao-Wei Hwang, Peter Johnston, Gordon Tomaselli, Robert G. Weiss, Steven P. Schulman, Jeffrey A. Brinker
  • Patent number: 10729337
    Abstract: The present application relates to systems and methods for non-invasively determining at least one of left ventricular end diastolic pressure (LVEDP) or pulmonary capillary wedge pressure (PCWP) in a subject's heart, comprising: receiving, by a computer, a plurality of signals from a plurality of non-invasive sensors that measure a plurality of physiological effects that are correlated with functioning of said subject's heart, said plurality of physiological effects including at least one signal correlated with left ventricular blood pressure and at least one signal correlated with timing of heartbeat cycles of said subject's heart; training a machine learning model on said computer using said plurality of signals for periods of time in which said plurality of signals were being generated during a heart failure event of said subject's heart; determining said LVEDP or PCWP using said machine learning model at a time subsequent to said training and subsequent to said heart failure event.
    Type: Grant
    Filed: May 5, 2016
    Date of Patent: August 4, 2020
    Assignees: The Johns Hopkins University, Boston Scientific Scimed Inc.
    Inventors: Qian Liu, Nichaluk Leartprapun, Jackline Wanjala, Soumyadipta Acharya, Andrew Bicek, Viachaslau Barodka, Umang Anand, Majd Alghatrif, David Kass, B. Westbrook Bernier, Chao-Wei Hwang, Peter Johnston, Trent Langston
  • Publication number: 20200178823
    Abstract: A neural-signal amplifier includes an amplifier, a switched-capacitor circuit-input unit, a switched-capacitor feedback-circuit unit, and a switched-capacitor circuit-output unit. Each of the switched-capacitor circuit-input unit, the switched-capacitor feedback-circuit unit, and the switched-capacitor circuit-output unit includes a plurality of differential switches, a plurality of common mode switches, and a plurality of capacitors. By controlling the switches to turn on or performing the switched-capacitor operation, the neural-signal amplifier is controlled to suppress the DC drift and reconstruct the DC input of the common-mode power supply.
    Type: Application
    Filed: December 5, 2019
    Publication date: June 11, 2020
    Inventors: Hung-Pin LU, Po-Tsang HUANG, Wei HWANG
  • Publication number: 20200147358
    Abstract: Certain embodiments according to the present invention provide sleeve devices suitable for a wide range of therapeutic uses. In accordance with certain embodiments, the therapeutic sleeve device includes a nanofiber fabric assembly, which defines a plurality of pores, and at least one layer of cells embedded in the nanofiber fabric assembly.
    Type: Application
    Filed: December 27, 2019
    Publication date: May 14, 2020
    Inventors: Chao-Wei Hwang, Zhiyong Xia, Virginia E. Bogdan, Jeffrey A. Brinker, Gary Gerstenblith, Peter V. Johnston, Steven P. Schulman, Gordon Tomaselli, Robert G. Weiss
  • Publication number: 20200091006
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 19, 2020
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Publication number: 20200083108
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 12, 2020
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu
  • Patent number: 10561830
    Abstract: Certain embodiments according to the present invention provide sleeve devices suitable for a wide range of therapeutic uses. In accordance with certain embodiments, the therapeutic sleeve device includes a nanofiber fabric assembly, which defines a plurality of pores, and at least one layer of cells embedded in the nanofiber fabric assembly.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: February 18, 2020
    Assignee: The Johns Hopkins University
    Inventors: Chao-Wei Hwang, Zhiyong Xia, Virginia E. Bogdan, Jeffrey A. Brinker, Gary Gerstenblith, Peter V. Johnston, Steven P. Schulman, Gordon Tomaselli, Robert G. Weiss
  • Patent number: 10504789
    Abstract: Embodiments disclosed herein relate to a pre-deposition treatment of materials utilized in metal gates of different transistors on a semiconductor substrate. In an embodiment, a method includes exposing a first metal-containing layer of a first device and a second metal-containing layer of a second device to a reactant to form respective monolayers on the first and second metal-containing layers. The first and second devices are on a substrate. The first device includes a first gate structure including the first metal-containing layer. The second device includes a second gate structure including the second metal-containing layer different from the second metal-containing layer. The monolayers on the first and second metal-containing layers are exposed to an oxidant to provide a hydroxyl group (—OH) terminated surface for the monolayers. Thereafter, a third metal-containing layer is formed on the —OH terminated surfaces of the monolayers on the first and second metal-containing layers.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Yen Tsai, Chung-Chiang Wu, Tai-Wei Hwang, Hung-Chin Chung, Wei-Chin Lee, Da-Yuan Lee, Ching-Hwanq Su, Yin-Chuan Chuang, Kuan-Ting Liu