Abstract: The present disclosure relates to an integrated chip including a substrate. A first conductive wire is within a first dielectric layer that is over the substrate. A first etch-stop layer is over the first dielectric layer. A second etch-stop layer is over the first etch-stop layer. A conductive via is within a second dielectric layer that is over the second etch-stop layer. The conductive via extends through the second etch-stop layer and along the first etch-stop layer to the first conductive wire. A first lower surface of the second etch-stop layer is on a top surface of the first etch-stop layer. A second lower surface of the second etch-stop layer is on a top surface of the first conductive wire.

Abstract: Half Quad Photodiode (QPD) for improving QPD channel imbalance. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that is disposed in a semiconductor material. Each pixel includes a plurality of subpixels. Each subpixel comprises a plurality of first photodiodes, a plurality of second photodiodes and a plurality of third photodiodes. The plurality of pixels are configured to receive incoming light through an illuminated surface of the semiconductor material. A plurality of small microlenses are individually distributed over individual first photodiodes and individual second photodiodes of each subpixel. A plurality of large microlenses are each distributed over a plurality of third photodiodes of each subpixel. A diameter of the small microlenses is smaller than a diameter of the large microlenses.

Abstract: A semiconductor device package comprises a semiconductor device, a first encapsulant surrounding the semiconductor device, a second encapsulant covering the semiconductor device and the first encapsulant, and a redistribution layer extending through the second encapsulant and electrically connected to the semiconductor device.

Abstract: The present disclosure relates to an integrated chip comprising a pair of first metal lines over a substrate. A first interlayer dielectric (ILD) layer is laterally between the pair of first metal lines. The first ILD layer comprises a first dielectric material. A pair of spacers are on opposite sides of the first ILD layer and are laterally separated from the first ILD layer by a pair of cavities. The pair of spacers comprise a second dielectric material. Further, the pair of cavities are defined by opposing sidewalls of the first ILD layer and sidewalls of the pair of spacers that face the first ILD layer.

Abstract: A semiconductor device includes a substrate, an interconnect layer disposed over the substrate and including a metal line, and a dielectric layer disposed on the interconnect layer and including a via contact. The via contact is electrically connected to the metal line and has a first dimension in a first direction greater than a second dimension in a second direction. The first direction and the second direction are perpendicular to each other, and are both perpendicular to a longitudinal direction of the via contact.

Abstract: In an embodiment, a device includes: an interposer; a first integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a second integrated circuit device bonded to the interposer with dielectric-to-dielectric bonds and with metal-to-metal bonds; a buffer layer around the first integrated circuit device and the second integrated circuit device, the buffer layer including a stress reduction material having a first Young's modulus; and an encapsulant around the buffer layer, the first integrated circuit device, and the second integrated circuit device, the encapsulant including a molding material having a second Young's modulus, the first Young's modulus less than the second Young's modulus.

Abstract: The present disclosure provides a multi-scale three-dimensional (3D) engineering geological model construction system and method. A regional geological model of a target region, a site geological model of each engineering site, and a drilling geological model of each drilling well are constructed. The geological model of each drilling well is superimposed to the site geological model of the corresponding engineering site in the way of step-by-step superimposition, and the site geological model of each engineering site fused with the drilling geological model is superimposed to the regional geological model of the target region. Thus, multi-scale geological model fusion of drilling well, engineering site, and regional mountain is realized.

Abstract: An ultrasonic data transmission method, apparatus and system, a terminal device and a medium are provided. The method is applied to a transmitting terminal which includes at least two ultrasonic signal transmitting arrays. The method includes: a single-frequency ultrasonic coding signal of to-be-transmitted information corresponding to each ultrasonic signal transmitting array is respectively determined, ultrasonic codes of to-be-transmitted information corresponding to different ultrasonic signal transmitting arrays being different; and corresponding at least two single-frequency ultrasonic code signals are transmitted through the at least two ultrasonic signal transmitting arrays to a receiving terminal in a focusing mode, frequency bands of transmitting frequencies of different ultrasonic signal transmitting arrays being different.

Abstract: A Static Random Access Memory (SRAM) cell includes a write port including a first inverter including a first pull-up transistor and a first pull-down transistor, and a second inverter including a second pull-up transistor and a second pull-down transistor and cross-coupled with the first inverter; and a read port including a read pass-gate transistor and a read pull-down transistor serially connected to each. A first doped concentration of impurities doped in channel regions of the second pull-down transistor and the read pull-down transistor is greater than a second doped concentration of the impurities doped in a channel region of the first pull-down transistor, or the impurities are doped in the channel regions of the second pull-down transistor and the read pull-down transistor and are not doped in the channel region of the first pull-down transistor.

Abstract: A method, apparatus, and a non-transitory computer-readable storage medium for event detection are provided. The method may be applied to an electronic device. The electronic device may transmit a detection signal. The electronic device may receive an echo signal of the detection signal. The electronic device may acquire a feature value of the echo signal. The electronic device may calculate a decision parameter based on the feature value, and may determine, based on the decision parameter, that the electronic device is moving towards or away from a target object.

Abstract: A semiconductor device may include a bandgap circuit that outputs a reference voltage. The bandgap circuit may include a bandgap core circuit and a startup circuit coupled to the bandgap core circuit. The startup circuit may connect a voltage source to a node that corresponds to an output of the bandgap core circuit in response to the bandgap core circuit being initialized. The startup circuit may also disconnect the voltage source from the node in response to the output voltage being equal to or greater than a desired voltage (e.g., a threshold voltage) and one or more local voltages of the bandgap core circuit being equal to or greater than a local threshold voltage.

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

Abstract: A method includes placing a package, which includes a first package component, a second package component, and an encapsulant encapsulating the first package component and the second package component therein. The method further includes attaching a first thermal interface material over the first package component, attaching a second thermal interface material different from the first thermal interface material over the second package component, and attaching a heat sink over both of the first thermal interface material and the second thermal interface material.

Abstract: Disclosed are a method and a device for reconstructing a spectrum, a spectrometer, a computer-readable storage medium, and an electronic device, and solves a problem of poor anti-noise ability of the method for reconstructing a spectrum. According to a feature that a spectrum must be positive, the present application converts the negative spectral value in the spectral data to be processed into positive spectral value by the objective function, so that the anti-noise ability of an iterative solution process of the objective function may be improved, and thus accuracy of the reconstructed spectral data may be improved.

Abstract: A package structure includes a first dielectric layer disposed on a first patterned circuit layer, a first conductive via in the first dielectric layer and electrically connected to the first patterned circuit layer, a circuit layer on the first dielectric layer, a second dielectric layer on the first dielectric layer and covering the circuit layer, a second patterned circuit layer on the second dielectric layer and including conductive features, a chip on the conductive features, and a molding layer disposed on the second dielectric layer and encapsulating the chip. The circuit layer includes a plurality of portions separated from each other and including a first portion and a second portion. The number of pads corresponding to the first portion is different from that of pads corresponding to the second portion. An orthographic projection of each portion overlaps orthographic projections of at least two of the conductive features.

Abstract: A package component for carrying a device package and an insulating layer thereon includes a molding layer, first and second redistribution structures disposed on two opposite sides of the molding layer, a semiconductor die, and a through interlayer via (TIV). A hardness of the molding layer is greater than that of the insulating layer that covers the device package. The device package is mounted on the second redistribution structure, and the insulating layer is disposed on the second redistribution structure opposite to the molding layer. The semiconductor die is embedded in the molding layer and electrically coupled to the device package through the second redistribution structure. The TIV penetrates through the molding layer to connect the first and the second redistribution structure. An electronic device and a manufacturing method thereof are also provided.

Abstract: Methods and systems are presented for providing a framework to securely integrate third-party logic into electronic transaction processing workflow. Third-party programming code that implements different third-party logic may be obtained and stored in a repository. A transaction processing request is received from a third-party server, and an instance of a transaction processing module is instantiated within an operating runtime environment to process a transaction according to a workflow. When the instance of the transaction processing module has reached an interruption point, the instance of the transaction processing module is suspended, and a third-party programming code is executed within an isolated runtime environment. The third-party programming code is configured to provide an output value based on attributes of the transaction. The instance of the transaction processing module then determines whether to authorize or deny the transaction based in part on the output value.

Abstract: In a data read method a plurality of tuples meeting a read condition are determined in a case that the data read request is received and according to a read condition carried in the data read request. Global transaction statuses of a plurality of global transactions corresponding to the plurality of tuples are obtained. Global commit times of the plurality of global transactions according to the global transaction statuses of the plurality of global transactions are obtained. Then a target tuple from the plurality of tuples is determined based on the global commit times of the plurality of global transactions, the target tuple being visible relative to the data read request.

Abstract: The present disclosure relates to load cups that include an annular substrate station configured to receive a substrate. The annular substrate station surrounds a nebulizer located within the load cup. The nebulizer includes a set of energized fluid nozzles disposed on an upper surface of the nebulizer adjacent to an interface between the annular substrate station and the nebulizer. The set of energized fluid nozzles are configured to release energized fluid at an upward angle relative to the upper surface.