Abstract: An electronic device includes a backlight module. The backlight module includes a light guide plate and a light pattern adjustment component disposed on the light guide plate. The side of the light pattern adjustment component that is adjacent to the light guide plate has a plurality of prismatic structures, and the side of the light pattern adjustment component that is away from the light guide plate has a plurality of structural unit rows. Each of the structural unit rows includes a plurality of structural units, and the angle between the arrangement direction of the structural units in one of the structural unit rows and the extension direction of one of the prismatic structures is within a range of 10-80°.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a first transistor over a substrate, including a first channel layer over the substrate, a second channel layer over and spaced apart from the first channel layer in a first direction, and a first source/drain structure attached to the first channel layer and the second channel layer. The semiconductor structure further includes a second transistor over the substrate, including a third channel layer over the substrate, a fourth channel layer over and spaced apart from the third channel layer in the first direction, and a second source/drain structure attached to the third channel layer and the fourth channel layer. In addition, a dimension of the first source/drain structure in the first direction is different from a dimension of the second source/drain structure in the first direction.

Abstract: Provided are an aromatic L-amino acid decarboxylase (AADC)/glial cell line-derived neurotrophic factor (GDNF) polynucleotide, and a use thereof in treating Parkinson's disease. Specifically, provided are a method for and a use in treating neurodegenerative diseases (such as Parkinson's disease) by delivering AADC and a GDNF to specific areas of the brain by a gene delivery system using AAV as a vector.

Abstract: An electronic device includes a backlight module. The backlight module includes a light guide plate and a light pattern adjustment component disposed on the light guide plate. The side of the light pattern adjustment component that is adjacent to the light guide plate has a plurality of prismatic structures, and the side of the light pattern adjustment component that is away from the light guide plate has a plurality of structural unit rows. Each of the structural unit rows includes a plurality of structural units, and the angle between the arrangement direction of the structural units in one of the structural unit rows and the extension direction of one of the prismatic structures is within a range of 10-80°.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a substrate and a fin protruding from the substrate in a first direction. In addition, the fin includes a well region and an anti-punch through region over the well region. The semiconductor structure further includes a barrier layer formed over the anti-punch through region and channel layers formed over the fin and spaced apart from the barrier layer in the first direction. The semiconductor structure further includes a first liner layer formed around the fin and an isolation structure formed over the first liner layer. The semiconductor structure further includes a gate wrapping around the channel layers and extending in a second direction. In addition, a top surface of the barrier layer is higher than a top surface of the first liner layer in a cross-sectional view along the second direction.

Abstract: A method for reducing stress induced defects in heterogeneous epitaxial interfaces of a semiconductor device is disclosed. The method includes forming a fin structure with a fin base, a superlattice structure on the fin base, forming a polysilicon gate structure on the fin structure, forming a source/drain (S/D) opening within a portion of the fin structure uncovered by the polysilicon gate structure, modifying the first surfaces of the first layers to curve a profile of the first surfaces, depositing first, second, and third passivation layers on the first, second, and third surfaces, respectively, forming an epitaxial S/D region within the S/D opening, and replacing the polysilicon gate structure with a metal gate structure. The superlattice structure includes first and second layers with first and second lattice constants, respectively, and the first and second lattice constants are different from each other.

Abstract: A semiconductor device includes a first transistor device of a first type. The first transistor includes first nanostructures, a first pair of source/drain structures, and a first gate electrode on the first nanostructures. The semiconductor device also includes a second transistor device of a second type formed over the first transistor device. The second transistor device includes second nanostructures over the first nanostructures, a second pair of source/drain structures over the first pair or source/drain structures, and a second gate electrode on the second nanostructures and over the first nanostructures. The semiconductor device also includes a first isolation structure between the first and second nanostructures. The semiconductor device further includes a second isolation structure in contact with a top surface of the first pair of source/drain structures. The semiconductor device also includes a seed layer between the second isolation structure and the second pair of source/drain structures.

Abstract: Disclosed are a V-N microalloyed steel and a method for producing a V-N microalloyed and surface-crack-free continuous casting blank. The V-N microalloyed steel is composed of the following chemical components by mass percentage: 0.09%-0.13% of C, 0.1%-0.4% of Si, 1.0%-3.0% of Mn, less than or equal to 0.05% of P, less than or equal to 0.05% of S, 0.1%-0.4% of V, 0.011%-0.2% of N and the balance of Fe and unavoidable impurity elements. A continuous casting blank is subjected to component control according to the chemical components of the V-N microalloyed steel; and the production method therefor comprises converter smelting, LF refining and continuous casting steps in sequence.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a first nanowire over a semiconductor fin. The semiconductor structure also includes a second nanowire over the first nanowire and a third nanowire over the second nanowire. The semiconductor structure further includes a source/drain wrapping around the first nanowire, the second nanowire and the third nanowire. A thickness of a first portion of the source/drain vertically sandwiched between the first nanowire and the second nanowire is different from a thickness of a second portion of the source/drain vertically sandwiched between the second nanowire and the third nanowire.

Abstract: A semiconductor device includes a first transistor device of a first type. The first transistor includes first nanostructures, a first pair of source/drain structures, and a first gate electrode on the first nanostructures. The semiconductor device also includes a second transistor device of a second type formed over the first transistor device. The second transistor device includes second nanostructures over the first nanostructures, a second pair of source/drain structures over the first pair or source/drain structures, and a second gate electrode on the second nanostructures and over the first nanostructures. The semiconductor device also includes a first isolation structure between the first and second nanostructures. The semiconductor device further includes a second isolation structure in contact with a top surface of the first pair of source/drain structures. The semiconductor device also includes a seed layer between the second isolation structure and the second pair of source/drain structures.

Abstract: A speech recognition system may determine speech in the presence of multiple, different forms of corrupted audio. The system may obtain audio-visual data including visual data associated with a person and audio data associated with the person. The system may also determine, based on the visual data, pronunciation data associated with speech by the person. The system may also convert the speech to encoded data. The system may also synthesize, based on the encoded data, the speech to obtain synthesized speech.

Abstract: Semiconductor structures and processes of forming the same are provided. A semiconductor structure according to the present disclosure includes a substrate, a first source/drain feature disposed on the substrate, a first contact etch stop layer disposed on the first source/drain feature, a first dielectric layer disposed over the first CESL, an etch stop layer (ESL) disposed on and in contact with the first CESL and the first dielectric layer, a second source/drain feature disposed over the ESL, a second (CESL) disposed on the second source/drain feature, a second dielectric layer disposed over the second CESL. The first source/drain feature includes silicon and an n-type dopant and the second source/drain feature includes silicon germanium and a p-type dopant.

Abstract: A method for reducing stress induced defects in heterogeneous epitaxial interfaces of a semiconductor device is disclosed. The method includes forming a fin structure with a fin base, a superlattice structure on the fin base, forming a polysilicon gate structure on the fin structure, forming a source/drain (S/D) opening within a portion of the fin structure uncovered by the polysilicon gate structure, modifying the first surfaces of the first layers to curve a profile of the first surfaces, depositing first, second, and third passivation layers on the first, second, and third surfaces, respectively, forming an epitaxial S/D region within the S/D opening, and replacing the polysilicon gate structure with a metal gate structure. The superlattice structure includes first and second layers with first and second lattice constants, respectively, and the first and second lattice constants are different from each other.

Abstract: Provided are a recombinant adeno-associated virus (rAAV) having a variant capsid, and an application thereof. Specifically, provided are a variant AAV capsid protein, an rAAV viral particle comprising the variant AAV capsid protein, and an application thereof in delivering a gene product to a cell (e.g., a retinal cell).

Abstract: A semiconductor structure is provided. The semiconductor structure includes a semiconductor fin. The semiconductor structure also includes a first nanowire vertically overlapping a top surface of the semiconductor fin, a second nanowire vertically overlapping the first nanowire, and a third nanowire vertically overlapping the second nanowire. The semiconductor structure further includes a gate wrapping around the first nanowire, the second nanowire, and the third nanowire. A first portion of the gate vertically sandwiched between the first nanowire and the second nanowire is greater than a second portion of the gate vertically sandwiched between the second nanowire and the third nanowire.

Abstract: The present disclosure describes a semiconductor device having facet-free epitaxial structures with a substantially uniform thickness. The semiconductor device includes a fin structure on a substrate. The fin structure includes a fin bottom portion and a fin top portion. A top surface of the fin bottom portion is wider than a bottom surface of the fin top portion. The semiconductor device further includes a dielectric layer on the fin top portion, an amorphous layer on the dielectric layer, and an epitaxial layer. The epitaxial layer is on a top surface of the amorphous layer, sidewall surfaces of the amorphous layer, the dielectric layer, the fin top portion, and the top surface of the fin bottom portion.

Abstract: Embodiments of the present disclosure relate to a system, a software application, and methods of digital lithography for semiconductor packaging. The method includes comparing positions of vias and via locations, generating position data based on the comparing the positions of vias and the via locations, providing the position data of the vias to a digital lithography device, updating a redistributed metal layer (RDL) mask pattern according to the position data such that RDL locations correspond to the positions of the vias, and projecting the RDL mask pattern with the digital lithography device.