Abstract: A method for reducing stress induced defects in heterogeneous epitaxial interfaces of a semiconductor device is disclosed. The method includes forming a fin structure with a fin base, a superlattice structure on the fin base, forming a polysilicon gate structure on the fin structure, forming a source/drain (S/D) opening within a portion of the fin structure uncovered by the polysilicon gate structure, modifying the first surfaces of the first layers to curve a profile of the first surfaces, depositing first, second, and third passivation layers on the first, second, and third surfaces, respectively, forming an epitaxial S/D region within the S/D opening, and replacing the polysilicon gate structure with a metal gate structure. The superlattice structure includes first and second layers with first and second lattice constants, respectively, and the first and second lattice constants are different from each other.

Abstract: Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a substrate and a first fin and a second fin formed over the substrate. The semiconductor structure further includes a first anti-punch through region formed in the first fin and a second anti-punch through region formed in the second fin and first nanostructures formed over the first fin and second nanostructures formed over the second fin. The semiconductor structure further includes a barrier layer formed over the second anti-punch through region and a first gate formed around the first nanostructures. The semiconductor structure further includes a second gate formed around the second nanostructures. In addition, an interface between the barrier layer and the second anti-punch through region is higher than an interface between the first anti-punch through region and the first gate.

Abstract: This document describes low-latency Bluetooth connectivity in a wireless network in which a central node and a peripheral node establish a connection. During a first connection interval, the peripheral node receives a packet from the central node to synchronize communication with the central node, and based on receiving the packet, the peripheral node transmits a first fixed-length packet. If the first fixed-length packet fails to reach the central node, the peripheral node does not receive an acknowledgement, ACK, from the central node during the first connection interval and retransmits the first fixed-length packet during the first connection interval.

Abstract: A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate. The growing includes providing UV radiation to a first region of a surface of the substrate and while providing the UV radiation, growing a first portion of the epitaxial feature on the first region of the surface while concurrently growing a second portion of the epitaxial feature on a second region of the surface of the substrate. The first portion of the epitaxial feature can be greater in thickness than the second portion of the epitaxial feature.

Abstract: A method for providing a differentiation in terms of quality of service (QoS) for multiple tenants in a network, by a networking device receives a data packet from a transmitting tenant, and the networking device identifies the tenant and a priority class of the received packet. The networking device then determines one or more color markers to apply to the received packet according to the sending tenant and the priority to be associated with the packet. The networking device then transmits or does not transmit the packet onwards depending on one or more color markers applied to the packet.

Abstract: A method of semiconductor fabrication includes positioning a substrate on a susceptor in a chamber and growing an epitaxial feature on the substrate. The growing includes providing UV radiation to a first region of a surface of the substrate and while providing the UV radiation, growing a first portion of the epitaxial feature on the first region of the surface while concurrently growing a second portion of the epitaxial feature on a second region of the surface of the substrate. The first portion of the epitaxial feature can be greater in thickness than the second portion of the epitaxial feature.

Abstract: A method for providing a differentiation in terms of quality of service (QoS) for multiple tenants in a network, by a networking device receives a data packet from a transmitting tenant, and the networking device identifies the tenant and a priority class of the received packet. The networking device then determines one or more color markers to apply to the received packet according to the sending tenant and the priority to be associated with the packet. The networking device then transmits or does not transmit the packet onwards depending on one or more color markers applied to the packet.

Abstract: A method for reducing stress induced defects in heterogeneous epitaxial interfaces of a semiconductor device is disclosed. The method includes forming a fin structure with a fin base, a superlattice structure on the fin base, forming a polysilicon gate structure on the fin structure, forming a source/drain (S/D) opening within a portion of the fin structure uncovered by the polysilicon gate structure, modifying the first surfaces of the first layers to curve a profile of the first surfaces, depositing first, second, and third passivation layers on the first, second, and third surfaces, respectively, forming an epitaxial S/D region within the S/D opening, and replacing the polysilicon gate structure with a metal gate structure. The superlattice structure includes first and second layers with first and second lattice constants, respectively, and the first and second lattice constants are different from each other.

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a semiconductor layer formed over a substrate. The semiconductor device further includes an isolation region covering the semiconductor layer and nanostructures formed over the semiconductor layer. The semiconductor layer further includes a gate stack wrapping around the nanostructures. In addition, the isolation region is interposed between the semiconductor layer and the gate stack.

Abstract: A method for providing a differentiation in terms of quality of service (QoS) for multiple tenants in a network, by a networking device receives a data packet from a transmitting tenant, and the networking device identifies the tenant and a priority class of the received packet. The networking device then determines one or more color markers to apply to the received packet according to the sending tenant and the priority to be associated with the packet. The networking device then transmits or does not transmit the packet onwards depending on one or more color markers applied to the packet.

Abstract: A method for forming a gate-all-around structure is provided. The method includes forming a plurality of a first type of semiconductor layers and a plurality of a second type of semiconductor layers alternately stacked over a fin. The first type of semiconductor layers includes a first semiconductor layer and a second semiconductor layer, and the first semiconductor layer has a thickness greater than that of the second semiconductor layer. The method also includes removing the second type of semiconductor layers. In addition, the method includes forming a gate to wrap around the first type of semiconductor layers.

Abstract: System and method of ultrasound imaging methodology are provided. The system and method can include directing an array to transmit sets of cascaded titled ultrasound waves towards a tissue sample, decoding reflected signals through summing, subtracting, and delay operations. The reflected signals can be reconstructed to provide a final decoded output.

Abstract: A method for forming a semiconductor device is provided. The method includes removing a first portion of a substrate to form a recess in the substrate. The method includes forming an epitaxy layer in the recess. The epitaxy layer and the substrate are made of different semiconductor materials. The method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate and the epitaxy layer. The method includes removing a second portion of the stacked structure and a third portion of the epitaxy layer to form trenches passing through the stacked structure and extending into the epitaxy layer. The stacked structure is divided into a first fin element and a second fin element by the trenches, and the first fin element and the second fin element are over the substrate and the epitaxy layer respectively.

Abstract: An electronic device includes a first body, a second body, a function element, and a coupling assembly. The first body has a first sleeve. The second body has a second sleeve. The function element is disposed on the first body and the second body, and two ends of the function element are respectively disposed through the first sleeve and the second sleeve. The coupling assembly is detachably connected to the function element and disposed on the first sleeve or the second sleeve. Specifically, the first body and the second body are adapted to be opened or closed relatively through the function element and the coupling assembly, and the function element is adapted to be separated from the first sleeve and the second sleeve along an axial direction.

Abstract: A method for forming a semiconductor device is provided. The method includes forming a first recess in a substrate. The method includes forming a first semiconductor layer into the first recess. The first semiconductor layer and the substrate are made of different materials, and a first top surface of the first semiconductor layer is lower than a second top surface of the substrate. The method includes forming a second semiconductor layer over the first top surface and the second top surface, wherein a third top surface of the second semiconductor layer over the first top surface is substantially level with the second top surface of the substrate, and the second semiconductor layer and the substrate are made of different materials. The method includes forming a third semiconductor layer over the second semiconductor layer. The third semiconductor layer and the second semiconductor layer are made of different materials.

Abstract: Present disclosure provides gate-all-around structure including a semiconductor fin having a top surface, a first nanowire over the top surface, a first space between the top surface and the first nanowire, an Nth nanowire and an (N+1)th nanowire over the first nanowire, and a second space between the Nth nanowire and the (N+1)th nanowire. The first space is greater than the second space. Present disclosure also provides a method for manufacturing the gate-all-around structure described herein.

Abstract: A method for rerouting traffic by a switch in a software defined networking (SDN) arrangement comprises an additional switch, multiple routing paths between the original switch and the additional switch being preconfigured by a SDN controller. The original switch collects network statistics by transmitting monitoring packets on each of the multiple routing paths and then calculating a round-trip time (RTT) value for each path on the return of the monitoring packets to the additional switch, the two switches functioning together as local controllers. After collection of network statistics from all the multiple routing paths, the original switch selects the routing path with the smallest RTT value and reroutes traffic accordingly.

Abstract: A method for forming a semiconductor device is provided. The method includes removing a first portion of a substrate to form a recess in the substrate. The method includes forming an epitaxy layer in the recess. The epitaxy layer and the substrate are made of different semiconductor materials. The method includes forming a stacked structure of a plurality of first semiconductor layers and a plurality of second semiconductor layers alternately stacked over the substrate and the epitaxy layer. The method includes removing a second portion of the stacked structure and a third portion of the epitaxy layer to form trenches passing through the stacked structure and extending into the epitaxy layer, The stacked structure is divided into a first fin element and a second fin element by the trenches, and the first fin element and the second fin element are over the substrate and the epitaxy layer respectively.

Abstract: A method for generating a random number is used for a plurality of blocks in a blockchain. The method comprises the steps of: selecting a committee comprising a subset of nodes from the blockchain; executing a distributed key generation to generate a share key and a public key at each of the nodes, wherein the public key further comprises a set of verification keys; broadcasting a share signature from each of the nodes; executing a threshold signature at each of the nodes when a new block is generated; and executing a random number which is a hash value of the threshold signature which is combined from a plurality of partial signature generated from the nodes.