Patents by Inventor Wei Ning

Wei Ning has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190143494
    Abstract: A T-torque wrench contains: a body including a horizontal handle and a vertical extension. The vertical extension has a fitting connector formed on a bottom thereof and configured to fit with sockets of various sizes, and the vertical extension has a strain gauge arranged on one end thereof so as to detect operation torques of the T-torque wrench, the horizontal handle has a tire-pressure detection connector connected on one end thereof. The body includes a casing covered thereon and includes a digital processing unit electrically connected with the strain gauge of the vertical extension and the tire-pressure detection connector of the horizontal handle, the casing includes a display module arranged thereon and electrically connected with the digital processing unit, and the casing includes a control module arranged thereon between the display module and the horizontal handle, wherein the control module is electrically connected with the digital processing unit.
    Type: Application
    Filed: November 16, 2017
    Publication date: May 16, 2019
    Inventor: Wei-Ning Hsieh
  • Publication number: 20190131405
    Abstract: Present disclosure provides a semiconductor structure including a first transistor and a second transistor. The first transistor includes a semiconductor substrate having a top surface and a first anti-punch through region doped with a first conductivity dopant at the top surface. The first transistor further includes a first channel over the top surface of the semiconductor substrate by a first distance. The second transistor includes a second anti-punch through region doped with a second conductivity dopant at the top surface of the semiconductor substrate. The second transistor further includes a second channel over the top surface of the semiconductor substrate by a second distance greater than the first distance. Present disclosure also provides a method for manufacturing the semiconductor structure described herein.
    Type: Application
    Filed: January 25, 2018
    Publication date: May 2, 2019
    Inventors: MENG-HSUAN HSIAO, WINNIE VICTORIA WEI-NING CHEN, TUNG YING LEE
  • Patent number: 10224152
    Abstract: An electrolyte for a dye-sensitized solar cell is disclosed. The electrolyte includes a solvent being one selected from a group consisting of gamma-butyrolactone (gBL), propylene carbonate (PC) and 3-methoxypropionitrile (MPN), and a polymer mixed with the solvent to form an electrolyte solution, wherein when the solvent is one of gBL and PC, the polymer is one selected from a group consisting of polyacrylonitrile (PAN), polyvinyl acetate (PVA), poly(acrylonitrile-co-vinyl acetate) (PAN-VA) and a combination thereof; and when the solvent is MPN, the polymer includes one of a mixture of poly(ethylene oxide (PEO) and polyvinylidene fluoride (PVDF), and a mixture of PEO and polymethylmethacrylate (PMMA).
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: March 5, 2019
    Assignee: National Cheng Kung University
    Inventors: Yuh-Lang Lee, Sung-Chuan Su, Wei-Ning Hung, Jian-Ci Lin
  • Publication number: 20190018460
    Abstract: An electronic device including a first body having a first recess, a second body having a second recess corresponding to the first recess, and at least one dual-shaft hinge module connected to the first and the second bodies and disposed at inner sides of the first and the second bodies. The first and the second bodies rotate relatively via the dual-shaft binge module to be opened or closed. The dual-shaft hinge module has a dual protrusion structure movably accommodated in the first and the second recesses, and the dual protrusion structure moves into or out of the first and the second recesses when the first and the second bodies rotate relatively via the dual-shaft hinge module.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 17, 2019
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Wei-Ning Chai, Chen-Hsien Cheng, Li-Fang Chen, Chun-An Shen, Yi-Hsuan Wu
  • Publication number: 20190001470
    Abstract: A connection structure is connected between a wrench head of a torque wrench and a socket, and the connection structure contains: a body, a casing, and two positioning members. The body includes a coupling section, a driving section, an extension defined between the coupling section and the driving section, and two bolts oppositely inserted into the body from an outer wall of the coupling section. The casing includes a first part, a second part, and two accommodation grooves respectively defined on two inner walls of the first part and the second part and located adjacent to the coupling section. Each of the two positioning members is housed in each of the two accommodation grooves, wherein each positioning member includes multiple toothed projections arranged on an inner wall thereof and abutting against each of the two bolts.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 3, 2019
    Inventor: Wei-Ning Hsieh
  • Publication number: 20180341299
    Abstract: An electronic device, including a main body and a first auxiliary body. The main body includes a processor, a plurality of fans electrically connected to the processor, and a connector electrically connected to the processor. The first auxiliary body is detachably connected to the connector, the processor correspondingly adjusts the heat dissipation capability of at least some of these fans according to the connected first auxiliary body. Further provided is a fan activation method of an electronic device.
    Type: Application
    Filed: May 23, 2018
    Publication date: November 29, 2018
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Ning Chai, Li-Fang Chen, Jiun-Yau Wang, Chien-Ming Su, Chang-Yuan Wu
  • Publication number: 20180331193
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
    Type: Application
    Filed: July 25, 2018
    Publication date: November 15, 2018
    Inventors: Shih-Min Chou, Yun-Tzu Chang, Wei-Ning Chen, Wei-Ming Hsiao, Chia-Chang Hsu, Kuo-Chih Lai, Yang-Ju Lu, Yen-Chen Chen, Chun-Yao Yang
  • Publication number: 20180261675
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
    Type: Application
    Filed: March 8, 2017
    Publication date: September 13, 2018
    Inventors: Shih-Min Chou, Yun-Tzu Chang, Wei-Ning Chen, Wei-Ming Hsiao, Chia-Chang Hsu, Kuo-Chih Lai, Yang-Ju Lu, Yen-Chen Chen, Chun-Yao Yang
  • Patent number: 10074725
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes an isolation layer, a gate dielectric layer, a tantalum nitride layer, a tantalum oxynitride layer, an n type work function metal layer and a filling metal. The isolation layer is formed on a substrate, and the isolation layer has a first gate trench. The gate dielectric layer is formed in the first gate trench, the tantalum nitride layer is formed on the gate dielectric layer, and the tantalum oxynitride layer is formed on the tantalum nitride layer. The n type work function metal layer is formed on the tantalum oxynitride layer in the first gate trench, and the filling metal is formed on the n type work function metal layer in the first gate trench.
    Type: Grant
    Filed: March 8, 2017
    Date of Patent: September 11, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shih-Min Chou, Yun-Tzu Chang, Wei-Ning Chen, Wei-Ming Hsiao, Chia-Chang Hsu, Kuo-Chih Lai, Yang-Ju Lu, Yen-Chen Chen, Chun-Yao Yang
  • Publication number: 20180163594
    Abstract: An injector, comprising, an injector body comprising, an inner wall that defines an injector cavity for fluid, at least one inlet channel into the injector cavity, and at least one outlet channel from the injector cavity, a plunger that defines at least one passageway between the injector cavity and the at least one outlet channel, the plunger being movable longitudinally in the injector cavity between at least: a first open arrangement in which the at least one passageway is positioned to direct fluid into the at least one outlet channel at a first position, and a second open arrangement in which the at least one passageway is positioned to direct fluid into the at least one outlet channel at a second position different from the first position.
    Type: Application
    Filed: February 7, 2018
    Publication date: June 14, 2018
    Applicant: CUMMINS INC.
    Inventors: Bradlee J. Stroia, Lester L. Peters, David L. Buchanan, Rajesh K. Garg, Wei Ning
  • Publication number: 20180145620
    Abstract: Exciter circuitry includes a controller that receives a first signal requesting that a generator coupled to the exciter circuitry stop providing real power to an electrical grid. The controller also sends a second signal to a turbine control system of a turbine coupled to the generator to close at least one fuel nozzle, at least one inlet guide vane, or at least one variable stator vane in response to receiving the first signal. The controller further instructs the exciter circuitry to provide direct current (DC) voltage and DC current to a rotor of the generator, wherein the DC voltage and the DC current causes the generator to operate synchronously with the electrical grid.
    Type: Application
    Filed: November 21, 2016
    Publication date: May 24, 2018
    Inventors: Hua Zhang, Wei Ning
  • Patent number: 9920674
    Abstract: An injector, comprising, an injector body comprising, an inner wall that defines an injector cavity for fluid, at least one inlet channel into the injector cavity, and at least one outlet channel from the injector cavity, a plunger that defines at least one passageway between the injector cavity and the at least one outlet channel, the plunger being movable longitudinally in the injector cavity between at least: a first open arrangement in which the at least one passageway is positioned to direct fluid into the at least one outlet channel at a first position, and a second open arrangement in which the at least one passageway is positioned to direct fluid into the at least one outlet channel at a second position different from the first position.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: March 20, 2018
    Assignee: Cummins Inc.
    Inventors: Bradlee J. Stroia, Lester L. Peters, David L. Buchanan, Rajesh K. Garg, Wei Ning
  • Patent number: 9691704
    Abstract: A semiconductor structure comprises a first wire level, a second wire level and a via level. The first wire level comprises a first conductive feature. The second wire level is disposed on the first wire level. The second wire level comprises a second conductive feature and a third conductive feature. The via level is disposed between the first wire level and the second wire level. The via level comprises a via connecting the first conductive feature and the second conductive feature. There is a first air gap between the first conductive feature and the second conductive feature. There is a second air gap between the second conductive feature and the third conductive feature. The first air gap and the second air gap are linked.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: June 27, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Kuo-Chih Lai, Chia-Chang Hsu, Nien-Ting Ho, Ching-Yun Chang, Yen-Chen Chen, Shih-Min Chou, Yun-Tzu Chang, Yang-Ju Lu, Wei-Ming Hsiao, Wei-Ning Chen
  • Patent number: D806067
    Type: Grant
    Filed: September 10, 2016
    Date of Patent: December 26, 2017
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chen-Hsien Cheng, Li-Fang Chen, Wei-Ning Chai
  • Patent number: D810730
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: February 20, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chen-Hsien Cheng, Li-Fang Chen, Wei-Ning Chai, Hong-Tien Wang
  • Patent number: D816660
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 1, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chen-Hsien Cheng, Li-Fang Chen, Wei-Ning Chai, Wang-Hung Yeh, Hsiao-Ching Hung
  • Patent number: D820266
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: June 12, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Ching-Hua Li, Li-Fang Chen, Chen-Hsien Cheng, I-Chen Chen, I-Lung Chen, Wei-Ning Chai, Cheng-Min Chen
  • Patent number: D827632
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: September 4, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Chen-Hsien Cheng, Li-Fang Chen, Wei-Ning Chai, Wang-Hung Yeh, Hsiao-Ching Hung
  • Patent number: D829709
    Type: Grant
    Filed: July 17, 2017
    Date of Patent: October 2, 2018
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Ning Chai, I-Chen Chen, Li-Fang Chen
  • Patent number: D839714
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: February 5, 2019
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Wei-Ning Chai, I-Chen Chen, Li-Fang Chen, Che-Hsien Lin, Che-Hsien Chu, Wei-Hao Lan, Chia-Chi Lin, Cheng-Shiue Jan