Abstract: A method of manufacturing a resistor-transistor-logic circuit with GaN structures, including steps of forming a GaN layer, an AlGaN barrier layer and a p-type doped GaN capping layer on a substrate, patterning the p-type doped GaN capping layer into multiple p-type doped GaN capping patterns, wherein the GaN layer under parts of the p-type doped GaN capping patterns is converted into gate depletion regions, and the GaN layer not covered by the p-type doped GaN capping patterns in a resistor region functions as 2DEG resistors, forming a passivation layer on the GaN layer and the p-type doped GaN capping patterns, forming multiple sources and drains on the GaN layer, and forming multiple gates on the p-type doped GaN capping patterns, wherein the gates, sources and drains in a high-voltage device region constitute high-voltage HEMTs, and the gates, sources and drains in a low-voltage device region constitute low-voltage logic FETs.

Abstract: A light-emitting-diode driver structure applicable to driving a display panel and operation method thereof are provided. The LED driver structure includes at least one LED driving group, and the LED driving group is composed of a plurality of LED driving circuits which are serially connected in cascade. Each LED driving circuit of the LED driving group receives a data input signal in common. Upon receiving control signals, output signals are generated to drive the display panel. The multi-point driving circuit scheme can be fully or partially applied in the driver structure as required. In addition, a plurality of enable signals can be further adopted to activate each LED driving circuit, for avoiding the FIFO register used in the prior arts. By employing the disclosed technical contents, the present invention is effective in reducing both redundant power waste and circuit layout area of a conventional LED driver.

Abstract: The present disclosure provides systems and methods for dynamically adjusting a bit-rate of encoded audio data. A buffer may receive audio data encoded at a first bit-rate. An audio data level corresponding to the amount of audio data stored within the buffer may be determined. The audio data level of the buffer may be determined to be within a buffer zone, and a bit-rate adjustment may be initiated after determining the audio data level is within a buffer zone.

Abstract: A high strength and corrosion resistant ferrochrome alloy bulk is disclosed, which comprises, in weight percent: 30-68% Cr, 1.5-8% Ni, 1.6-6% C, and the balance Fe and incidental impurities, of which a Fe/Ni ratio is in a range from 5 to 10 and a Cr/C ratio is in a range between 10 and 33. Experimental data reveal that, samples of the high strength and corrosion resistant ferrochrome alloy bulk all possess hardness above HV400 and excellent corrosion resistance due to the high content of Cr. As a result, experimental data have proved that the high-strength and corrosion-resistant ferrochrome alloy bulk of the present invention has a significant potential to replace conventional high-strength stainless steels, so as to be widely applied in various industrial fields, e.g., aviation, transportation, marine facility components, chemical equipment and pipe fittings, engine parts, turbine blades, valves, bearings, building materials, and so on.

Abstract: Provided are a gate structure and a method of forming the same. The gate structure includes a gate dielectric layer, a metal layer, and a cluster layer. The metal layer is disposed over the gate dielectric layer. The cluster layer is sandwiched between the metal layer and the gate dielectric layer, wherein the cluster layer at least includes an amorphous silicon layer, an amorphous carbon layer, or an amorphous germanium layer. In addition, a semiconductor device including the gate structure is provided.

Abstract: Lipocoacervates and compositions comprising lipocoacervates, methods of making and using same. A lipocoacervate comprises a coacervate phase and a lipid or lipids, where the lipid(s) is/are disposed on at least a portion of an exterior surface of the coacervate phase, and optionally, one or more biomolecules. In various examples, a coacervate phase comprises cationic component(s), such as, for example, polycations, such as, for example, chitosan, spermine, spermidine, positively-charged polymers, positively-charged proteins, and any combination thereof, and anionic component(s), such as, for example, polyanions, such as, for example, glycosaminoglycans, nucleic acids, negatively-charged proteins, and any combination thereof. In various examples, an anionic component is a biomolecule. In various examples, a lipocoacervate is made by contacting a coacervate composition with a lipid composition, where lipocoacervate(s) or a lipocoacervate composition is/are formed.

Abstract: A magnetoresistive random access memory (MRAM) includes a first transistor and a second transistor on a substrate, a source line coupled to a first source/drain region of the first transistor, and a first metal interconnection coupled to a second source/drain region of the first transistor. Preferably, the first metal interconnection is extended to overlap the first transistor and the second transistor and the first metal interconnection further includes a first end coupled to the second source/drain region of the first transistor and a second end coupled to a magnetic tunneling junction (MTJ).

Abstract: A control system includes a plurality of driving circuits coupled in series, which include a first driving circuit and a second driving circuit. The first driving circuit includes a first receiver, a first transmitter and a first flag signal selector. The first transmitter is coupled to the first receiver, and the first flag signal selector is coupled between the first receiver and the first transmitter. The second driving circuit, coupled to the first driving circuit, includes a second receiver, a second transmitter and a second flag signal selector. The second transmitter is coupled to the second receiver, and the second flag signal selector is coupled between the second receiver and the second transmitter.

Abstract: A display control system for controlling a display panel having a plurality of display zones includes a main controller, a plurality of display driver circuits and a plurality of memories. Each of the display driver circuits is coupled to a corresponding display zone among the plurality of display zones, to control the corresponding display zone. Each of the memories is coupled to a corresponding display driver circuit among the plurality of display driver circuits, to store a compensation data for the corresponding display zone controlled by the corresponding display driver circuit. The plurality of display driver circuits are cascaded through a plurality of first transmission channels and connected through at least one second transmission channel, and each of the first transmission channels is coupled between two of the plurality of display driver circuits or between one of the plurality of display driver circuits and the main controller.

Abstract: A resistor-transistor-logic circuit with GaN structures, including a 2DEG resistor having a drain connected with an operating voltage, and a logic FET having a gate connected to an input voltage, a source grounded and a drain connected with a source of the 2DEG resistor and connected collectively to an output voltage.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.

Abstract: A resistor with GaN structures, including a GaN layer with a 2DEG resistor region and an undoped polysilicon resistor region, an AlGaN barrier layer on the GaN layer in the 2DEG resistor region, multiple p-type doped GaN capping layers arranged on the AlGaN barrier layer so that the GaN layer not covered by the p-type doped GaN capping layers in the 2DEG resistor region is converted into a 2DEG resistor, a passivation layer on the GaN layer, and an undoped polysilicon layer on the passivation layer in the undoped polysilicon resistor region and functions as an undoped polysilicon resistor.

Abstract: A high chromium and silicon-rich corrosion resistant steel is disclosed, which comprises, in weight percent: 22-30% Cr, 2-10% Si, and the balance Fe and incidental impurities, of which a content amount of Cr and Si is less than 37%. Experimental data reveal that, samples of the high chromium and silicon-rich corrosion resistant steel all have a pitting potential greater than 0.8 V and a hardness in a range between HV170 and HV500 in the as-homogenized condition. As a result, experimental data have proved that the high chromium and silicon-rich corrosion resistant steel of the present invention can replace conventional stainless steels having poor pitting resistance like type 304 and type 316 L, and then be adopted for the applications of components and/or structural parts requiring high corrosion resistance.

Abstract: A voltage converter capable of adjusting a zero-crossing reference current includes a first power switch, a second power switch, a current sensor circuit, a zero-crossing reference current source, and an adjustment circuit. The first power switch and the second power switch are coupled in series to generate an inductor current. The current sensor circuit is coupled to the second power switch to sense a current flowing through the second power switch and generate a sensing current. The zero-crossing reference current source outputs a zero-crossing reference current. The adjustment circuit is coupled to the current sensor circuit and the zero-crossing reference current source to receive the sensing current and the zero-crossing reference current, so as to control the second power switch and adjust the zero-crossing reference current according to the sensing current and the zero-crossing reference current.

Abstract: A crowd management system includes at least one local controller associated with an attraction area of an individual attraction within a theme park. The crowd management system includes a transceiver of the at least one local controller, where the transceiver receives guests data via wireless signals from guest-associated devices within a detection range of the local controller. The crowd management system includes a remote central controller in communication with the at least one local controller and the guest-associated device. The remote central controller receives the guest data from the at least one local controller and determines one or more crowd metrics of the individual attraction based on the guest data. The remote central controller generates an activity command based on the one or more crowd metrics. The remote central controller transmits the activity command to at least one guest-associated device of the guest-associated devices.

Abstract: An electronic package is provided in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure is embedded in the packaging layer. Therefore, thermal stress is dispersed through the frame body to avoid warpage of the electronic package, so as to facilitate the arrangement of other electronic components around the electronic component.

Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.

Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.

Abstract: An electronic package and a manufacturing method of the electronic package are provided, in which an electronic component is arranged on a wiring structure and covered with a packaging layer, and a frame body that does not contact the wiring structure nor cover the electronic component is embedded in the packaging layer.